Michal Simek [Mon, 28 May 2018 10:26:22 +0000 (12:26 +0200)]
py: tests: Mark scsi reset test as xfail
Sandbox travis targets enable SCSI commands but without any HDD
connected that's why that commands fails. Mark them as xfail to keep
travis happy till there is better/mainline solution.
Also remove i2c dependency which is not there.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 28 May 2018 07:08:44 +0000 (09:08 +0200)]
defconfigs: Disable ISO_PARTITIONS for amXXXX
Disable ISO_PARTITIONS for two amXXXX targets to keep travis happy
about SPL size.
These commands are enabled via DISTRO default in mainline that's why
this change is aligned.
Error message:
arm-linux-gnueabihf-ld.bfd: region `.sram' overflowed by 540 bytes
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Alex Kiernan [Wed, 7 Feb 2018 20:01:54 +0000 (20:01 +0000)]
Fix misaligned buffer in env_fat_save
When saving the environment on a platform which has DMA alignment
larger than the natural alignment, env_fat_save triggers a debug
message in file_fat_write:
Saving Environment to FAT... writing uboot.env
FAT: Misaligned buffer address (9df1c8e0)
OK
Signed-off-by: Alex Kiernan <alex.kiernan@gmail.com>
Vipul Kumar [Wed, 9 May 2018 13:40:31 +0000 (19:10 +0530)]
cmd: zynqrsa: Added support to load non-encrypted bitstream
zynqrsa programs the PL when a partition includes an authenticated
and encrypted bitstream. However, if the partition is only
authenticated there is no PL programming operation because
there was no support to load only authenticated bitstream.
This patch added support to load only authenticated bitstream.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds pytest case for zynqrsa command
This test runs only in bootmodes other than jtag
It tests authentication of images with valid keys
and invalid keys as well.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch removes usage of PPK info from image as it
is supposed to use the verified key residing in OCM for
verificationof SPK. u-boot is already reading PPK data
from OCM, so removing the code of reading from image should
be sufficient. The PPK was actually verified and placed in
OCM by bootrom during boot.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Ibai Erkiaga <ibai.erkiaga-elorza@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.
On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.
For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html
This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities
Upon this the layer above (mmc-driver) can setup the card correctly.
Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.
Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
Vipul Kumar [Thu, 3 May 2018 06:50:54 +0000 (12:20 +0530)]
mmc: Changed the datatype of the variable to handle 64-bit arch
This patch changed the datatype of variable "start" from uint to ulong
to work properly on 64-bit machines as well. Also the return type of
get_timer() function is ulong.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: xilinx_spi: Increment tx and rx pointers only if they are valid
This patch increments tx and rx buf pointers only if they are valid,
otherwise, they dont need to be incremented and its of no use.
Moreover, this patch fixes the issue of inconsistent processor
hang on AC701 while performing operations to spi flash due to these
incorrect operations on rxbuf when it is null.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch added support to check whether the bitstream is full
or none. On the basis of that, it loads the bitstream. Only
full bitstream loading is supported because we don't have a way
to identify it based on data in boot.bin format.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
arm64: zynqmp: env: Added support to save env to spi
This patch added support to save environment to spi. User
need to enable CONFIG_ENV_IS_IN_SPI_FLASH. This patch also
added support to enable CONFIG_ENV_SIZE, CONFIG_ENV_OFFSET
and CONFIG_ENV_SECT_SIZE through Kconfig.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mini-uboot: cse-nor: Enabled CONFIG_MTD_NOR_FLASH for nor in defconfig
In mainline with e856bdcf commit, CONFIG_SYS_NO_FLASH renamed to
CONFIG_MTD_NOR_FLASH. And this config was not enabled for cse-nor
and hence nor programming was getting fail as it was not able to
unprotect sector for programming.
This patch fixed this issue. After enabling CONFIG_MTD_NOR_FLASH,
flash programming is working fine.
Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mtd: spi: Set the current bank of flash to zero after doing clear bar
clean_bar() function selecting bank zero but not setting the
flash current bank to zero. After erase operation, bank zero is selected
but the flash current bank is pointing to bank one. So, during
write operation, while trying to write bank one, it actually writes in
bank zero.
This patch fixed this issue by setting the current bank of flash
to zero after doing clear_bar() after erase, write and read operations.
This patch used for filling the MMU map for DDR at run time based
information read from Device Tree or automatically detected from static
configuration.
Moon John C [Fri, 13 Apr 2018 07:40:46 +0000 (13:10 +0530)]
zynqmp: spi: Added support for IO mode
This patch added support for device tree "has-io-mode" flag.
This forced the driver to use IO mode instead of DMA. This
flag is necessary for UBIFS to operate correctly with SPI-NOR
devices.
Signed-off-by: Moon John C <John.Moon2@ngc.com> Signed-off-by: Vipul Kumar <vipul.kumar@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
spi: spi_flash: Handle dualparallel case for macronix flash
This patch handles the dual parallel case while
preserving the QEB bit for macronix flash devices.
This fixes the issue of DMA timeout during probe
of macronix flash devices in dual parallel mode.
Signed-off-by: Siva Durga Prasad Paladugu <siva.durga.paladugu@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Fri, 6 Apr 2018 11:32:52 +0000 (13:32 +0200)]
scsi: ceva: Convert driver to use UCLASS_AHCI instead of SCSI
In v2018 the patch
"dm: ahci: Correct uclass private data"
(sha1: bfc1c6b4838501d10aa48c0e92eaf70976f4b2dd)
was causing an issue for ceva_sata.
But this issue is not in v2018.05-rc1 but still converting to
UCLASS_AHCI would make more sense.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
mmc: Added support to switch emmc to correct frequency
When no-1-8-v is added in device tree, it slows down emmc to 25MHz.
This patch fixed this issue by setting correct emmc frequency.
Now, after adding no-1-8-v is added in device tree, it slows down emmc
to 52MHz.
arm64: zynqmp: dwc3: add flag for supporting hibernation
This patch documents the snps,enable-hibernation devicetree
property , which enables the hibernation support for dwc3
driveer when operating in peripheral mode
Hyun Kwon [Fri, 9 Mar 2018 18:50:11 +0000 (10:50 -0800)]
arm64: zynqmp: dt: Add new ZynqMP DP changes
This removes old dt contents from all dts files for ZynqMP DisplayPort
and updates all with new bindings. Please note, some of these changes
are only build-tested.
Signed-off-by: Hyun Kwon <hyun.kwon@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Fri, 23 Feb 2018 13:31:13 +0000 (05:31 -0800)]
drivers: pinctrl: Update ZynqMP pin control driver
Replace existng pin control driver with a new version
of ZyqnMP pin control driver. This driver queries pin
information from firmware and registers pin control
accordingly instead of using hard coded pin info.
New pin control driver creates group name from function name
by adding postfix so some group names are different than existing
group names. Deprecate old pin control driver and its DT bindings
and use new pin control DT binding in device tree.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Tue, 20 Feb 2018 12:28:37 +0000 (04:28 -0800)]
clk: zynqmp: Use firmware APIs in clock driver
In existing driver, clocks are registered statically.
Instead of using static clocks, get clock information
from firmware and register clocks accordinglly.
Firmware maintains database of all clocks avaiable for the
variant. So if there is any new clocks are avaiable for
specific variant or some clocks are not present in
variant, Linux driver would not need any change.
To contorl the clocks, use firmware APIs instead of
register read/write. This prevents direct clock control
from any single master(processor) shared between multiple
masters. Firmware can implement this APIs to manage
shared clocks.
Change clock IDs in dts based on new firmware IDs.
Signed-off-by: Tejas Patel <tejasp@xilinx.com> Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Mon, 12 Feb 2018 13:40:06 +0000 (05:40 -0800)]
arm64: zynqmp: Change pmufw DT binding node name
"firmware" node name can conflict with other /firmware node
where firmware should include all firmware interfaces. Change
existing node name for transition to new firmware interface
which is defined under /firmware node.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Rajan Vaja [Thu, 1 Feb 2018 04:59:16 +0000 (20:59 -0800)]
arm64: zynqmp: remove pin-control properties
Remove pin control from firmware device tree binding as
pin control settings for firmware are done in firmware only.
Remove the same from bindings documentation.
Signed-off-by: Rajan Vaja <rajanv@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 27 Mar 2018 12:31:42 +0000 (14:31 +0200)]
arm: zynq: Remove 0x prefixes from cc108
The patch fixing issues reported by DTC:
arch/arm/boot/dts/zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x400000 unit name should not have
leading "0x"
arch/arm/boot/dts/zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0x800000 unit name should not have
leading "0x"
arch/arm/boot/dts/zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xc00000 unit name should not have
leading "0x"
arch/arm/boot/dts/zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xd00000 unit name should not have
leading "0x"
arch/arm/boot/dts/zynq-cc108.dtb: Warning (unit_address_format): Node
/amba/spi@e000d000/flash@0/partition@0xf00000 unit name should not have
leading "0x"
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
ARM: dts: zynq: Add generic compatible string for I2C EEPROM
The at24 driver allows to register I2C EEPROM chips using different vendor
and devices, but the I2C subsystem does not take the vendor into account
when matching using the I2C table since it only has device entries.
But when matching using an OF table, both the vendor and device has to be
taken into account so the driver defines only a set of compatible strings
using the "atmel" vendor as a generic fallback for compatible I2C devices.
So add this generic fallback to the device node compatible string to make
the device to match the driver using the OF device ID table.
Signed-off-by: Javier Martinez Canillas <javier@dowhile0.org> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Mon, 26 Mar 2018 14:01:05 +0000 (16:01 +0200)]
image: fit: Show information about OS type in firwmare case too
SPL ATF implementation requires FIT image with partitions where the one
is Firmware/ATF and another one Firmware/U-Boot. OS field is used for
recording that difference that's why make sense to show values there for
Firmware types.
Michal Simek [Wed, 14 Mar 2018 10:02:24 +0000 (11:02 +0100)]
tools: xilinx: Fix zynq/zynqmp image recognition
There is an issue to recognize zynq or zynqmp image because header
checking is just the same. That's why zynqmp images are recognized as
zynq one.
Check unused fields which are initialized to zero in zynq format
(__reserved1 0x38 and __reserved2 0x44) which are initialized for
zynqmp. This should ensure that images are properly recognized by:
./tools/mkimage -l spl/boot.bin
Also show image type as ZynqMP instead of Zynq which is confusing.
Reported-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com> Tested-by: Alexander Graf <agraf@suse.de>
Alexander Graf [Thu, 15 Mar 2018 10:14:19 +0000 (11:14 +0100)]
kwbimage: Fix out of bounds access
The kwbimage format is reading beyond its header structure if it
misdetects a Xilinx Zynq image and tries to read it. Fix it by
sanity checking that the header we want to read fits inside our
file size.
Signed-off-by: Alexander Graf <agraf@suse.de> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Luca Ceresoli [Mon, 12 Mar 2018 16:18:38 +0000 (17:18 +0100)]
arm64: zynqmp: Enable booting to ATF
U-Boot is now able to boot to ARM Trusted Firmware (ATF). The boot
flow is SPL(EL3) loads ATF and full u-boot and jump to ATF(EL3) which
pass control to full u-boot(EL2). This has been tested on zcu106, so
enable it in this defconfig.
To generate an image that triggers this booting flow, you need to pass
'-O arm-trusted-firmware' to mkimage.
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Luca Ceresoli [Mon, 12 Mar 2018 16:18:37 +0000 (17:18 +0100)]
arm64: zynqmp: zcu106: fix SPL MMC booting
The U-Boot SPL generated with the current zcu106 defconfig cannot boot
from MMC:
[...]
U-Boot SPL 2018.01 (Feb 21 2018 - 17:47:14)
EL Level: EL3
Trying to boot from MMC1
sdhci_transfer_data: Error detected in status(0x408020)!
spl_load_image_fat_os: error reading image u-boot.bin, err - -2
spl_load_image_fat: error reading image u-boot.img, err - -6
SPL: failed to boot from all boot devices
### ERROR ### Please RESET the board ###
Fix by lowering the rpll value. The new value for the RPLL_CTRL
register comes from the current psu_init_gpl.c from the HDF file at
https://github.com/xilinx/hdf-examples/tree/01ad8ea5fd1989abf4ea5a072d019a16cb2bc546/zcu106-zynqmp
(generated by Vivado v2017.4).
RPLL and sdio1_ref clocks before and after this change:
- Old values: RPLL 1.36 GHz, sdio1_ref 272 MHz
- New values: RPLL 1.16 GHz, sdio1_ref 233 MHz
Signed-off-by: Luca Ceresoli <luca@lucaceresoli.net> Cc: Michal Simek <michal.simek@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Michal Simek [Tue, 20 Mar 2018 15:02:21 +0000 (16:02 +0100)]
scsi: Add per-device private data for scsi uclass
This patch is doing what was done by
"dm: ahci: Correct uclass private data"
(sha1: bfc1c6b4838501d10aa48c0e92eaf70976f4b2dd)
with reverting pointer to allocated space.
It is questionable if sata_ceva should use UCLASS_SCSI or move to
UCLASS_SATA but this investigation hasn't been done yet.
Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Vipul Kumar [Sat, 10 Mar 2018 12:22:23 +0000 (17:52 +0530)]
arm64: zynqmp: nand: Fixed NAND write issue
In commit 67faecc3059b ("arm64: zynqmp: nand: Fixed NAND erase issue for
size 1GiB or more"), ARASAN_NAND_MEM_ADDR1_PAGE_MASK macro changed
to 0xFFFF and the same macro is used in nand write and so that getting
nand write error.
This patch reverted this macro to the 0xFFFF0000 and used
ARASAN_NAND_MEM_ADDR1_COL_MASK in the nand erase function
which is equal to 0xFFFF.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
Vipul Kumar [Mon, 5 Mar 2018 09:54:59 +0000 (15:24 +0530)]
arm64: zynqmp: nand: Fixed NAND erase issue for size 1GiB or more
NAND erase was not happening for size 1GiB or more. Erase
command was executing successfully but in actual, it was not
erasing.
This patch fixed erase issue for 1 GiB or more size nand.
Signed-off-by: Vipul Kumar <vipulk@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
This patch adds pytest for zynqaes commands. It tests
loading encrypted image back to DDR and tests loading
encrypted bitstream to PL using "zynqaes load" command.
This test needs to be executed only in bootmode, if not it
wil be skipped.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynq: Poll for PCFG_DONE if encrypted image is bitstream
This patch polls for PCFG_DONE if encrypted image is bitstream
to ensure that bitstream programming is successful. This also
invokes missing zynq_slcr_devcfg_enable() to bring up axi interface
after programming is done.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
There is delay needed after PCFG_PROGB change if
AES key source is efuse. This fixes the issue of
encrypted bitstream loading with AES efuse as key
source.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
fpga: zynq: aes: Use flush_dcache_range() instead of cache on/off
Use flush_dcache_range() instead of dcache disable and
enable as its more meaningful to flush a region than
disabling cache and enabling it back. This fixes the
issue of GEM failure after using zynq aes.
Signed-off-by: Siva Durga Prasad Paladugu <sivadur@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
projects / thirdparty / u-boot.git / log
