Luca Coelho [Tue, 20 May 2025 08:26:58 +0000 (11:26 +0300)]
drm/i915/dkl: return if tc_port is invalid in dkl_phy_set_hip_idx()
In dkl_phy_set_hip_idx(), we may try to shift a value negatively,
whose behavior is undefined. This can happen because we define
TC_PORT_NONE to -1, so theoretically tc_port could be -1. We will
then use tc_port to shift to the correct address of the specified
port, but if it's negative, anything can happen.
If this happens or tc_port exceeds I915_MAX_TC_PORTS, it's safer to
return with a warning than risk an invalid write.
Allocate struct drm_info dynamically, and convert the struct
drm_i915_private and struct xe_device dram_info member into a const
pointer. Move the struct definition to intel_dram.h, and keep it opaque
to everyone not needing it. This also removes the duplication of the
struct definition.
Jani Nikula [Tue, 27 May 2025 09:25:25 +0000 (12:25 +0300)]
drm/i915/dram: add return value and handling to intel_dram_detect()
We'll want to start returning errors from intel_dram_detect(). As the
first step, add the return value and error handling, even if we still
only return 0.
Do no functional changes, but leave a comment about whether we should
bail out on dram detection failures.
Jani Nikula [Tue, 27 May 2025 10:59:11 +0000 (13:59 +0300)]
drm/i915: add out_value to intel_wait_for_register_fw() and intel_de_wait_fw()
Future users of intel_de_wait_fw() need the final value. Just return it
for everyone using intel_wait_for_register_fw() and intel_de_wait_fw()
to avoid adding or using another set of specialized functions. There
aren't that many users for these anyway.
Jani Nikula [Tue, 27 May 2025 10:59:08 +0000 (13:59 +0300)]
drm/i915/sbi: convert intel_sbi.[ch] to struct intel_display
Convert intel_sbi.[ch] to struct intel_display, as much as possible
anyway, and as a consequence drop the dependency on i915_drv.h from
intel_pch_refclk.c.
drm/i915/display: Fix u32 overflow in SNPS PHY HDMI PLL setup
When configuring the HDMI PLL, calculations use DIV_ROUND_UP_ULL and
DIV_ROUND_DOWN_ULL macros, which internally rely on do_div. However, do_div
expects a 32-bit (u32) divisor, and at higher data rates, the divisor can
exceed this limit. This leads to incorrect division results and
ultimately misconfigured PLL values.
This fix replaces do_div calls with div64_base64 calls where diviser
can exceed u32 limit.
Fixes: 5947642004bf ("drm/i915/display: Add support for SNPS PHY HDMI PLL algorithm for DG2") Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Cc: Suraj Kandpal <suraj.kandpal@intel.com> Cc: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Dibin Moolakadan Subrahmanian <dibin.moolakadan.subrahmanian@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250528064557.4172149-1-dibin.moolakadan.subrahmanian@intel.com
Jouni Högander [Mon, 26 May 2025 12:05:06 +0000 (15:05 +0300)]
drm/i915/psr: Add interface to check if AUXLess ALPM is needed by PSR
Currently we spread ugly PSR details into ALPM code to check if AUXLess
ALPM is needed. Prepare to hide these details to PSR code by adding new
interface for checking if AUXLess ALPM is needed.
Ville Syrjälä [Tue, 13 May 2025 09:28:20 +0000 (12:28 +0300)]
drm/i915: Indicate which pipe lied about its interrupts
Indicate which pipe signalled the spurious DE PIPE interrupt.
Might help with debugging a bit if we know where the interrupt
is supposedly coming from.
Jani Nikula [Thu, 22 May 2025 09:48:43 +0000 (12:48 +0300)]
drm/i915: stop including display/intel_display_{core, limits}.h from i915_drv.h
Make i915->display pointer opaque to most of core i915 driver. Lots of
places now need explicit include of intel_display_core.h, or a more
specific header.
With this dependency broken, changes in display should cause radically
less recompilation of i915.
Double Buffered LUT registers can be programmed in the active region.
This patch implements the MMIO path for it. Program the registers after
evading vblank. The HW latches on to the registers after delayed vblank.
It takes around 1024 cdclk cycles(~one scanline) for this.
Following assumptions have been made while making this change
- Current vblank evasion time is sufficient for programming
the LUT registers.
- Current guardband calculation would be sufficient for the HW
to latch on to the new values
v2: move loading LUTs to commit_pipe_post_planes() since a vblank
evasion failure for this is probably less drastic than
for plane programming. (Ville)
drm/i915/display: use GOSUB to program double buffered LUT registers
With addition of double buffered GAMMA registers in PTL, we can now
program them in the active region. Use GOSUB instruction of DSB to
program them.
It is done in the following steps:
1. intel_color_prepare_commit()
- If the platform supports, prepare a dsb instance (dsb_color)
hooked to DSB0.
- Add all the register write instructions to dsb_color through
the load_lut() hook
- Do not add the vrr_send_push() logic to the buffer as it
should be taken care by dsb_commit instance of DSB0
- Finish preparation of the buffer by aligning it to 64 bit
2. intel_atomic_dsb_finish()
- Add the gosub instruction into the dsb_commit instance of DSB0
using intel_dsb_gosub()
- If needed, add the vrr_send_push() logic to dsb_commit after it
v2: Refactor code to simplify commit completion flow.
Add some helpers along the way (Ville)
v3: s/doubled/double and add display to commit message prefix (Uma)
With double buffer gamma registers in the mix, we need not wait for
vblank to execute gamma writes through dsb. Before we implement
that s/dsb_color_vblank/dsb_color.
A DSB buffer which will be used for GOSUB execution does not need
the DEWAKE mechanism but still need to be 64 bit aligned. Add helper
to finish preparation of a dsb buffer to be executed with GOSUB
instruction.
v2: Add a cacheline of noops at the end of GOSUB buffer (Ville)
Ville Syrjälä [Fri, 23 May 2025 06:20:34 +0000 (11:50 +0530)]
drm/i915/dsb: Implement intel_dsb_gosub()
Add support for the new GOSUB DSB instruction (available on ptl+),
which instructs the DSB to jump to a different buffer, execute
the commands there, and then return execution to the next
instruction in the original buffer.
There are a few alignment related workarounds that need to
be dealt with when emitting GOSUB instruction.
v2: Right shift head and tail pointer passed to gosub command (chaitanya)
v3: Add macro for right shifting head/tail pointers (Animesh)
v4: Fix typo in commit message (Uma)
Add comments explaining why right shifting htp is needed (Animesh)
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250523062041.166468-5-chaitanya.kumar.borah@intel.com
Ville Syrjälä [Fri, 23 May 2025 06:20:33 +0000 (11:50 +0530)]
drm/i915/dsb: Extract intel_dsb_{head,tail}()
Extract the code that calculates the DSB_HEAD/TAIL register
values into small helpers. We already have two copies of this,
and soon there will be a third.
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: Chaitanya Kumar Borah <chaitanya.kumar.borah@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Signed-off-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250523062041.166468-4-chaitanya.kumar.borah@intel.com
Imre Deak [Tue, 20 May 2025 14:22:19 +0000 (17:22 +0300)]
drm/i915/dp: Fix the enabling/disabling of audio SDP splitting
Adjust the enabling/disabling steps of the DP audio SDP splitting
according to a recent Bspec update. This moves the enabling to the audio
codec enable sequence after the transcoder is enabled and disables SDP
splitting explicitly during the audio disable sequence.
Bspec requires waiting for a vblank event after the transcoder is
enabled and before SDP splitting is enabled. There is no need for an
explicit wait for this, since after the transcoder is enabled this
vblank event is guaranteed to have happened via a flip done wait (see
intel_atomic_commit_tail() -> drm_atomic_helper_wait_for_flip_done()).
The bspec update is for LNL+ only, but the HW team clarified that this
has been always the intended sequence on all platforms and bspec will be
updated everywhere accordingly.
The way SDP splitting was originally enabled matched the version of
bspec at that time. Adding here the Fixes: line still, since this
change fixes a FIFO underrun on PTL during output enabling when DSC is
enabled.
Bspec: 49283, 68943 Fixes: 8853750dbad8 ("drm/i915: Enable SDP split for DP2.0") Cc: Vinod Govindapillai <vinod.govindapillai@intel.com> Acked-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250520142219.1688401-1-imre.deak@intel.com
Jani Nikula [Fri, 16 May 2025 12:17:00 +0000 (15:17 +0300)]
drm/xe/display: use xe->display to decide whether to do anything
Since we only initialize xe->display when xe->info.probe_display, we can
use !xe->display to bail out early. This seems cleaner and more accurate
than relying on xe->info.probe_display, since xe->display may indeed be
NULL.
Jani Nikula [Fri, 16 May 2025 12:16:59 +0000 (15:16 +0300)]
drm/xe/display: add notes about how early a few functions can be called
xe_display_driver_probe_defer() and xe_display_driver_set_hooks() get
called before either struct xe_device or struct intel_display
exist. Make a note of that.
Jani Nikula [Fri, 16 May 2025 12:16:58 +0000 (15:16 +0300)]
drm/xe/display: move xe->display initialization to xe_display_probe()
The future goal is to have intel_display_device_probe() create struct
intel_display. As the first step, postpone xe->display initialization
right before that call. This is the same location as in i915.
There's a subtle functional change here: xe->display will now be
initialized only if xe->info.probe_display.
The xe_display_create() function becomes empty, and can be removed. Move
its documentation to xe_display_probe()
Haoxiang Li [Fri, 16 May 2025 12:16:54 +0000 (15:16 +0300)]
drm/i915/display: Add check for alloc_ordered_workqueue() and alloc_workqueue()
Add check for the return value of alloc_ordered_workqueue()
and alloc_workqueue(). Furthermore, if some allocations fail,
cleanup works are added to avoid potential memory leak problem.
Imre Deak [Mon, 19 May 2025 13:34:17 +0000 (16:34 +0300)]
drm/i915/dp_mst: Work around Thunderbolt sink disconnect after SINK_COUNT_ESI read
Due to a problem in the iTBT DP-in adapter's firmware the sink on a TBT
link may get disconnected inadvertently if the SINK_COUNT_ESI and the
DP_LINK_SERVICE_IRQ_VECTOR_ESI0 registers are read in a single AUX
transaction. Work around the issue by reading these registers in
separate transactions.
The issue affects MTL+ platforms and will be fixed in the DP-in adapter
firmware, however releasing that firmware fix may take some time and is
not guaranteed to be available for all systems. Based on this apply the
workaround on affected platforms.
Suraj Kandpal [Thu, 15 May 2025 07:18:01 +0000 (12:48 +0530)]
drm/i915/dpll: Rename intel_update_active_dpll
Rename intel_update_active_dpll to intel_dpll_update_active in an
effort to have function names which are exported to start with
filenames they are exported from.
Suraj Kandpal [Thu, 15 May 2025 07:17:55 +0000 (12:47 +0530)]
drm/i915/dpll: Rename crtc_get_shared_dpll
Rename crtc_get_shared_dpll to take into the individual PLL framework
which came in at DISPLAY_VER >= 14.
Also having shared dpll stuff also in intel_dpll.c is just confusing.
--v2
-Change naming to dpll_global to keep consistency with rest of the
naming
Suraj Kandpal [Thu, 15 May 2025 07:17:53 +0000 (12:47 +0530)]
drm/i915/dpll: Rename intel_shared_dpll
Rename intel_shared_dpll to intel_dpll to represent both
shared and individual dplls. Since from MTL each PHY has it's
own PLL making the shared PLL naming a little outdated. In an
effort to make this framework accepting of future changes this
needs to be done.
--v2
-Use intel_dpll_global to make sure names start with the filename
[Jani/Ville]
-Explain the need of this rename [Jani]
--v3
-Just keep it intel_dpll [Jani]
--v4
-Fix comment [Jani]
-Use just num_dpll and dplls [Jani]
Suraj Kandpal [Thu, 15 May 2025 07:17:50 +0000 (12:47 +0530)]
drm/i915/dpll: Rename intel_shared_dpll_state
Rename intel_shared_dpll_state to just intel_dpll_state since it may
not necessarily store share dpll state info specially since
DISPLAY_VER >= 14 PLL's are not shared.
Also change the name of variables which may have been associated as
a shared_dpll.
Suraj Kandpal [Thu, 15 May 2025 07:17:49 +0000 (12:47 +0530)]
drm/i915/dpll: Rename intel_dpll_funcs
Rename intel_dpll_funcs to intel_dpll_global_funcs so that later
on intel_shared_dpll_funcs can be renamed to intel_dpll_funcs.
This is done to move away from the shared naming convention since
starting MTL dpll's are not shared among PHYs.
Suraj Kandpal [Thu, 15 May 2025 07:17:48 +0000 (12:47 +0530)]
drm/i915/dpll: Rename intel_dpll
Rename intel_dpll to intel_dpll_global so that intel_shared_dpll
can be renamed to intel_dpll in an effort to move away from the shared
naming convention.
Also intel_dpll according to it's comment tracks global dpll rather
than individual hence making more sense this gets changed.
Ankit Nautiyal [Mon, 5 May 2025 03:39:11 +0000 (09:09 +0530)]
drm/i915/vrr: Program EMP_AS_SDP_TL for DP AS SDP
The register EMP_AS_SDP_TL (MTL) was introduced for configuring the
double buffering point and transmission line for all
HDMI2.1 Extended Metadata Packets (VT-EMP for VRR, CVT-EMP for DSC etc).
This was also intended to be configured for DP to HDMI2.1 PCON to
support VRR.
From BMG and LNL+ onwards, this register was extended to Display Port
Adaptive Sync SDP to have a common register to configure double
buffering point and transmission line for both HDMI EMPs and DP VRR related
packets.
Currently, we do not support VRR for either native HDMI or via PCON.
However we need to configure this for DP SDP case. As per the spec,
program the register to set Vsync start as the double buffering point
for DP AS SDP.
v2:
-Make the helper more readable. (Jani)
-Add more information in commit message and comment.
Gareth Yu [Fri, 9 May 2025 09:25:39 +0000 (17:25 +0800)]
drm/i915/dsi: Enforce pipeline flush with DSI HS transfer
With all of the boundary conditions when streaming the commands B2B in our
validation (part of the reason we added the flush), the Flush effectively
serializes the transmission of each command enqueued within the command
dispatcher to one per V. Blank line which simplifies the behavior of the
High Speed Arbitration.
So, unless we absolutely have to burst these to the Sink, we should be
using the Pipeline Flush bit to serialize the commands.
Ville Syrjälä [Mon, 12 May 2025 10:33:58 +0000 (13:33 +0300)]
drm/i915/dmc: Introduce dmc_configure_event()
Instead of hardcoding the event handler indices (for runtime
event handler enable/disable) we can simply look for the handler
with the appropriate event type. This isolates us from the firmware
details a bit better.
Ville Syrjälä [Mon, 12 May 2025 10:33:57 +0000 (13:33 +0300)]
drm/i915/dmc: Extract is_event_handler()
Extract the helper to determine if the mmio reg+data are the
event handler register (DMC_EVT_CTL) for a specific event.
We'll have another use for this for runtime event handler
enable/disable.
Ville Syrjälä [Mon, 12 May 2025 10:33:56 +0000 (13:33 +0300)]
drm/i915/dmc: Relocate is_dmc_evt_{ctl,htp}_reg()
Move is_dmc_evt_ctl_reg() to a slightly earlier position in the file
so that we can reuse it in the pkgc workaround code. Also move
is_dmc_evt_htp_reg() just to keep the two together.
Ville Syrjälä [Wed, 14 May 2025 17:42:57 +0000 (20:42 +0300)]
drm/i915/dmc: Hook up PIPEDMC interrupts
Hook up PIPEDMC interrupts. We'll need these for:
- flip queue signalling
- GTT/ATS faults on LNL+
- unclaimed register access errors (supposedly that is what
the error interrupt indicated according to Windows code).
On LNL+ we get a new level of interrupts registers PIPEDMC_INTERRUPT*.
On earlier platforms we only have the INT_VECTOR field in the
PIPEDMC_STATUS registers, whose values are defined by the firmware.
For now we'll enable the interrupts on LNL+ only. For earlier platforms
it's not clear that there is any use for these interrupts, and some
ADL machines have exhibited spurious DE_PIPE interrupts with the
PIPEDMC interrupts unmasked/enabled. We can revisit enabling these
for earlier platforms in the future.
For some unknown reason LNL pipe B triggers the error interrupt
during the first DC state transition (subsequent transitions are
maybe OK?). No clear idea what's going on here yet, so keep the
error interrupt disabled for now.
Similar to DSB interrupt registers, the unused bits in
PIPEDMC_INTERRUPT* seem to act like randomg r/w bits (instead
of being hardwired to 0 like one would expect), and so we'll try
to avoid setting them so that we don't mistake them for real
interrupts.
v2: Only enable/unmask for LNL+
Keep the flip queue interrupt masked off for now since
we don't have a use for it yet
v3: Also keep the error interrupt masked off for now due to
LNL pipe B triggering it
Ville Syrjälä [Mon, 12 May 2025 10:33:52 +0000 (13:33 +0300)]
drm/i915/dmc: Drop PIPEDMC faults from the fault mask on LNL+
On LNL+ PIPEDMC faults are reported via PIPEDMC interrupts
instead of the direct DE_PIPE_* reporting used on earlier
platforms. Drop the relevant bits from the fault mask.
The bits are tied to zero on LNL, so there is no danger of
spurious fault interrupts even with an incorrect mask.
Jani Nikula [Wed, 7 May 2025 15:22:54 +0000 (18:22 +0300)]
drm/{i915,xe}: convert i915 and xe display members into pointers
As the first step towards making struct intel_display an opaque pointer
in i915 and xe drivers, convert the struct drm_i915_private and struct
xe_device display members into pointers.
Initially, add temporary struct intel_display __display members, and
point display at it to avoid dynamic allocation. In the future, we can
drop this, and switch to dynamic allocation.
The conversion is done simply with sed:
sed -i 's/&\([a-zA-Z0-9_>.-]*\)\(dev_priv\|i915\|xe\)->display\([^.]\)/\1\2->display\3/g' \
$(git ls-files -- drivers/gpu/drm/i915 drivers/gpu/drm/xe)
sed -i 's/\(dev_priv\|i915\|xe\)->display\./\1->display->/g' \
$(git ls-files -- drivers/gpu/drm/i915 drivers/gpu/drm/xe)
With a couple of manual tweaks on top.
v2: Initialize i915->display also in selftest mock_gem_device()
1. Prepare for support MT8195/88 HDMIv2 and DDCv2
2. DPI: Cleanups and add support for more formats
3. Cleanups and sanitization
4. Replace custom compare_dev with component_compare_of
Dave Airlie [Thu, 15 May 2025 03:17:01 +0000 (13:17 +1000)]
Merge tag 'drm-misc-next-2025-05-12' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for v6.16-rc1:
Once more, with async flips.
UAPI Changes:
- Add IN_FORMATS_ASYNC property, use in i915.
Cross-subsystem Changes:
- Remove some unused debug code in dma-buf.
Core Changes:
Driver Changes:
- Add Novatek NT37801 panel.
- Allow submitting empty commands in amdxdna.
- Convert cirrus to use managed request_all_regions.
- Move Sitronix from tiny to their own place.
drm/mediatek: mtk_drm_drv: Unbind secondary mmsys components on err
When calling component_bind_all(), if a component that is included
in the list fails, all of those that have been successfully bound
will be unbound, but this driver has two components lists for two
actual devices, as in, each mmsys instance has its own components
list.
In case mmsys0 (or actually vdosys0) is able to bind all of its
components, but the secondary one fails, all of the components of
the first are kept bound, while the ones of mmsys1/vdosys1 are
correctly cleaned up.
This is not right because, in case of a failure, the components
are re-bound for all of the mmsys/vdosys instances without caring
about the ones that were previously left in a bound state.
Fix that by calling component_unbind_all() on all of the previous
component masters that succeeded binding all subdevices when any
of the other masters errors out.
drm/mediatek: Fix kobject put for component sub-drivers
In function mtk_drm_get_all_drm_priv(), this driver is incrementing
the refcount for the sub-drivers of mediatek-drm with a call to
device_find_child() when taking a reference to all of those child
devices.
When the component bind fails multiple times this results in a
refcount_t overflow, as the reference count is never decremented:
fix that by adding a call to put_device() for all of the mmsys
devices in a loop, in error cases of mtk_drm_bind() and in the
mtk_drm_unbind() callback.
drm/mediatek: mtk_drm_drv: Fix kobject put for mtk_mutex device ptr
This driver is taking a kobject for mtk_mutex only once per mmsys
device for each drm-mediatek driver instance, differently from the
behavior with other components, but it is decrementing the kobj's
refcount in a loop and once per mmsys: this is not right and will
result in a refcount_t underflow warning when mediatek-drm returns
multiple probe deferrals in one boot (or when manually bound and
unbound).
Besides that, the refcount for mutex_dev was not decremented for
error cases in mtk_drm_bind(), causing another refcount_t warning
but this time for overflow, when the failure happens not during
driver bind but during component bind.
In order to fix one of the reasons why this is happening, remove
the put_device(xx->mutex_dev) loop from the mtk_drm_kms_init()'s
put_mutex_dev label (and drop the label) and add a single call to
correctly free the single incremented refcount of mutex_dev to
the mtk_drm_unbind() function to fix the refcount_t underflow.
Moreover, add the same call to the error cases in mtk_drm_bind()
to fix the refcount_t overflow.
Imre Deak [Mon, 12 May 2025 14:26:00 +0000 (17:26 +0300)]
drm/i915/ptl: Use everywhere the correct DDI port clock select mask
The PTL XELPDP_PORT_CLOCK_CTL register XELPDP_DDI_CLOCK_SELECT field's
size is 5 bits vs. the earlier platforms where its size is 4 bits. Make
sure the field is read-out/programmed everywhere correctly, according to
the above.
Cc: Mika Kahola <mika.kahola@intel.com> Cc: stable@vger.kernel.org # v6.13+ Tested-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250512142600.824347-1-imre.deak@intel.com
Jani Nikula [Tue, 13 May 2025 09:28:41 +0000 (12:28 +0300)]
drm/i915/pps: drop dependency on intel_display_conversion.h
All the PPS register users have been converted to struct
intel_display. The backward compat conversion to struct drm_i915_private
is no longer needed. Drop it, along with the include, and convert the
dev_priv macro parameter names to display while at it.
projects / thirdparty / linux.git / log
