x86: Rewrite NOP generation for fill and alignment
increased MAX_MEM_FOR_RS_ALIGN_CODE to 4095 which resulted in increase
of assembler time and memory usage by 5 times for inputs with many
.p2align directives, which is typical for LTO output. This patch passes
max_bytes to TC_FRAG_INIT so that MAX_MEM_FOR_RS_ALIGN_CODE can be set
as needed and tracked by backend it so that HANDLE_ALIGN can check the
maximum alignment for each rs_align_code frag. Wall time to assemble
the same cc1plus.s:
before:
423.78user 0.89system 7:05.71elapsed 99%CPU
after:
102.35user 0.27system 1:42.89elapsed 99%CPU
PR gas/24165
* config/tc-i386.h (MAX_MEM_FOR_RS_ALIGN_CODE): Set to
(alignment ? ((1 << alignment) - 1) : 1)
(i386_tc_frag_data): Add max_bytes.
(TC_FRAG_INIT): Track max_chars in max_bytes.
(HANDLE_ALIGN): Replace MAX_MEM_FOR_RS_ALIGN_CODE with
fragP->tc_frag_data.max_bytes.
removed check R_X86_64_PC32 relocation against protected symbols in
shared objects. Since elf_x86_64_check_relocs is called after we
have seen all input files, we can check for PC-relative relocations in
elf_x86_64_check_relocs. We should not allow PC-relative relocations
against protected symbols since address of protected function and
location of protected data may not be in the shared object.
bfd/
PR ld/24151
* elf64-x86-64.c (elf_x86_64_need_pic): Check
SYMBOL_DEFINED_NON_SHARED_P instead of def_regular.
(elf_x86_64_relocate_section): Move PIC check for PC-relative
relocations to ...
(elf_x86_64_check_relocs): Here.
(elf_x86_64_finish_dynamic_symbol): Use SYMBOL_DEFINED_NON_SHARED_P
to check if a symbol is defined in a non-shared object.
* elfxx-x86.h (SYMBOL_DEFINED_NON_SHARED_P): New.
ld/
PR ld/24151
* testsuite/ld-x86-64/pr24151a-x32.d: New file.
* testsuite/ld-x86-64/pr24151a.d: Likewise.
* testsuite/ld-x86-64/pr24151a.s: Likewise.
* testsuite/ld-x86-64/x86-64.exp: Run pr24151a and pr24151a-x32.
Tamar Christina [Thu, 7 Feb 2019 17:12:23 +0000 (17:12 +0000)]
Arm: Backport hlt to all architectures.
The software trap instruction HLT that was introduced in Armv8-a is used
as the semihosting trap instruction in AArch64. In order to allow systems
configured to run AArch64 code to also run AArch32 with semihosting it was
decided that AArch32 should also use HLT in the case of the "mixed mode"
environment. This requires that HLT also be backported to all earlier
architectures. The instruction is in the undefined encoding space earlier
architectures but must trigger a semihosting trap [3].
The Arm Architectural Reference Manual [1] doesn't explicitly mention this
however this is an explicit requirement in the Semihosting-v2 protocol [2].
* config/tc-arm.c (insns): Redefine THUMB_VARIANT and ARM_VARIANT for
hlt to armv1.
* testsuite/gas/arm/armv8a-automatic-hlt.d: Update TAGs
* testsuite/gas/arm/hlt.d: New test.
* testsuite/gas/arm/hlt.s: New test.
Eric Botcazou [Thu, 7 Feb 2019 16:04:31 +0000 (17:04 +0100)]
SPARC: fix PR ld/18841
This fixes the last ld failures on SPARC64/Linux:
FAIL: Run pr18841 with libpr18841b.so
FAIL: Run pr18841 with libpr18841c.so
FAIL: Run pr18841 with libpr18841bn.so (-z now)
FAIL: Run pr18841 with libpr18841cn.so (-z now)
by mimicing what has been done on x86-64 and Aarch64 to fix the PR.
Andreas Krebbel [Thu, 31 Jan 2019 16:01:27 +0000 (17:01 +0100)]
S/390: Implement instruction set extensions
opcodes/ChangeLog:
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
* s390-mkopc.c (main): Accept arch13 as cpu string.
* s390-opc.c: Add new instruction formats and instruction opcode
masks.
* s390-opc.txt: Add new arch13 instructions.
include/ChangeLog:
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
Backport from mainline
2019-01-31 Andreas Krebbel <krebbel@linux.ibm.com>
* config/tc-s390.c (s390_parse_cpu): New entry for arch13.
* doc/c-s390.texi: Document arch13 march option.
* testsuite/gas/s390/s390.exp: Run the arch13 related tests.
* testsuite/gas/s390/zarch-arch13.d: New test.
* testsuite/gas/s390/zarch-arch13.s: New test.
* testsuite/gas/s390/zarch-z13.d: Expect the renamed mnemonics
also for z13.
Alan Modra [Thu, 31 Jan 2019 04:08:45 +0000 (14:38 +1030)]
Assorted warning fixes
gcc-9 flagged warnings at the places I'm patching here, all real bugs.
* config/tc-alpha.c (md_apply_fix): Correct range checks for
BFD_RELOC_ALPHA_NOP, BFD_RELOC_ALPHA_LDA, BFD_RELOC_ALPHA_BSR.
* config/tc-arm.c (md_apply_fix): Use llabs rather than abs.
* config/tc-csky.c (get_macro_reg_vals): Pass s to csky_show_error.
Max Filippov [Sat, 26 Jan 2019 02:52:32 +0000 (18:52 -0800)]
xtensa: gas: don't keep relocations for constants
xtensa gas chokes on 8/16 bit data entries representing constant symbols
because it leaves BFD_RELOC_8/BFD_RELOC_16 fixups for which xtensa BFD
cannot emit relocations. Resolve fixups for constant symbols in
md_apply_fix.
gas/
2019-01-29 Max Filippov <jcmvbkbc@gmail.com>
* config/tc-xtensa.c (md_apply_fix): Mark fixups for constant
symbols as done in md_apply_fix.
* testsuite/gas/all/forward.d: Don't XFAIL for xtensa.
Nick Clifton [Tue, 29 Jan 2019 11:20:02 +0000 (11:20 +0000)]
Fix error in expression evalutation in linker output maps.
PR 24008
* ldexp.h (lang_phase_type): Add lang_fixed_phase_enum.
* ldexp.c (fold_name): Move expld.assign_name check later to
avoid an extra lookup.
(exp_fold_tree_1): When lang_fixed_phase_enum, don't change symbol
values, and don't clear expld.assign_name.
* ldlang.c (lang_map): Set expld.phase to lang_fixed_phase_enum.
(print_assignment): Resolve entire assignment expression.
Don't access symbol u.def unless symbol is defined.
Sudi Das [Fri, 25 Jan 2019 14:28:07 +0000 (14:28 +0000)]
AArch64: Update encodings for stg, st2g, stzg and st2zg.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch updates the st*g instructions
to use a previously reserved field for a new register operand. Thus the
new versions of the instructions are as follows:
Sudi Das [Fri, 25 Jan 2019 14:15:45 +0000 (14:15 +0000)]
AArch64: Add new STZGM instruction for Armv8.5-A Memory Tagging Extension.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch adds the new STZGM instruction.
STGZM Xt, [<Xn|SP>]
Committed on behalf of Sudakshina Das.
*** gas/ChangeLog ***
* testsuite/gas/aarch64/armv8_5-a-memtag.d: New tests for stzgm.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
Sudi Das [Fri, 25 Jan 2019 13:57:14 +0000 (13:57 +0000)]
AArch64: Remove ldgv and stgv instructions from Armv8.5-A Memory Tagging Extension.
This patch is part of a series of patches to introduce a few changes to the
Armv8.5-A Memory Tagging Extension. This patch removes the LDGV and STGV
instructions. These instructions needed special infrastructure to support
[base]! style for addressing mode. That is also removed now.
Committed on behalf of Sudakshina Das.
*** gas/ChangeLog ***
* config/tc-aarch64.c (parse_address_main): Remove support for
[base]! address expression.
(parse_operands): Remove support for AARCH64_OPND_ADDR_SIMPLE_2.
(warn_unpredictable_ldst): Remove support for ldstgv_indexed.
* testsuite/gas/aarch64/armv8_5-a-memtag.d: Remove tests for ldgv
and stgv.
* testsuite/gas/aarch64/armv8_5-a-memtag.s: Likewise.
* testsuite/gas/aarch64/illegal-memtag.l: Likewise.
* testsuite/gas/aarch64/illegal-memtag.s: Likewise.
Tom Tromey [Wed, 16 Jan 2019 14:09:55 +0000 (07:09 -0700)]
Simplify minsym iteration
This simplifies the minimal symbol iterator, by using
minimal_symbol_count and just doing a somewhat ordinary array-like
iteration. array_view is nearly usable, except that it is more
convenient for this iterator to return pointers rather than
references.
gdb/ChangeLog
2019-01-16 Tom Tromey <tom@tromey.com>
Tom Tromey [Thu, 17 Jan 2019 17:19:44 +0000 (10:19 -0700)]
Replace "the the" with "the"
This replaces "the the" with "the" in various comments.
Tested by rebuilding. This didn't test the solib-dsbt.c change, but
it looks harmless.
gdb/ChangeLog
2019-01-17 Tom Tromey <tromey@bapiya>
* valprint.c: Replace "the the" with "the".
* symtab.c: Replace "the the" with "the".
* solib.c: Replace "the the" with "the".
* solib-dsbt.c: Replace "the the" with "the".
* linespec.c: Replace "the the" with "the".
* dwarf2loc.h: Replace "the the" with "the".
* amd64-windows-tdep.c: Replace "the the" with "the".
* aarch64-tdep.c: Replace "the the" with "the".
Tamar Christina [Thu, 17 Jan 2019 16:05:37 +0000 (16:05 +0000)]
Arm: Clean up PE GAS testsuite correct THUMB tests.
The PE targets don't support mapping symbols and so the disassembler is unable
to correctly output thumb instructions when the input was thumb.
So for testcases that only have thumb output, I have copied them and skipped the
ones for which auto-detection is supposed to work on PE, and added a new one
that will force thumb output. This so that the tests still check the mapping
symbols.
For the tests that switch between thumb and arm in one file I just skip them
entirely on PE targets.
Nick Clifton [Thu, 17 Jan 2019 15:29:43 +0000 (15:29 +0000)]
Update objdump's --disassemble=<symbol> feature so that if <symbol> is a function, the entire function will be disassembled, regardless of the presence of interveening symbols.
* objdump.c (disassemble_section): When disassembling from a
symbol only stop at the next symbol if the original symbol was not
a function symbol. Otherwise continue disassembling until a new
function is reached.
* testsuite/binutils-all/objdump.exp: Add tests of extended
functionality.
* testsuite/binutils-all/disasm.s: New test source file.
Simon Marchi [Wed, 16 Jan 2019 22:01:42 +0000 (17:01 -0500)]
Actually remove definitions of DEFINE_NON_INLINE_P and DEFINE_INLINE_P
I applied the patch "Do not expand macros to 'defined'" by hand because
I couldn't apply it with git-am, and of course forgot to remove the
macro definitions. This patch fixes it, and also makes the ChangeLog
entry a bit cleaner.
Jim Wilson [Wed, 16 Jan 2019 21:37:35 +0000 (13:37 -0800)]
Don't emit vendor attribute section if there is no attribute to emit.
2019-01-16 Kito Cheng <kito@andestech.com>
bfd/
* elf-attrs.c (vendor_obj_attr_size): Return 0 if size is 0 even
for OBJ_ATTR_PROC.
gas/
* testsuite/gas/riscv/attribute-empty.d: New.
Keith Seitz [Wed, 16 Jan 2019 19:38:06 +0000 (11:38 -0800)]
Introduce dwarf2_cu::get_builder
This patch is an attempt to deal with a variety of bugs reported where
GDB segfaults attempting to access a dwarf2_cu's builder. In certain
circumstances, this builder can be NULL. This is especially common
when inheriting DIEs via inlined subroutines in other CUs. The test
case demonstrates one such situation reported by users. See gdb/23773,
rhbz1638798, and dups for other concrete examples.
The approach taken here is to save the ancestor CU into the dwarf2_cu of
all CUs with DIEs that are "imported." This can happen whenever
follow_die_offset and friends are called. This essentially introduces a
chain of CUs that caused the importation of a DIE from a CU. Whenever
a builder is requested of a CU that has none, the ancestors are searched
for the first one with a builder.
A design side effect of this is that the builder can now only be
accessed by getter and setter methods because the builder itself
is private.
The bulk of the patch is relatively mindless text conversion from
"cu->builder" to "cu->get_builder ()". I've included one test which
was derived from one (of the many) bugs reported on the issue in both
sourceware and Fedora bugzillas.
gdb/ChangeLog:
PR gdb/23773
* dwarf2read.c (dwarf2_cu) <ancestor>: New field.
<builder>: Rename to ..
<m_builder>: ... this and make private.
(dwarf2_cu::get_builder): New method. Change all users of
`builder' to use this method.
(dwarf2_start_symtab): Move to ...
(dwarf2_cu::start_symtab): ... here. Update all callers
(setup_type_unit_groups): Move to ...
(dwarf2_cu::setup_type_unit_groups): ... here. Update all
callers.
(dwarf2_cu::reset_builder): New method.
(process_full_compunit, process_full_type_unit): Use
dwarf2_cu::reset_builder.
(follow_die_offset): Record the ancestor CU if it is different
from the followed DIE's CU.
(follow_die_sig_1): Likewise.
gdb/testsuite/ChangeLog:
PR gdb/23773
* gdb.dwarf2/inlined_subroutine-inheritance.exp: New file.
Simon Marchi [Wed, 16 Jan 2019 19:32:13 +0000 (14:32 -0500)]
doc: Add table of MI versions
This patch adds a table summarizing the history or MI versions:
- The version number
- Which GDB version introduced it
- Breaking changes compared to the previous version
The goal of the table is to help writers of front ends know which
version of MI they can use with a given GDB version. It will also help
them update their code to work against a newer MI version.
Right now, we just have 1 and 2, but we expect to add an entry for 3
soon. I did a bit of archelogy and reverse engineering of the code to
come up with the breaking changes for MI 2.
I did some changes to the text around it, some things that I thought
needed to be clarified, seemed a bit dated or seemed just wrong
(especially "Apart from mi0, new versions of @value{GDBN} will not
support old versions of MI").
gdb/doc/ChangeLog:
* gdb.texinfo (GDB/MI Development and Front Ends): Add table of
MI versions. Update text around it.
John Darrington [Mon, 14 Jan 2019 15:55:17 +0000 (16:55 +0100)]
S12Z: gas: Fix bug when a symbol name was the single letter 'c'.
The assembler incorrectly recognised "c" as a register name, and
refused to allow it where it expected a symbol/label.
gas/
* config/tc-s12z.c (lex_reg_name): Compare the length of the strings
before the contents.
* testsuite/gas/s12z/labels.d: New file.
* testsuite/gas/s12z/labels.s: New file.
* testsuite/gas/s12z/s12z.exp: Add them.
John Darrington [Wed, 16 Jan 2019 13:34:50 +0000 (14:34 +0100)]
S12Z: gas: Permit "extend" instructions which don't actually extend.
Other assemblers permit "extending" a register into a register of a
smaller size or the same size. It doesn't make much sense to do this
but would appear to be a valid instruction. So change the error to a
warning.
gas/
* config/tc-s12z.c (tfr): Change as_bad to as_warn.
Also fix message typo and semantics.
John Darrington [Wed, 16 Jan 2019 13:34:50 +0000 (14:34 +0100)]
S12Z: Emit RELOC_S12Z_OPR instead of RELOC_EXT24 where appropriate.
When assembling instructions which involve OPR references, emit
RELOC_S12Z_OPR instead of RELOC_EXT24.
bfd/
* bfd-in2.h [BFD_RELOC_S12Z_OPR]: New reloc.
* libbfd.h: regen.
* elf32-s12z.c (eld_s12z_howto_table): R_S12Z_OPR takes non zero
source field. (md_apply_fix): Apply final fix
to BFD_RELOC_S12Z_OPR.
* reloc.c[BFD_RELOC_S12Z_OPR]: New reloc.
gas/
* config/tc-s12z.c (emit_opr): Emit BFD_RELOC_S12Z_OPR instead of
BFD_RELOC_24.
* testsuite/gas/s12z/opr-indirect-expr.d: Expect R_S12Z_OPR instead
of R_S12Z_EXT24.
Simon Marchi [Tue, 15 Jan 2019 22:45:39 +0000 (17:45 -0500)]
sim: Fix definition of SIM_ARANGE_INLINE
If HAVE_INLINE is false, SIM_ARANGE_INLINE is currently defined as
#define SIM_ARANGE_INLINE EXTERN
However, EXTERN is not defined anywhere, leading to errors such as:
In file included from
/mipt-mips/simulator/../../sim/common/sim-basics.h:147:0,
from /mipt-mips/simulator/export/gdb/sim-main.h:13,
from /mipt-mips/simulator/export/gdb/gdb_interface.cpp:7:
/mipt-mips/simulator/../../sim/common/sim-arange.h:71:27: error: ‘EXTERN’
does not name a type; did you mean ‘EUSERS’?
#define SIM_ARANGE_INLINE EXTERN
^
/mipt-mips/simulator/../../sim/common/sim-arange.h:76:1: note: in expansion
of macro ‘SIM_ARANGE_INLINE’
SIM_ARANGE_INLINE int
^~~~~~~~~~~~~~~~~
I (Simon) have reproduced the problem by simply removing the HAVE_INLINE
definition. This was originally reported by Pavel I. Kryukov
<kryukov@frtk.ru>.
sim/common/ChangeLog:
* sim-arange.h (SIM_ARANGE_INLINE): Change EXTERN to extern.
Tom Tromey [Sun, 6 Jan 2019 18:15:05 +0000 (11:15 -0700)]
Remove cleanup from remote.c
This removes the remaining cleanup from remote.c, by changing
remote_state::buf to be a gdb::char_vector, and then fixing up all the
fallout. The resulting patch is somewhat ugly, but on the other hand,
it eliminates some possibilities for mistakes.
Regression tested using the
Fedora-x86_64-native-extended-gdbserver-m64 builder on the buildbot.
gdb/ChangeLog
2019-01-15 Tom Tromey <tom@tromey.com>
* remote.c (class remote_state) <buf>: Now a char_vector.
<buf_size>: Remove.
(remote_target::getpkt): Change type of buf. Remove sizeof_buf
parameter.
(remote_target::getpkt_or_notif_sane_1)
(remote_target::getpkt_sane)
(remote_target::getpkt_or_notif_sane): Likewise.
(class remote_target) <putpkt>: New overload.
(remote_target::read_frame): Change type of "buf_p". Remove
sizeof_p parameter.
(packet_ok): New overload.
(packet_check_result): New overload.
Update all uses.
Tom Tromey [Sat, 12 Jan 2019 20:35:06 +0000 (13:35 -0700)]
Fix placement of output in TUI mode
The fix for PR tui/28819 regressed gdb command output a bit. In
"nonl" mode, pressing the Enter key will result in a newline not being
echoed properly, so that gdb output for the command will begin on the
same line as the input.
This patch changes gdb_wgetch to echo the newline. I have only tested
this interactively, as the TUI doesn't have automated tests in
general.
gdb/ChangeLog
2019-01-14 Tom Tromey <tom@tromey.com>
PR tui/28819:
* tui/tui-io.c (gdb_wgetch): Print \r when needed.
This patch defines pseudo-registers "v0" through "v31" as aliases that
map to the corresponding raw "vr0" through "vr31" vector registers for
Power.
The motivation behind this is that although GDB defines these
registers as "vrX", the disassembler prints them as "vX", e.g. as the
operands in instructions such as "vaddubm v2,v1,v1". This can be
confusing to users trying to print out the values of the operands
while inspecting the disassembled code.
The new aliases are made not to belong to any register group, to avoid
duplicated values in "info register vector" and "info register all".
The arch-specific rs6000_pseudo_register_reggroup_p function had
previously been removed since the other pseudo-registers could have
their groups inferred by their type. It restored with this patch to
handle the aliases. Membership for the other pseudo-registers is
still determined using the default function.
A new tests checks that GDB prints the expected values of vector
registers after they are filled by the inferior, by using both the raw
names and the aliases. Two other existing tests are modified to also
test the aliases.
gdb/ChangeLog:
2019-01-14 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* ppc-tdep.h (struct gdbarch_tdep) <ppc_v0_alias_regnum>: New
field.
* rs6000-tdep.c: Include reggroups.h.
(IS_V_ALIAS_PSEUDOREG): Define.
(rs6000_register_name): Return names for the "vX" aliases.
(rs6000_pseudo_register_type): Return type for the "vX" aliases.
(rs6000_pseudo_register_reggroup_p): Restore. Handle "vX"
aliases. Call default_register_reggroup_p for all other
pseudo-registers.
(v_alias_pseudo_register_read, v_alias_pseudo_register_write):
New functions.
(rs6000_pseudo_register_read, rs6000_pseudo_register_write):
Handle "vX" aliases.
(v_alias_pseudo_register_collect): New function.
(rs6000_ax_pseudo_register_collect): Handle "vX" aliases.
(rs6000_gdbarch_init): Initialize "vX" aliases as
pseudo-registers. Restore registration of
rs6000_pseudo_register_reggroup_p with
set_tdesc_pseudo_register_reggroup_p.
gdb/testsuite/ChangeLog:
2019-01-14 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.arch/vsx-regs.exp: Add tests that use the vector register
aliases.
* gdb.arch/altivec-regs.exp: Likewise. Fix indentation of two
tests.
* gdb.arch/powerpc-vector-regs.c: New file.
* gdb.arch/powerpc-vector-regs.exp: New file.
gdb/doc/ChangeLog:
2019-01-14 Pedro Franco de Carvalho <pedromfc@linux.ibm.com>
* gdb.texinfo (PowerPC Features): Document the alias
pseudo-registers for the org.gnu.gdb.power.altivec feature.
Maamoun Tarsha [Mon, 14 Jan 2019 16:00:14 +0000 (16:00 +0000)]
Add support to GNU ld to separate got related plt entries from normal ones in order to be able to switch the non-plt got entries to read-only after startup, conforming to revised Linux for zSeries ABI.
Max Filippov [Sat, 17 Nov 2018 01:31:22 +0000 (17:31 -0800)]
gdb: xtensa: fix register counters for xtensa-linux
Commit 37d9e0623102 ("gdb: xtensa: handle privileged registers") changed
how the tdep->num_regs and tdep->num_pseudo_regs are calculated, but
didn't update these numbers in the gdbarch for the xtensa-linux target.
As a result xtensa-linux-gdb behaves as xtensa-elf-gdb and cannot
communicate with the linux gdbserver.
Fix tdep->num_pseudo_regs calculation and call set_gdbarch_num_regs and
set_gdbarch_num_pseudo_regs in xtensa_linux_init_abi.
gdb/
2019-01-13 Max Filippov <jcmvbkbc@gmail.com>
* xtensa-linux-tdep.c (xtensa_linux_init_abi): Update
tdep->num_pseudo_regs. Add calls to set_gdbarch_num_regs and
set_gdbarch_num_pseudo_regs.
projects / thirdparty / binutils-gdb.git / log
