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4 months agogccrs: Add debug dump to old name resolver
Pierre-Emmanuel Patry [Wed, 11 Dec 2024 13:19:44 +0000 (14:19 +0100)] 
gccrs: Add debug dump to old name resolver

It might be necessary to compare both name resolution' internal states
during the transition. This new debug representation could help with
that.

gcc/rust/ChangeLog:

* resolve/rust-name-resolver.h: Add new degug dump for old name
resolver.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
4 months agogccrs: Labels shall be pushed within label namespace
Pierre-Emmanuel Patry [Wed, 11 Dec 2024 11:04:32 +0000 (12:04 +0100)] 
gccrs: Labels shall be pushed within label namespace

Labels were using the wrong namespace.

gcc/rust/ChangeLog:

* resolve/rust-ast-resolve-expr.cc (ResolveExpr::visit): Change label
push function from type rib to label rib.
* resolve/rust-ast-resolve-item.cc (ResolveTraitItems::visit):
Likewise.
(ResolveItem::visit): Likewise.
(ResolveExternItem::visit): Likewise.
* resolve/rust-ast-resolve-stmt.h: Likewise.
* resolve/rust-ast-resolve.cc (NameResolution::go): Likewise.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
4 months agogccrs: backend: Improve handling of lang-item PathInExpressions
Arthur Cohen [Fri, 24 Jan 2025 09:42:54 +0000 (10:42 +0100)] 
gccrs: backend: Improve handling of lang-item PathInExpressions

gcc/rust/ChangeLog:

* backend/rust-compile-resolve-path.cc (ResolvePathRef::visit): Call into
resolve_path_like instead.
(ResolvePathRef::resolve_path_like): New.
(ResolvePathRef::resolve): Call into resolve_with_node_id.
* backend/rust-compile-resolve-path.h: Declare new functions and document them.

4 months agogccrs: ast: Add Path::is_lang_item()
Arthur Cohen [Wed, 22 Jan 2025 16:52:26 +0000 (16:52 +0000)] 
gccrs: ast: Add Path::is_lang_item()

gcc/rust/ChangeLog:

* ast/rust-path.h: New function.

4 months agogccrs: marklive: Fix handling for lang item PathInExpressions.
Arthur Cohen [Tue, 24 Dec 2024 11:45:25 +0000 (11:45 +0000)] 
gccrs: marklive: Fix handling for lang item PathInExpressions.

gcc/rust/ChangeLog:

* checks/lints/rust-lint-marklive.cc (MarkLive::visit): Adapt to lang items.

4 months agogccrs: hir: Adapt visitors to lang item PathInExpressions
Arthur Cohen [Wed, 22 Jan 2025 12:36:59 +0000 (12:36 +0000)] 
gccrs: hir: Adapt visitors to lang item PathInExpressions

gcc/rust/ChangeLog:

* backend/rust-compile-resolve-path.cc (ResolvePathRef::visit): Adapt visitor to lang item
HIR::PathInExpressions.
* typecheck/rust-hir-type-check-path.cc (TypeCheckExpr::visit): Likewise.

4 months agogccrs: hir: Add LangItem paths to PathPattern class
Arthur Cohen [Mon, 16 Dec 2024 12:01:13 +0000 (13:01 +0100)] 
gccrs: hir: Add LangItem paths to PathPattern class

gcc/rust/ChangeLog:

* hir/tree/rust-hir-path.h: Adapt PathPattern to accept lang-item paths.
* hir/tree/rust-hir-path.cc: Assert we are dealing with a segmented path, create lang-item
constructors.
* hir/tree/rust-hir.cc (PathPattern::convert_to_simple_path): Likewise.

4 months agogccrs: ast: More visitors to allow lang item paths in expressions
Arthur Cohen [Wed, 22 Jan 2025 14:09:08 +0000 (14:09 +0000)] 
gccrs: ast: More visitors to allow lang item paths in expressions

gcc/rust/ChangeLog:

* ast/rust-ast-collector.cc (TokenCollector::visit): Adapt visitor to lang item
PathInExpressions.
* ast/rust-ast-visitor.cc (DefaultASTVisitor::visit): Likewise.
* expand/rust-cfg-strip.cc (CfgStrip::visit): Likewise.
* expand/rust-expand-visitor.cc (ExpandVisitor::visit): Likewise.
* hir/rust-ast-lower.cc (ASTLoweringExprWithBlock::visit): Likewise.
(ASTLowerPathInExpression::visit): Likewise.
* resolve/rust-ast-resolve-path.cc (ResolvePath::resolve_path): Likewise.
* resolve/rust-early-name-resolver.cc (EarlyNameResolver::visit): Likewise.

4 months agogccrs: lang-items: Add LangItem::IsEnumVariant
Arthur Cohen [Mon, 23 Dec 2024 16:43:35 +0000 (16:43 +0000)] 
gccrs: lang-items: Add LangItem::IsEnumVariant

gcc/rust/ChangeLog:

* util/rust-lang-item.cc (LangItem::IsEnumVariant): New function.
* util/rust-lang-item.h: Declare it.

4 months agogccrs: mappings: Improve error message for get_lang_item_node
Arthur Cohen [Wed, 22 Jan 2025 12:37:58 +0000 (12:37 +0000)] 
gccrs: mappings: Improve error message for get_lang_item_node

gcc/rust/ChangeLog:

* util/rust-hir-map.cc (Mappings::get_lang_item_node): Better formatting when a lang
item does not exist when it should.

4 months agogccrs: lang-items: Collect enum variants as lang items
Arthur Cohen [Mon, 23 Dec 2024 10:27:13 +0000 (10:27 +0000)] 
gccrs: lang-items: Collect enum variants as lang items

gcc/rust/ChangeLog:

* ast/rust-collect-lang-items.h: Declare visitor.
* ast/rust-collect-lang-items.cc (CollectLangItems::visit): New.

4 months agogccrs: catch missing guard for optional result
Philip Herron [Tue, 21 Jan 2025 17:19:13 +0000 (17:19 +0000)] 
gccrs: catch missing guard for optional result

When we lookup here it returns an optional which can lead to a crash
because it needs a guard if it has a value.

gcc/rust/ChangeLog:

* backend/rust-compile-resolve-path.cc (HIRCompileBase::query_compile): add guard

gcc/testsuite/ChangeLog:

* rust/compile/nr2/exclude: these tests now work it seems

Signed-off-by: Philip Herron <herron.philip@googlemail.com>
4 months agogccrs: Infer crate name after file opening
Dylan Gardner [Thu, 29 Aug 2024 11:43:42 +0000 (04:43 -0700)] 
gccrs: Infer crate name after file opening

Fixes #3129.

gcc/rust/ChangeLog:

* rust-session-manager.cc (Session::handle_crate_name): Remove
crate name inference
(Session::compile_crate): Add crate name inference and error if
inferred name is empty. Remove CompileOptions::get_instance ()
that returned a local copy of the options. Rename
crate_name_changed to crate_name_found to match semantics.
(rust_crate_name_validation_test): Test inferring ".rs" name
* rust-session-manager.h: Modify handle_crate_name definition to
include filename.

4 months agogccrs: Add captures for ClosureExprInnerTyped with nr2
Pierre-Emmanuel Patry [Fri, 24 Jan 2025 15:02:10 +0000 (16:02 +0100)] 
gccrs: Add captures for ClosureExprInnerTyped with nr2

Captures were only processed for regular ClosureExprInner.

gcc/rust/ChangeLog:

* resolve/rust-late-name-resolver-2.0.cc (Late::visit): Add
ClosureExprInnerTyped visit implementation.
(add_captures): Add a function to avoid code duplication.
* resolve/rust-late-name-resolver-2.0.h: Add function prototype.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
4 months agogccrs: Add environment capture to NR2
Pierre-Emmanuel Patry [Mon, 20 Jan 2025 12:49:25 +0000 (13:49 +0100)] 
gccrs: Add environment capture to NR2

The compiler was still relying on NR1 for closure captures when using nr2
even though the resolver was not used and thus it's state empty.

gcc/rust/ChangeLog:

* resolve/rust-late-name-resolver-2.0.cc (Late::visit): Add environment
collection.
* resolve/rust-late-name-resolver-2.0.h: Add function prototype.
* resolve/rust-name-resolver.cc (Resolver::get_captures): Add assertion
to prevent NR2 usage with nr1 capture functions.
* typecheck/rust-hir-type-check-expr.cc (TypeCheckExpr::visit): Use
nr2 captures.
* util/rust-hir-map.cc (Mappings::add_capture): Add function to
register capture for a given closure.
(Mappings::lookup_captures):  Add a function to lookup all captures
available for a given closure.
* util/rust-hir-map.h: Add function prototypes.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
4 months agogccrs: Check for type paths nr2.0 can't handle yet
Owen Avery [Tue, 21 Jan 2025 22:02:35 +0000 (17:02 -0500)] 
gccrs: Check for type paths nr2.0 can't handle yet

Some of our tests only work with name resolution 2.0 because the latter
misinterprets type paths. This change should cause the compiler to error out
if it would otherwise misinterpret a type path. A fix for type path
resolution isn't included in this comment, since doing so would make it
harder to track the meaningfulness of test regressions.

gcc/rust/ChangeLog:

* resolve/rust-late-name-resolver-2.0.cc
(Late::visit): Error out if a type path has multiple segments,
as we currently ignore every segment except the last.

gcc/testsuite/ChangeLog:

* rust/compile/nr2/exclude: Add entries.

Signed-off-by: Owen Avery <powerboat9.gamer@gmail.com>
4 months agogccrs: backend: Allow anything as a match scrutinee
Arthur Cohen [Tue, 24 Dec 2024 11:45:09 +0000 (11:45 +0000)] 
gccrs: backend: Allow anything as a match scrutinee

gcc/rust/ChangeLog:

* backend/rust-compile-expr.cc (check_match_scrutinee): Allow anything to be used as a
match scrutinee, not just ADTs.

4 months agogccrs: lang-items: Add Result and Try lang items
Arthur Cohen [Tue, 21 Jan 2025 15:13:11 +0000 (16:13 +0100)] 
gccrs: lang-items: Add Result and Try lang items

gcc/rust/ChangeLog:

* util/rust-lang-item.h: Add handling for Result::Ok, Result::Err, Try, Try::into_result,
Try::from_ok, Try::from_err.
* util/rust-lang-item.cc: Likewise.

gcc/testsuite/ChangeLog:

* rust/compile/try-trait.rs: New test.

4 months agogccrs: Fix rust breakage with nr2
Pierre-Emmanuel Patry [Mon, 25 Nov 2024 17:04:06 +0000 (18:04 +0100)] 
gccrs: Fix rust breakage with nr2

Nr2 did not emit the correct error message for break identifier "rust".

gcc/rust/ChangeLog:

* resolve/rust-late-name-resolver-2.0.cc (Late::visit): Add "rust"
identifier detection akin to nr1.
(funny_ice_finalizer): Copy ICE finalizer from nr1.
* resolve/rust-late-name-resolver-2.0.h: Add funny_error member
context state.
* Make-lang.in: Add new translation unit for new ice finalizer.
* resolve/rust-ast-resolve-expr.cc: Move ice
finalizer to it's own file.
* resolve/rust-ice-finalizer.cc: New file.
* resolve/rust-ice-finalizer.h: New file.

gcc/testsuite/ChangeLog:

* rust/compile/nr2/exclude: Remove break-rust3.rs from exclude list.

Signed-off-by: Pierre-Emmanuel Patry <pierre-emmanuel.patry@embecosm.com>
4 months agogccrs: derive(Copy): Improve bounds when deriving Copy
Arthur Cohen [Thu, 16 Jan 2025 13:46:06 +0000 (14:46 +0100)] 
gccrs: derive(Copy): Improve bounds when deriving Copy

gcc/rust/ChangeLog:

* expand/rust-derive-copy.cc: Always add an extra Copy bound on generic Copy impls.

4 months agogccrs: derive(Clone): Use lang item bounds on AssertParamIsCopy
Arthur Cohen [Mon, 20 Jan 2025 11:36:53 +0000 (11:36 +0000)] 
gccrs: derive(Clone): Use lang item bounds on AssertParamIsCopy

gcc/rust/ChangeLog:

* expand/rust-derive-clone.cc (DeriveClone::visit_union): Use lang items for Copy and
Sized bounds.

gcc/testsuite/ChangeLog:

* rust/compile/derive_macro6.rs: Add lang item attribute to Copy trait.

4 months agogccrs: derive(Clone): Add Clone bound on generated impl blocks
Arthur Cohen [Wed, 15 Jan 2025 13:00:45 +0000 (13:00 +0000)] 
gccrs: derive(Clone): Add Clone bound on generated impl blocks

gcc/rust/ChangeLog:

* expand/rust-derive-clone.cc: Add extra bound when deriving generic Clone

4 months agogccrs: ast-builder: Add extra parameter for TypeParam builder
Arthur Cohen [Wed, 15 Jan 2025 12:59:51 +0000 (12:59 +0000)] 
gccrs: ast-builder: Add extra parameter for TypeParam builder

gcc/rust/ChangeLog:

* ast/rust-ast-builder.cc (Builder::new_type_param): Add optional extra trait bounds.
* ast/rust-ast-builder.h: Likewise.

4 months agogccrs: hir-dump: Improve handling of typepathsegments that are lang items.
Arthur Cohen [Wed, 15 Jan 2025 12:58:53 +0000 (12:58 +0000)] 
gccrs: hir-dump: Improve handling of typepathsegments that are lang items.

gcc/rust/ChangeLog:

* hir/rust-hir-dump.cc (Dump::do_typepathsegment): Add handling for lang items.

4 months agogccrs: lang-item:Add LangItem::Kind::RECEIVER
lishin [Mon, 20 Jan 2025 17:53:18 +0000 (17:53 +0000)] 
gccrs: lang-item:Add LangItem::Kind::RECEIVER

Add and implement a lang item (receiver) in source code.

gcc/rust/ChangeLog:

* util/rust-lang-item.cc: Add receiver to map.
* util/rust-lang-item.h: Define LangItem::Kind::RECEIVER.

gcc/testsuite/ChangeLog:

* rust/compile/issue-2954.rs: New test.

Signed-off-by: lishin <lishin1008@gmail.com>
4 months agogccrs: typecheck: Add basic handling for applying auto trait bounds
Arthur Cohen [Thu, 16 Jan 2025 16:10:02 +0000 (17:10 +0100)] 
gccrs: typecheck: Add basic handling for applying auto trait bounds

gcc/rust/ChangeLog:

* hir/rust-ast-lower-item.cc (ASTLoweringItem::visit): Register auto traits in mappings.
* util/rust-hir-map.cc (Mappings::insert_auto_trait): New.
(Mappings::get_auto_traits): New.
* util/rust-hir-map.h: Declare them.
* typecheck/rust-tyty-bounds.cc (TypeBoundsProbe::scan): Add auto trait bounds when
scanning.

gcc/testsuite/ChangeLog:

* rust/compile/nr2/exclude: Some parts of nr2.0 can't handle auto traits yet.
* rust/compile/auto_traits3.rs: Removed in favor of...
* rust/compile/auto_traits2.rs: ...this one.
* rust/compile/auto_traits4.rs: New test.

4 months agogccrs: typecheck: Separate assemble_builtin_candidate in two
Arthur Cohen [Thu, 16 Jan 2025 15:55:56 +0000 (16:55 +0100)] 
gccrs: typecheck: Separate assemble_builtin_candidate in two

This paves the way for adding trait bounds that aren't necessarily Sized.

gcc/rust/ChangeLog:

* typecheck/rust-tyty-bounds.cc (TypeBoundsProbe::add_trait_bound): New function.
* typecheck/rust-hir-type-bounds.h: Declare it.
(TypeBoundsProbe::assemble_builtin_candidate): Call into add_trait_bound.

4 months agolibstdc++: Ensure that std::vector<bool> allocator has bool value_type
Jonathan Wakely [Fri, 21 Mar 2025 22:49:44 +0000 (22:49 +0000)] 
libstdc++: Ensure that std::vector<bool> allocator has bool value_type

This is the subject of LWG 4228 which notes that libstdc++ doesn't
enforce this requirement. That's just a bug because I forgot to add it
to vector<bool> when adding it elsewhere.

For consistency with the other containers we should not allow incorrect
allocator types for strict -std=c++NN modes, but it is very late to make
that change for GCC 15 so this only enables the assertion for C++20
(where it's required). For GCC 16 we can enable it for strict modes too.

libstdc++-v3/ChangeLog:

* include/bits/stl_bvector.h (vector<bool, A>): Enforce the
C++20 requirement that the allocator's value_type matches the
container.
* testsuite/23_containers/vector/bool/cons/from_range.cc: Fix
incorrect allocator type.

Reviewed-by: Tomasz KamiƄski <tkaminsk@redhat.com>
4 months agoarm: testsuite: tighten scan-assembler in unaligned-memcpy-4.c
Richard Earnshaw [Mon, 24 Mar 2025 11:22:05 +0000 (11:22 +0000)] 
arm: testsuite: tighten scan-assembler in unaligned-memcpy-4.c

The scan-assembler-not pattern in this test was too broad and matched
the 'unaligned' from the .file directive from the file name.  Tighten it
to require a leading comment character.

gcc/testsuite:

* gcc.target/arm/unaligned-memcpy-4.c: Tighten scan-assembler-not
pattern.

4 months agoAdd 'libgomp.c++/pr96835-1{,-O0}.C', 'libgomp.oacc-c++/pr96835-1.C' [PR96835]
Thomas Schwinge [Tue, 8 Oct 2024 07:59:45 +0000 (09:59 +0200)] 
Add 'libgomp.c++/pr96835-1{,-O0}.C', 'libgomp.oacc-c++/pr96835-1.C' [PR96835]

PR libgomp/96835
libgomp/
* testsuite/libgomp.c++/pr96835-1.C: New.
* testsuite/libgomp.c++/pr96835-1-O0.C: Likewise.
* testsuite/libgomp.oacc-c++/pr96835-1.C: Likewise.

4 months agoAdd 'libgomp.c++/pr101544-1{,-O0}.C', 'libgomp.oacc-c++/pr101544-1.C' [PR101544]
Thomas Schwinge [Tue, 12 Jul 2022 07:59:10 +0000 (09:59 +0200)] 
Add 'libgomp.c++/pr101544-1{,-O0}.C', 'libgomp.oacc-c++/pr101544-1.C' [PR101544]

PR target/101544
libgomp/
* testsuite/libgomp.c++/pr101544-1.C: New.
* testsuite/libgomp.c++/pr101544-1-O0.C: Likewise.
* testsuite/libgomp.oacc-c++/pr101544-1.C: Likewise.

4 months agonvptx: In offloading compilation, special-case certain host-setup symbol aliases...
Thomas Schwinge [Thu, 20 Mar 2025 13:21:26 +0000 (14:21 +0100)] 
nvptx: In offloading compilation, special-case certain host-setup symbol aliases [PR101544]

Namely, use PTX '.alias' even for (default) '-mno-alias' if the host made the
C++ "base and complete [cd]tor aliases".

PR target/101544
gcc/
* config/nvptx/nvptx.cc (nvptx_asm_output_def_from_decls)
[ACCEL_COMPILER]: Special-case certain host-setup symbol aliases.
* varasm.cc (do_assemble_alias) [ACCEL_COMPILER]: Adjust.

4 months agonvptx: Default at least to '-mptx=6.3'
Thomas Schwinge [Thu, 20 Mar 2025 13:21:26 +0000 (14:21 +0100)] 
nvptx: Default at least to '-mptx=6.3'

gcc/
* config/nvptx/nvptx.cc (default_ptx_version_option): Default at
least to '-mptx=6.3'.
* doc/invoke.texi (Nvidia PTX Options): Update '-mptx=[...]'.
gcc/testsuite/
* gcc.target/nvptx/march-map=sm_30.c: Adjust.
* gcc.target/nvptx/march-map=sm_32.c: Likewise.
* gcc.target/nvptx/march-map=sm_35.c: Likewise.
* gcc.target/nvptx/march-map=sm_37.c: Likewise.
* gcc.target/nvptx/march-map=sm_50.c: Likewise.
* gcc.target/nvptx/march=sm_30.c: Likewise.
* gcc.target/nvptx/march=sm_35.c: Likewise.
* gcc.target/nvptx/march=sm_37.c: Likewise.

4 months agoi386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10...
Haochen Jiang [Mon, 24 Mar 2025 06:24:39 +0000 (14:24 +0800)] 
i386: Raise deprecate warning for -mavx10.1-256/512 and -mevex512 while add -mavx10.1 back with 512 bit alias

When AVX10.1 options are added into GCC 14, E-core is supposed to
support up to 256 bit vector width, while P-core up to 512 bit vector
width. Therefore, we added avx10.1-256 and avx10.1-512 options into
compiler since there will be real platforms with 256 bit only support.
At the same time, for old platforms could also compile a 256 bit only
binary, we introduced -mno-evex512 to disable 512 bit vector.

However, all the future platforms will now support 512 bit vector width,
including P-core and E-core. It will result in no need for split the
option for vector width. Therefore, we will remove them in this patch.
Unlike AVX10.2 options, AVX10.1 options has been there in a major
release, so we have to raise a deprecate warning in GCC 15 and remove
them in GCC 16. At the same time, to align with avx10.2 options, we will
add just removed avx10.1 option back with warning to mention its
behavior change.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h
(get_available_features): Change to FEATURE_AVX10_1.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AVX10_1_512_SET): Renamed to ...
(OPTION_MASK_ISA2_AVX10_1_SET): ... this.
(OPTION_MASK_ISA2_AVX10_2_SET): Use renamed macro.
(OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
(ix86_handle_option): Ditto.
(processor_alias_table): Use P_PROC_AVX10_1.
* common/config/i386/i386-cpuinfo.h
(enum feature_priority): Rename from AVX10_1_512 to AVX10_1.
(enum processor_features): Ditto.
* common/config/i386/i386-isas.h: Add avx10.1.
* config/i386/driver-i386.cc
(host_detect_local_cpu): Use renamed enum.
* config/i386/i386-c.cc
(ix86_target_macros_internal): Rename to avx10.1.
* config/i386/i386-isa.def (AVX10_1_512): Rename to ...
(AVX10_1): ... this.
* config/i386/i386-options.cc (isa2_opts): Rename to avx10.1.
(ix86_valid_target_attribute_inner_p): Add avx10.1.
(ix86_option_override_internal): Rename to AVX10_1.
Revise warnings to mention behavior change for option
combination in GCC 16.
* config/i386/i386.h (PTA_DIAMONDRAPIDS): Use AVX10_1.
* config/i386/i386.opt: Add avx10.1.
Add deprecate warnings for mevex512 and mavx10.1-256/512.
* config/i386/i386.opt.urls: Add avx10.1.
* doc/extend.texi: Ditto.
* doc/sourcebuild.texi: Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx10-check.h: Change to avx10.1.
* gcc.target/i386/avx10_1-1.c: Add warning check.
* gcc.target/i386/avx10_1-10.c: Ditto.
* gcc.target/i386/avx10_1-11.c: Ditto.
* gcc.target/i386/avx10_1-12.c: Ditto.
* gcc.target/i386/avx10_1-13.c: Ditto.
* gcc.target/i386/avx10_1-15.c: Ditto.
* gcc.target/i386/avx10_1-16.c: Ditto.
* gcc.target/i386/avx10_1-18.c: Ditto.
* gcc.target/i386/avx10_1-19.c: Ditto.
* gcc.target/i386/avx10_1-2.c: Ditto.
* gcc.target/i386/avx10_1-20.c: Ditto.
* gcc.target/i386/avx10_1-21.c: Ditto.
* gcc.target/i386/avx10_1-22.c: Ditto.
* gcc.target/i386/avx10_1-23.c: Ditto.
* gcc.target/i386/avx10_1-26.c: Ditto.
* gcc.target/i386/avx10_1-3.c: Ditto.
* gcc.target/i386/avx10_1-4.c: Ditto.
* gcc.target/i386/avx10_1-7.c: Ditto.
* gcc.target/i386/avx10_1-8.c: Ditto.
* gcc.target/i386/avx10_1-9.c: Ditto.
* gcc.target/i386/noevex512-1.c: Ditto.
* gcc.target/i386/noevex512-2.c: Ditto.
* gcc.target/i386/pr111068.c: Ditto.
* gcc.target/i386/pr111907.c: Ditto.
* gcc.target/i386/pr117240_avx512f.c: Ditto.
* gcc.target/i386/pr117304-1.c: Ditto.
* gcc.target/i386/pr117946.c: Ditto.
* gcc.target/i386/avx10_1-24.c: Removed.
* gcc.target/i386/avx10_1-25.c: Removed.
* gcc.target/i386/avx10_1-5.c: Removed.
* gcc.target/i386/avx10_1-6.c: Removed.

4 months agoi386: Remove avx10.2-256 and avx10.2-512 options
Haochen Jiang [Mon, 24 Mar 2025 06:24:36 +0000 (14:24 +0800)] 
i386: Remove avx10.2-256 and avx10.2-512 options

When AVX10.2 options are added into GCC 15, E-core is supposed to
support up to 256 bit vector width, while P-core up to 512 bit vector
width. Therefore, we added avx10.2-256 and avx10.2-512 options into
compiler since there will be real platforms with 256 bit only support.

However, all the future platforms will now support 512 bit vector width,
including P-core and E-core. It will result in no need for split the
option for vector width. Therefore, we will remove them in this patch.

gcc/ChangeLog:

* common/config/i386/cpuinfo.h
(get_available_features): Revise the logic AVX10 version.
* common/config/i386/i386-common.cc
(OPTION_MASK_ISA2_AVX10_2_256_SET): Removed.
(OPTION_MASK_ISA2_AVX10_2_512_SET): Ditto.
(OPTION_MASK_ISA2_AVX10_2_SET): New.
(OPTION_MASK_ISA2_AMX_AVX512_SET): Use AVX10.2 macro.
(OPTION_MASK_ISA2_AVX10_2_UNSET): Ditto.
(ix86_handle_option): Remove avx10.2-256 part. Adjust avx10.2.
* common/config/i386/i386-cpuinfo.h
(enum processor_features): Remove FEATURE_AVX10_2_256 and skip
the value for it. Change the name from FEATURE_AVX10_2_512 to
FEATURE_AVX10_2.
* common/config/i386/i386-isas.h: Remove avx10.2-256/512.
* config/i386/avx10_2-512bf16intrin.h: Use avx10.2 instead of
avx10.2-256/512.
* config/i386/avx10_2-512convertintrin.h: Ditto.
* config/i386/avx10_2-512mediaintrin.h: Ditto.
* config/i386/avx10_2-512minmaxintrin.h: Ditto.
* config/i386/avx10_2-512satcvtintrin.h: Ditto.
* config/i386/avx10_2bf16intrin.h: Ditto.
* config/i386/avx10_2convertintrin.h: Ditto.
* config/i386/avx10_2mediaintrin.h: Ditto.
* config/i386/avx10_2minmaxintrin.h: Ditto.
* config/i386/avx10_2satcvtintrin.h: Ditto.
* config/i386/movrsintrin.h: Ditto.
* config/i386/sm4intrin.h: Ditto.
* config/i386/cpuid.h (bit_AVX10_256): Removed.
(bit_AVX10_512): Ditto.
* config/i386/driver-i386.cc (host_detect_local_cpu): Adjust
Diamond Rapids and -march=native condition.
* config/i386/i386-builtin.def (BDESC): Use AVX10.2 macro
instead of AVX10.2-256/512.
* config/i386/i386-c.cc (ix86_target_macros_internal): Ditto.
* config/i386/i386-expand.cc
(ix86_expand_branch): Use TARGET_AVX10_2 instead of specifying
vector size.
(ix86_prepare_fp_compare_args): Ditto.
(ix86_expand_fp_compare): Ditto.
(ix86_ssecom_setcc): Ditto.
(ix86_expand_sse_comi): Ditto.
(ix86_expand_sse_comi_round): Ditto.
(ix86_check_builtin_isa_match): Ditto.
* config/i386/i386.cc (ix86_fp_compare_code_to_integer): Ditto.
(ix86_get_mask_mode): Ditto.
* config/i386/i386.h (SSE_FLOAT_MODE_SSEMATH_OR_HFBF_P): Ditto.
* config/i386/i386.md: Ditto.
* config/i386/mmx.md: Ditto.
* config/i386/sse.md: Ditto.
* config/i386/predicates.md: Ditto.
* config/i386/i386-isa.def (AVX10_2_256): Removed.
(AVX10_2_512): Removed.
(AVX10_2): New.
* config/i386/i386-options.cc
(isa2_opts): Remove avx10.2-256/512.
(ix86_valid_target_attribute_inner_p): Ditto.
(PTA_DIAMONDRAPIDS): Use PTA_AVX10_2.
* config/i386/i386.opt: Remove avx10.2-256/512.
* config/i386/i386.opt.urls: Ditto.
* doc/extend.texi: Ditto.
* doc/invoke.texi: Ditto.
* doc/sourcebuild.texi: Ditto.

4 months agoi386: Adjust AVX10.2 testcases options
Haochen Jiang [Mon, 24 Mar 2025 06:24:35 +0000 (14:24 +0800)] 
i386: Adjust AVX10.2 testcases options

Before we change AVX10.2 options in GCC 15, we need to adjust
all related test options to -mavx10.2 to avoid breakage. Since
-mavx10.2 is now 512 bit and will be the final option we will
use. It will also be an one-time change for these tests on
options.

gcc/testsuite/ChangeLog:

* g++.dg/other/i386-2.C: Use -mavx10.2.
* g++.dg/other/i386-3.C: Ditto.
* gcc.target/i386/avx-1.c: Ditto.
* gcc.target/i386/avx10_2-512-bf16-1.c: Ditto.
* gcc.target/i386/avx10_2-512-bf16-vector-cmp-1.c: Ditto.
* gcc.target/i386/avx10_2-512-bf16-vector-fma-1.c: Ditto.
* gcc.target/i386/avx10_2-512-bf16-vector-operations-1.c: Ditto.
* gcc.target/i386/avx10_2-512-bf16-vector-smaxmin-1.c: Ditto.
* gcc.target/i386/avx10_2-512-convert-1.c: Ditto.
* gcc.target/i386/avx10_2-512-media-1.c: Ditto.
* gcc.target/i386/avx10_2-512-minmax-1.c: Ditto.
* gcc.target/i386/avx10_2-512-movrs-1.c: Ditto.
* gcc.target/i386/avx10_2-512-satcvt-1.c: Ditto.
* gcc.target/i386/avx10_2-512-vaddbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcmpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvt2ph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvt2ph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvt2ph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvt2ph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvt2ps2phx-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbf162ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbf162iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbiasph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbiasph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbiasph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtbiasph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvthf82ph-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttbf162ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttbf162iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vdivbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vdpphps-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vfmaddXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vfmsubXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vfnmaddXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vfnmsubXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vfpclassbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vgetexpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vgetmantbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vmaxbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vminbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vminmaxbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vminmaxpd-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vminmaxph-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vminmaxps-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vmpsadbw-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vmulbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbssd-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbssds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbsud-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbsuds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbuud-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpbuuds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwsud-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwsuds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwusd-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwusds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwuud-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vpdpwuuds-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vrcpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vreducebf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vrndscalebf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vrsqrtbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vscalefbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vsqrtbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vsubbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-bf16-1.c: Ditto.
* gcc.target/i386/avx10_2-bf16-vector-cmp-1.c: Ditto.
* gcc.target/i386/avx10_2-bf16-vector-fma-1.c: Ditto.
* gcc.target/i386/avx10_2-bf16-vector-operations-1.c: Ditto.
* gcc.target/i386/avx10_2-bf16-vector-smaxmin-1.c: Ditto.
* gcc.target/i386/avx10_2-builtin-1.c: Ditto.
* gcc.target/i386/avx10_2-builtin-2.c: Ditto.
* gcc.target/i386/avx10_2-comibf-1.c: Ditto.
* gcc.target/i386/avx10_2-comibf-2.c: Ditto.
* gcc.target/i386/avx10_2-comibf-3.c: Ditto.
* gcc.target/i386/avx10_2-comibf-4.c: Ditto.
* gcc.target/i386/avx10_2-compare-1.c: Ditto.
* gcc.target/i386/avx10_2-compare-1b.c: Ditto.
* gcc.target/i386/avx10_2-convert-1.c: Ditto.
* gcc.target/i386/avx10_2-media-1.c: Ditto.
* gcc.target/i386/avx10_2-minmax-1.c: Ditto.
* gcc.target/i386/avx10_2-movrs-1.c: Ditto.
* gcc.target/i386/avx10_2-partial-bf16-vector-fast-math-1.c: Ditto.
* gcc.target/i386/avx10_2-partial-bf16-vector-fma-1.c: Ditto.
* gcc.target/i386/avx10_2-partial-bf16-vector-operations-1.c: Ditto.
* gcc.target/i386/avx10_2-partial-bf16-vector-smaxmin-1.c: Ditto.
* gcc.target/i386/avx10_2-satcvt-1.c: Ditto.
* gcc.target/i386/avx10_2-vaddbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vcmpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vcomisbf16-1.c: Ditto.
* gcc.target/i386/avx10_2-vcomisbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvt2ph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvt2ph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvt2ph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvt2ph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvt2ps2phx-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbf162ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbf162iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbiasph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbiasph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbiasph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtbiasph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvthf82ph-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2bf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2bf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2hf8-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2hf8s-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvtps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttbf162ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttbf162iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttpd2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttpd2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttpd2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttpd2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttps2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttsd2sis-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttsd2usis-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttss2sis-2.c: Ditto.
* gcc.target/i386/avx10_2-vcvttss2usis-2.c: Ditto.
* gcc.target/i386/avx10_2-vdivbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vdpphps-2.c: Ditto.
* gcc.target/i386/avx10_2-vfmaddXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vfmsubXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vfnmaddXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vfnmsubXXXbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vfpclassbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vgetexpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vgetmantbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vmaxbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vminbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxpd-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxph-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxps-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxsd-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxsh-2.c: Ditto.
* gcc.target/i386/avx10_2-vminmaxss-2.c: Ditto.
* gcc.target/i386/avx10_2-vmovd-1.c: Ditto.
* gcc.target/i386/avx10_2-vmovd-2.c: Ditto.
* gcc.target/i386/avx10_2-vmovw-1.c: Ditto.
* gcc.target/i386/avx10_2-vmovw-2.c: Ditto.
* gcc.target/i386/avx10_2-vmpsadbw-2.c: Ditto.
* gcc.target/i386/avx10_2-vmulbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbssd-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbssds-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbsud-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbsuds-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbuud-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpbuuds-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwsud-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwsuds-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwusd-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwusds-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwuud-2.c: Ditto.
* gcc.target/i386/avx10_2-vpdpwuuds-2.c: Ditto.
* gcc.target/i386/avx10_2-vrcpbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vreducebf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vrndscalebf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vrsqrtbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vscalefbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vsqrtbf16-2.c: Ditto.
* gcc.target/i386/avx10_2-vsubbf16-2.c: Ditto.
* gcc.target/i386/funcspec-56.inc: Ditto.
* gcc.target/i386/part-vect-vec_cmpbf.c: Ditto.
* gcc.target/i386/pr117495.c: Ditto.
* gcc.target/i386/pr118815.c: Ditto.
* gcc.target/i386/sm4-avx10_2-1.c: Ditto.
* gcc.target/i386/sm4-avx10_2-512-1.c: Ditto.
* gcc.target/i386/sm4key4-avx10_2-512-2.c: Ditto.
* gcc.target/i386/sm4rnds4-avx10_2-512-2.c: Ditto.
* gcc.target/i386/sse-12.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.
* gcc.target/i386/vnniint16-auto-vectorize-3.c: Ditto.
* gcc.target/i386/vnniint16-auto-vectorize-4.c: Ditto.
* gcc.target/i386/vnniint8-auto-vectorize-3.c: Ditto.
* gcc.target/i386/vnniint8-auto-vectorize-4.c: Ditto.
* gcc.target/i386/avx10-check.h: Remove avx10.2-512 and
use avx10.2.
* gcc.target/i386/sm4-check.h: Ditto.
* lib/target-supports.exp: Ditto.

4 months agoRevert "AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:33 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vadd{s,d,h} and vcmp{s,d,h} intrins"

This reverts commit e22e3af1954469c40b139b7cfa8e7708592f4bfd.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:31 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtdq2p{s,h} and vcvtpd2p{s,h} intrins"

This reverts commit 85e874d19548f0dcb9a3f14f9e4b1e3411c88c4b.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:29 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtpd2{,u}{dq,qq} intrins"

This reverts commit 508ac49e1a94c28346642bff512d0ed5f4f58b64.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:27 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtph2p{s,d,sx} and vcvtph2{,u}{dq,qq} intrins"

This reverts commit 6f2eac53b6026836f3222961c32312e02c2c7dbc.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:18 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtph2{,u}w and vcvtps2p{d,hx} intrins"

This reverts commit b70bb94aca7bc10a54f744d793c32c51f91ce195.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:16 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtps2{,u}{dq,qq} intrins"

This reverts commit 0f5a42d41b46b746c6f77374d76a3b918a1e2b57.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and vcvttpd2{,u}{dq,qq} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:14 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvtqq2p{s,d,h} and vcvttpd2{,u}{dq,qq} intrins"

This reverts commit 6e231f8504874828b23bbe89f3ef4086dcc15a44.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:09 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvttph2{,u}{dq,qq,w} intrins"

This reverts commit 493c5096050523ebc05e5fa21612683a996b97a7.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvttps2{,u}{dq,qq} and vcvtu{dq,qq}2p{s,d...
Haochen Jiang [Mon, 24 Mar 2025 06:24:07 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvttps2{,u}{dq,qq} and vcvtu{dq,qq}2p{s,d,h} intrins"

This reverts commit b2754227139512adecb6fda067632b587ff4a017.

4 months agoRevert "AVX10.2 ymm rounding: Support vcvt{,u}w2ph and vdivp{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:05 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vcvt{,u}w2ph and vdivp{s,d,h} intrins"

This reverts commit 3d1b5530ea1d23e26dc5ab70aa4a2e7b9dc19b50.

4 months agoRevert "AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:03 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfc{madd,mul}cph, vfixupimmp{s,d} intrins"

This reverts commit 95980b292b24110d3f1dffb81926df23c61b4fe7.

4 months agoRevert "AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:24:01 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfmadd{132,231,213}p{s,d,h} intrins"

This reverts commit 0683ca355a87fd36a2e7ae1721199204ceff4c4c.

4 months agoRevert "AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132,231,213}p{s,d,h...
Haochen Jiang [Mon, 24 Mar 2025 06:24:00 +0000 (14:24 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfmaddcph and vfmaddsub{132,231,213}p{s,d,h} intrins"

This reverts commit cfbc94eaf167ae7aecd21ee6054556e1cf9d7143.

4 months agoRevert "AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:58 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfm{sub,subadd}{132,231,213}p{s,d,h} intrins"

This reverts commit dd48acbe85ca55dd23ffafbb917ffe559d13b6a3.

4 months agoRevert "AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132,231,213}p{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:56 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfmulcph and vfnmadd{132,231,213}p{s,d,h} intrins"

This reverts commit 6f0aa7add1d9177f60016b32ca9ca8b16b173a56.

4 months agoRevert "AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:55 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vfnmsub{132,231,213}p{s,d,h} intrins"

This reverts commit 0983d406ae2e84394b25248865f51c686b119a57.

4 months agoRevert "AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:54 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vgetexpp{s,d,h} and vgetmantp{s,d,h} intrins"

This reverts commit 8d4f542935c09f40bb7fd8fd863cc8df80cc970e.

4 months agoRevert "AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:52 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support v{max,min}p{s,d,h} intrins"

This reverts commit cc8a7596477e9d6ac972aadabbb2fd88baa1abf4.

4 months agoRevert "AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:51 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vmulp{s,d,h} and vrangep{s,d} intrins"

This reverts commit 90cc5b0c4609a9fb3257d2cce7b7abc896c6faab.

4 months agoRevert "AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:45 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vreducep{s,d,h} and vrndscalep{s,d,h} intrins"

This reverts commit 9afa5081212e1fc3cb2c4efc9b4f421eecf68810.

4 months agoRevert "AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:43 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vscalefp{s,d,h} intrins"

This reverts commit 1f86cf06c7897f6ab467443b5fe8789cc95fe0c4.

4 months agoRevert "AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h} intrins"
Haochen Jiang [Mon, 24 Mar 2025 06:23:42 +0000 (14:23 +0800)] 
Revert "AVX10.2 ymm rounding: Support vsqrtp{s,d,h} and vsubp{s,d,h} intrins"

This reverts commit 7f62e7104ebc11c4570745972a023579922ef265.

4 months agoi386: Remove 256 bit rounding for AVX10.2 saturation convert instructions
Haochen Jiang [Mon, 24 Mar 2025 06:23:40 +0000 (14:23 +0800)] 
i386: Remove 256 bit rounding for AVX10.2 saturation convert instructions

Since we will support 512 bit on both P-core and E-core, 256 bit
rounding is not that useful because we currently have rounding feature
directly on E-core now and no need to use 256-bit rounding as somehow
a workaround. This patch will remove 256 bit rounding in AVX10.2 satcvt
intrins.

gcc/ChangeLog:

* config/i386/avx10_2satcvtintrin.h: Remove rounding intrins.
Use non-round intrins.
* config/i386/i386-builtin.def (BDESC): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx10_2-512-vcvtph2ibs-2.c: Adjust condition
for rounding test.
* gcc.target/i386/avx10_2-512-vcvtph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvtps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttpd2uqqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttph2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2dqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2ibs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2iubs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2qqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2udqs-2.c: Ditto.
* gcc.target/i386/avx10_2-512-vcvttps2uqqs-2.c: Ditto.
* gcc.target/i386/avx-1.c: Remove rounding tests.
* gcc.target/i386/avx10_2-satcvt-1.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.

4 months agoi386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions
Haochen Jiang [Mon, 24 Mar 2025 06:23:37 +0000 (14:23 +0800)] 
i386: Remove 256 bit rounding for AVX10.2 minmax and convert instructions

Since we will support 512 bit on both P-core and E-core, 256 bit
rounding is not that useful because we currently have rounding feature
directly on E-core now and no need to use 256-bit rounding as somehow
a workaround. This patch will remove those in AVX10.2 minmax and convert
intrins.

gcc/ChangeLog:

* config/i386/avx10_2convertintrin.h: Remove rounding intrins.
Use non-round builtins.
* config/i386/avx10_2minmaxintrin.h: Ditto.
* config/i386/i386-builtin.def (BDESC): Ditto.
* config/i386/i386-builtin-types.def: Remove unused type.
* config/i386/i386-expand.cc
(ix86_expand_args_builtin): Ditto.
(ix86_expand_round_builtin): Ditto.

gcc/testsuite/ChangeLog:

* gcc.target/i386/avx-1.c: Remove rounding tests.
* gcc.target/i386/avx10_2-convert-1.c: Ditto.
* gcc.target/i386/avx10_2-minmax-1.c: Ditto.
* gcc.target/i386/sse-13.c: Ditto.
* gcc.target/i386/sse-14.c: Ditto.
* gcc.target/i386/sse-22.c: Ditto.
* gcc.target/i386/sse-23.c: Ditto.

4 months agoDaily bump.
GCC Administrator [Mon, 24 Mar 2025 00:17:16 +0000 (00:17 +0000)] 
Daily bump.

4 months agotoplevel, Makefile: Add missing CXX_FOR_TARGET export [PR88319].
Iain Sandoe [Sun, 23 Mar 2025 11:45:17 +0000 (11:45 +0000)] 
toplevel, Makefile: Add missing CXX_FOR_TARGET export [PR88319].

Actually, the issue is not local to the libitm case, it currently affects
any 'cxx=true' top-level configured target library.

The issue is a missing export of CXX_FOR_TARGET.

PR libitm/88319

ChangeLog:

* Makefile.in: Regenerate.
* Makefile.tpl: Add CXX_FOR_TARGET to NORMAL_TARGET_EXPORTS.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
4 months agoMAINTAINERS: Add myself
James K. Lowden [Sun, 23 Mar 2025 20:24:36 +0000 (16:24 -0400)] 
MAINTAINERS: Add myself

ChangeLog:

* MAINTAINERS: Add myself.

4 months agoc++/modules: Fix explicit instantiations and gnu_inlines [PR119154]
Nathaniel Shead [Sat, 22 Mar 2025 12:04:12 +0000 (23:04 +1100)] 
c++/modules: Fix explicit instantiations and gnu_inlines [PR119154]

My change in r15-8012 for PR c++/119154 exposed a bug with explicit
instantation declarations.  The change cleared DECL_INTERFACE_KNOWN for
all vague-linkage entities, including explicit instantiations.  When we
then perform lazy loading at EOF (due to processing deferred function
bodies), expand_or_defer_fn ends up calling import_export_decl which
will error because DECL_INTERFACE_KNOWN is still unset but no definition
is available in the file, violating some assertions.

It turns out that for function templates marked inline we would not
respect an 'extern template' imported in general, either; this patch
fixes both of these issues by always treating explicit instantiations as
external, and so marking DECL_INTERFACE_KNOWN eagerly.

For an explicit instantiation declaration we don't want to emit the body
of the function as it must be emitted in a different TU anyway.  And for
explicit instantiation definitions we similarly know that it will have
been emitted in the interface TU we streamed it in from, so there's
no need to emit it.

The same error can happen with lazy-loaded gnu_inlines at EOF; in some
cases they'll be marked DECL_COMDAT and pass through the vague_linkage_p
check anyway.  This patch reworks the handling of gnu_inlines to ensure
that both DECL_INTERFACE_KNOWN is always correctly set and that
importing a gnu_inline function over the top of an existing forward
declaration works correctly.

The other case that duplicate_decls handles (importing a regular
definition over the top of a gnu_inline function) doesn't seem like
something we need to handle specially in modules; we'll just use the
existing gnu_inline function and rely on the guarantee that there is a
single non-inline function definition provided elsewhere.

PR c++/119154

gcc/cp/ChangeLog:

* decl2.cc (vague_linkage_p): Revert gnu_linkage handling.
* module.cc (importer_interface): New enumeration.
(get_importer_interface): New function.
(trees_out::core_bools): Use it to determine interface.
(trees_in::is_matching_decl): Propagate gnu_inline handling onto
existing forward declarations.
(trees_in::read_var_def): Also note explicit instantiation
definitions of variable templates to be emitted.

gcc/testsuite/ChangeLog:

* g++.dg/modules/pr119154_a.C: Move to...
* g++.dg/modules/gnu-inline-1_a.C: ...here, and add decl.
* g++.dg/modules/pr119154_b.C: Move to...
* g++.dg/modules/gnu-inline-1_b.C: here, and add check.
* g++.dg/modules/gnu-inline-1_c.C: New test.
* g++.dg/modules/gnu-inline-1_d.C: New test.
* g++.dg/modules/gnu-inline-2_a.C: New test.
* g++.dg/modules/gnu-inline-2_b.C: New test.
* g++.dg/modules/extern-tpl-3_a.C: New test.
* g++.dg/modules/extern-tpl-3_b.C: New test.
* g++.dg/modules/extern-tpl-4_a.H: New test.
* g++.dg/modules/extern-tpl-4_b.C: New test.
* g++.dg/modules/extern-tpl-4_c.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
4 months agoDoc: Rearrange remaining top-level sections in extend.texi [PR42270]
Sandra Loosemore [Thu, 13 Mar 2025 22:48:09 +0000 (22:48 +0000)] 
Doc: Rearrange remaining top-level sections in extend.texi [PR42270]

This is part of an incremental effort to make the chapter on GCC
extensions better organized by grouping/rearranging sections by topic.

gcc/ChangeLog
PR other/42270
* doc/extend.texi (Nonlocal Gotos): Group with other built-ins
sections.
(Constructing Calls): Likewise.
(Pragmas): Move earlier in the section, before the built-ins docs.
(Thread-Local): Likewise.
(OpenMP): Likewise.
(OpenACC): Likewise.

4 months agoDoc: Add "Syntax Extensions" and "Semantic Extensions" sectioning to extend.texi...
Sandra Loosemore [Thu, 13 Mar 2025 22:00:55 +0000 (22:00 +0000)] 
Doc: Add "Syntax Extensions" and "Semantic Extensions" sectioning to extend.texi [PR42270]

This is part of an incremental effort to make the chapter on GCC
extensions better organized by grouping/rearranging sections by topic.

gcc/ChangeLog
PR other/42270
* doc/extend.texi (Syntax Extensions): New section.
(Statement Exprs): Make it a subsection of the above.
(Local Labels): Likewise.
(Labels as Values): Likewise.
(Nested Functions): Likewise.
(Typeof): Likewise.
(Offsetof): Likewise.
(Alignment): Likewise.
(Incomplete Enums): Likewise.
(Variadic Macros): Likewise.
(Conditionals): Likewise.
(Case Ranges): Likewise.
(Mixed Labels and Declarations): Likewise.
(C++ Comments): Likewise.
(Escaped Newlines): Likewise.
(Hex Floats): Likewise.
(Binary constants): Likewise.
(Dollar Signs): Likewise.
(Character Escapes): Likewise.
(Alternate Keywords): Likewise.
(Function Names): Likewise.
(Semantic Extensions): New section.
(Function Prototypes): Make it a subsection of the above.
(Pointer Arith): Likewise.
(Variadic Pointer Args): Likewise.
(Pointers to Arrays): Likewise.
(Const and Volatile Functions): Likewise.

4 months agoDoc: Add "Aggregate Types" sectioning to extend.texi [PR42270]
Sandra Loosemore [Thu, 13 Mar 2025 14:52:10 +0000 (14:52 +0000)] 
Doc: Add "Aggregate Types" sectioning to extend.texi [PR42270]

This is part of an incremental effort to make the chapter on GCC
extensions better organized by grouping/rearranging sections by topic.

gcc/ChangeLog
PR other/42270
* doc/extend.texi (Aggregate Types): New section.
(Variable Length): Make it a subsection of the above.
(Zero Length): Likewise.
(Empty Structures): Likewise.
(Flexible Array Members in Unions): Likewise.
(Flexible Array Members alone in Structures): Likewise.
(Unnamed Fields): Likewise.
(Cast to Union): Likewise.
(Subscripting): Likewise.
(Initializers): Likewise.
(Compound Literals): Likewise.
(Designated Inits): Likewise.

4 months agoDoc: Add "Additional Numeric Types" sectioning to extend.texi [PR42270]
Sandra Loosemore [Thu, 13 Mar 2025 03:43:04 +0000 (03:43 +0000)] 
Doc: Add "Additional Numeric Types" sectioning to extend.texi [PR42270]

This is part of an incremental effort to make the chapter on GCC
extensions better organized by grouping/rearranging sections by topic.

gcc/ChangeLog
PR other/42270
* doc/extend.texi (Additional Numeric Types): New section.
(__int128): Make it a subsection of the above.
(Long Long): Likewise.
(Complex): Likewise.
(Floating Types): Likewise.
(Half-Precision): Likewise.
(Decimal Float): Likewise.
(Fixed-Point): Likewise.

4 months agod: Fix ICE type variant differs by TYPE_PACKED [PR117621]
Iain Buclaw [Sun, 23 Mar 2025 11:57:27 +0000 (12:57 +0100)] 
d: Fix ICE type variant differs by TYPE_PACKED [PR117621]

Introduced by r13-1104-gf4c3ce32fa54c1, which had an accidental self
assignment of TYPE_PACKED when it should have been assigned to the
type's variants.

PR d/117621

gcc/d/ChangeLog:

* types.cc (finish_aggregate_type): Propagate TYPE_PACKED to variants.

gcc/testsuite/ChangeLog:

* gdc.dg/pr117621.d: New test.

4 months agoAVR: Add AVR-SD devices.
Georg-Johann Lay [Sun, 23 Mar 2025 12:23:25 +0000 (13:23 +0100)] 
AVR: Add AVR-SD devices.

gcc/
* config/avr/avr-mcus.def: Add AVR32SD20, AVR32SD28, AVR32SD32,
AVR64SD28, AVR64SD32, AVR64SD48.
* doc/avr-mmcu.texi: Rebuild.

4 months agoAVR: Clarify some optimization options.
Georg-Johann Lay [Sun, 23 Mar 2025 11:58:54 +0000 (12:58 +0100)] 
AVR: Clarify some optimization options.

gcc/
* doc/invoke.texi (AVR Optimization Options)
<-maccumulate-args>: Refer to -fdefer-pop.
<-muse-nonzero-bits>: Re-formulate what the option does.

4 months agocobol: Make CXXFLAGS_FOR_TARGET available to the libgcobol build.
Bob Dubner [Fri, 21 Mar 2025 21:22:31 +0000 (17:22 -0400)] 
cobol: Make CXXFLAGS_FOR_TARGET available to the libgcobol build.

By setting "CXXFLAGS_FOR_TARGET=-ggdb -O0", a debuggable version
of libgcobol.so is created.

libgcobol

* Makefile.am: Incorporate AM_CXXFLAGS = $(CXXFLAGS_FOR_TARGET).
* Makefile.in: Regenerated.

4 months agoDaily bump.
GCC Administrator [Sun, 23 Mar 2025 00:17:38 +0000 (00:17 +0000)] 
Daily bump.

4 months agoAVR: Use "avr-peep2-after-fuse-move" for the 2nd run of peephole2.
Georg-Johann Lay [Sat, 22 Mar 2025 18:10:39 +0000 (19:10 +0100)] 
AVR: Use "avr-peep2-after-fuse-move" for the 2nd run of peephole2.

This patch uses a name for the dump file that makes it clear where
in the pass chain the 2nd run of peephole2 is located.

gcc/
* config/avr/avr.cc (avr_option_override): Use
"avr-peep2-after-fuse-move" as dump name instead of "peephole2".

4 months agolibgfortran/intrinsics: Fix build for targets with int32_t=long int
Hans-Peter Nilsson [Sat, 22 Mar 2025 17:27:10 +0000 (18:27 +0100)] 
libgfortran/intrinsics: Fix build for targets with int32_t=long int

Without this, after r15-8650-g94fa9f4d27bac5, you'll see,
for targets where GFC_INTEGER_4 alias int32_t is a typedef
of long int (beware of artificially broken lines):

/x/gcc/libgfortran/intrinsics/reduce.c:269:1: error: conflicting types for 'reduce_scalar_c'; have 'void(void *, index_type,  parray *, void (*)(void *, void *, void *), int *, gfc_array_l4 *, void *, void *, index_type,  index_type)' {aka 'void(void *, long int,  parray *, void (*)(void *, void *, void *), int *, gfc_array_l4 *, void *, void *, long int,  long int)'}
  269 | reduce_scalar_c (void *res,
      | ^~~~~~~~~~~~~~~
[...] excessive error message verbiage deleted
/x/gcc/libgfortran/intrinsics/reduce.c: In function 'reduce_scalar_c':
/x/gcc/libgfortran/intrinsics/reduce.c:283:35: error: passing argument 4 of 'reduce' from incompatible pointer type [-Wincompatible-pointer-types]
  283 |   reduce (&ret, array, operation, dim, mask, identity, ordered);
      |                                   ^~~
      |                                   |
      |                                   int *
/x/gcc/libgfortran/intrinsics/reduce.c:41:24: note: expected 'GFC_INTEGER_4 *' {aka 'long int *'} but argument is of type 'int *'
   41 |         GFC_INTEGER_4 *dim,
      |         ~~~~~~~~~~~~~~~^~~
make[3]: *** [Makefile:4678: intrinsics/reduce.lo] Error 1

libgfortran:
* intrinsics/reduce.c (reduce_scalar_c): Correct type of parameter DIM.

4 months agoavr.opt.urls += -muse-nonzero-bits
Georg-Johann Lay [Sat, 22 Mar 2025 17:20:10 +0000 (18:20 +0100)] 
avr.opt.urls += -muse-nonzero-bits

gcc/
* config/avr/avr.opt.urls: Add -muse-nonzero-bits.

4 months agoAVR: target/119421 Better optimize some bit operations.
Georg-Johann Lay [Sat, 15 Mar 2025 19:53:52 +0000 (20:53 +0100)] 
AVR: target/119421 Better optimize some bit operations.

There are occasions where knowledge about nonzero bits makes some
optimizations possible.  For example,

   Rd |= Rn << Off

can be implemented as

   SBRC Rn, 0
   ORI  Rd, 1 << Off

when Rn in { 0, 1 }, i.e. nonzero_bits (Rn) == 1.  This patch adds some
patterns that exploit nonzero_bits() in some combiner patterns.
As insn conditions are not supposed to contain nonzero_bits(), the patch
splits such insns right after pass insn combine.

PR target/119421
gcc/
* config/avr/avr.opt (-muse-nonzero-bits): New option.
* config/avr/avr-protos.h (avr_nonzero_bits_lsr_operands_p): New.
(make_avr_pass_split_nzb): New.
* config/avr/avr.cc (avr_nonzero_bits_lsr_operands_p): New function.
(avr_rtx_costs_1): Return costs for the new insns.
* config/avr/avr.md (nzb): New insn attribute.
(*nzb=1.<code>...): New insns to better support some bit
operations for <code> in AND, IOR, XOR.
* config/avr/avr-passes.def (avr_pass_split_nzb): Insert pass
atfer combine.
* config/avr/avr-passes.cc (avr_pass_data_split_nzb). New pass data.
(avr_pass_split_nzb): New pass.
(make_avr_pass_split_nzb): New function.
* common/config/avr/avr-common.cc (avr_option_optimization_table):
Enable -muse-nonzero-bits for -O2 and higher.
* doc/invoke.texi (AVR Options): Document -muse-nonzero-bits.
gcc/testsuite/
* gcc.target/avr/torture/pr119421-sreg.c: New test.

4 months agoAVR: libgcc: Properly exclude object files for AVRrc.
Georg-Johann Lay [Sat, 22 Mar 2025 14:19:39 +0000 (15:19 +0100)] 
AVR: libgcc: Properly exclude object files for AVRrc.

There are many objects / functions that are not available on AVRrc,
the reduced core.  The old way to exclude some objects for AVRrc
did not work properly since it tested for MULTIFLAGS.
This does not work for, say MULTIFLAGS = "-mmcu=avrtiny -mdouble=64".
This patch uses $(findstring avrtiny,$(MULTIDIR)) in the condition.

libgcc/
* config/avr/t-avr (LIB1ASMFUNCS, LIB2FUNCS_EXCLUDE):
Properly handle avrtiny.
libgcc/config/avr/libf7/
* t-libf7 (libgcc-objects): Only add objects when building
for non-AVRrc.

4 months agoAVR: Add attribute "used" for code in .initN and .initN sections.
Georg-Johann Lay [Fri, 21 Mar 2025 13:29:13 +0000 (14:29 +0100)] 
AVR: Add attribute "used" for code in .initN and .initN sections.

Code in .initN and .initN sections is never called since these
sections are special and part of the startup resp. shutdown code.
This patch adds attribute "used" so they won't be optimized out.

gcc/
* config/avr/avr.cc (avr_attrs_section_name): New function.
(avr_insert_attributes): Add "used" attribute to functions
in .initN and .finiN.

4 months agoc++: structural equality and partially inst typedef [PR119379]
Patrick Palka [Sat, 22 Mar 2025 14:15:52 +0000 (10:15 -0400)] 
c++: structural equality and partially inst typedef [PR119379]

Complex alias templates (and their dependent specializations) always use
structural equality because we need to treat them as transparent in some
contexts but not others.  Structural-ness however wasn't being preserved
during partial instantiation, which for the below testcase leads to the
checking ICE

  same canonical type node for different types 'S<int>::P<U>' and 'pair<int, U>'

when comparing those two types with comparing_dependent_aliases set
(from alias_ctad_tweaks).

This patch fixes this by making us preserve structural-ness for
partially instantiated typedefs in general.

PR c++/119379

gcc/cp/ChangeLog:

* pt.cc (tsubst_decl) <case TYPE_DECL>: Preserve structural-ness
of a partially instantiated typedef.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/class-deduction-alias24.C: New test.

Reviewed-by: Jason Merrill <jason@redhat.com>
4 months agoDarwin: We do not need libdl, it is provided in libSystem.
Iain Sandoe [Fri, 21 Mar 2025 15:31:21 +0000 (15:31 +0000)] 
Darwin: We do not need libdl, it is provided in libSystem.

Darwin provides this support as part of libSystem which is always
linked with user-space DSOs (including exes).

gcc/ChangeLog:

* config/darwin.h (DL_LIBRARY): New.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
4 months agod: Bump front-end language version to v2.111.0-rc.1.
Iain Buclaw [Sat, 22 Mar 2025 09:54:10 +0000 (10:54 +0100)] 
d: Bump front-end language version to v2.111.0-rc.1.

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 032e24446b.
* dmd/VERSION: Bump version to v2.111.0-rc.1.

4 months agod: Improve UFCS/property error message
Iain Buclaw [Sat, 22 Mar 2025 09:49:06 +0000 (10:49 +0100)] 
d: Improve UFCS/property error message

Improves on the speller suggestions for UFCS by using the location of
the suggested symbol, and considering that local functions aren't
eligible for UFCS instead of making a nonsensical suggestion, such as
"no property foo, did you mean foo?".

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 9d2f034398.

Reviewed-on: https://github.com/dlang/dmd/pull/21046

4 months agod: Add C++23 to CppStdRevision enum
Iain Buclaw [Sat, 22 Mar 2025 09:42:21 +0000 (10:42 +0100)] 
d: Add C++23 to CppStdRevision enum

D front-end changes:

- The compiler now accepts `-fextern-std=c++23'

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 94950cae58.
* d-lang.cc (d_handle_option): Add case for CppStdRevisionCpp23.
* gdc.texi: Document -fextern-std=c++23.
* lang.opt (fextern-std=): Add c++23.

libphobos/ChangeLog:

* libdruntime/MERGE: Merge upstream druntime 94950cae58.

Reviewed-on: https://github.com/dlang/dmd/pull/21043

4 months agod: Indexing a cast(AA) yields no lvalue anymore
Iain Buclaw [Sat, 22 Mar 2025 09:33:24 +0000 (10:33 +0100)] 
d: Indexing a cast(AA) yields no lvalue anymore

gcc/d/ChangeLog:

* dmd/MERGE: Merge upstream dmd 8db14cf846.

Reviewed-on: https://github.com/dlang/dmd/pull/21029

4 months agolibphobos: Add module declaration to rt.invariant
Iain Buclaw [Sat, 22 Mar 2025 09:26:47 +0000 (10:26 +0100)] 
libphobos: Add module declaration to rt.invariant

This prevents conflicts with a user-provided `invariant.d' module.

gcc/d/ChangeLog:

* runtime.def (INVARIANT): Update signature of run-time function.

libphobos/ChangeLog:

* libdruntime/Makefile.am (DRUNTIME_DSOURCES): Rename rt/invariant.d
to rt/invariant_.d.
* libdruntime/Makefile.in: Regenerate.
* libdruntime/rt/invariant.d: Move to...
* libdruntime/rt/invariant_.d: ...here.

4 months agolibphobos: Fix IEEE typo in std.numeric link
Iain Buclaw [Sat, 22 Mar 2025 09:15:09 +0000 (10:15 +0100)] 
libphobos: Fix IEEE typo in std.numeric link

libphobos/ChangeLog:

* src/MERGE: Merge upstream phobos d4c9efef1.

Reviewed-on: https://github.com/dlang/phobos/pull/10700

4 months agoDaily bump.
GCC Administrator [Sat, 22 Mar 2025 09:25:44 +0000 (09:25 +0000)] 
Daily bump.

4 months agoFix up some further cases of missing or extraneous spaces in diagnostics
Jakub Jelinek [Sat, 22 Mar 2025 07:39:38 +0000 (08:39 +0100)] 
Fix up some further cases of missing or extraneous spaces in diagnostics

Given the recent PR119406 I've tried to grep for concatenated string
literals without space at the end of one line and at the start of next line,
unless it was obviously intentional.
Furthermore, I've then looked through gcc.pot looking for 2 adjacent spaces
and looking back if that wasn't the case of "something "
" with spaces at both sides".

Here is the result from that.

I think just the c.opt change needs an explanation, the "" in the
description is simply eaten up somewhere during the option processing and
gcc -v --help before this patch was displaying
  -Wdeprecated-literal-operator Warn about deprecated space between  and suffix in a user-defined literal operator.

2025-03-22  Jakub Jelinek  <jakub@redhat.com>

gcc/
* gimplify.cc (warn_switch_unreachable_and_auto_init_r): Add missing
space in the middle of diagnostics.
* tree-vect-stmts.cc (vectorizable_load): Add missing space in the
middle of debug dump message.
* sym-exec/sym-exec-state.cc (state::check_args_compatibility):
Likewise.
gcc/c-family/
* c.opt (Wdeprecated-literal-operator): Use \"\" rather than ""
in option description.
gcc/fortran/
* resolve.cc (resolve_procedure_expression): Remove extraneous space
from the middle of diagnostics.

4 months agocobol, libgcobol: Currently libgcobol depends on libstdc++.
Iain Sandoe [Fri, 21 Mar 2025 17:57:48 +0000 (17:57 +0000)] 
cobol, libgcobol: Currently libgcobol depends on libstdc++.

We need to add libstdc++ to link lines even when the link is not
'-static' since libgcobol depends on libstdc++.

gcc/cobol/ChangeLog:

* gcobolspec.cc (lang_specific_driver): Add libstdc++
for any link line.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
4 months agocobol, driver: Handle targets without HAVE_LD_STATIC_DYNAMIC.
Iain Sandoe [Fri, 21 Mar 2025 15:14:19 +0000 (15:14 +0000)] 
cobol, driver: Handle targets without HAVE_LD_STATIC_DYNAMIC.

This fixes a typo where libraries were not added for targets without
HAVE_LD_STATIC_DYNAMIC.

It also adds the libraries in this case;
typically, a target without HAVE_LD_STATIC_DYNAMIC can take the
-static-libgcobol and use that to drive a spec substitution viz:
 %{static-libgcobol:%:replace-outfile(-lgcobol libgcobol.a%s)}
which needs both the library and -static-libgcobol to be present
in the driver output.

gcc/cobol/ChangeLog:

* gcobolspec.cc (add_arg_lib): Fix typo.
(lang_specific_driver): Arrange to append both -lgcobol
and -static-libgcobol for targets without
HAVE_LD_STATIC_DYNAMIC.

Signed-off-by: Iain Sandoe <iain@sandoe.co.uk>
4 months agolibgomp.fortran/get-mapped-ptr-1.f90: Use -6 for non-conf dev number
Tobias Burnus [Fri, 21 Mar 2025 23:36:44 +0000 (00:36 +0100)] 
libgomp.fortran/get-mapped-ptr-1.f90: Use -6 for non-conf dev number

This is a fix for the GOMP_interop commit r15-8654-g99e2906ae255fc that
added GOMP_DEVICE_DEFAULT_OMP_61 alias omp_default_device, which is a
conforming device number. But that test used -5 as check for a
non-conforming device number.

libgomp/ChangeLog:

* testsuite/libgomp.fortran/get-mapped-ptr-1.f90: Use -6
not -5 as non-conforming device number.

4 months agoUpdate gcc de.po, fr.po
Joseph Myers [Fri, 21 Mar 2025 21:20:56 +0000 (21:20 +0000)] 
Update gcc de.po, fr.po

* de.po, fr.po: Update.

4 months agolibgomp/plugin: Add initial interop support to nvptx + gcn
Tobias Burnus [Fri, 21 Mar 2025 20:39:42 +0000 (21:39 +0100)] 
libgomp/plugin: Add initial interop support to nvptx + gcn

The interop directive operates on an opaque object that represents a
foreign runtime. This commit adds support for
this to the two offloading plugins.

For nvptx, it supports cuda, cuda_driver and hip; the latter is AMD's
version of CUDA which for Nvidia devices boils down to normal CUDA.
Thus, at the end for this limited use, cuda/cuda_driver/hip are all
the same - and for plugin-nvptx.c, the they differ only in terms of
what gets fr_id, fr_name and get_interop_type_desc return.

For gcn, it supports hip and hsa.

Regarding get-mapped-ptr-1.c: That's actually a fix for the
GOMP_interop commit r15-8654-g99e2906ae255fc that added
GOMP_DEVICE_DEFAULT_OMP_61 alias omp_default_device, which is
a conforming device number. But that test used -5 as check for a
non-conforming device number.

libgomp/ChangeLog:

* plugin/plugin-gcn.c (_LIBGOMP_PLUGIN_INCLUDE): Define.
(struct hsa_runtime_fn_info): Add two queue functions.
(hipError_t, hipCtx_t, hipStream_s, hipStream_t): New types.
(struct hip_runtime_fn_info): New.
(hip_runtime_lib, hip_fns): New global vars.
(init_environment_variables): Handle hip_runtime_lib.
(init_hsa_runtime_functions): Load the two queue functions.
(init_hip_runtime_functions, GOMP_OFFLOAD_interop,
GOMP_OFFLOAD_get_interop_int, GOMP_OFFLOAD_get_interop_ptr,
GOMP_OFFLOAD_get_interop_str,
GOMP_OFFLOAD_get_interop_type_desc): New.
* plugin/plugin-nvptx.c (_LIBGOMP_PLUGIN_INCLUDE): Define.
(GOMP_OFFLOAD_interop, GOMP_OFFLOAD_get_interop_int,
GOMP_OFFLOAD_get_interop_ptr, GOMP_OFFLOAD_get_interop_str,
GOMP_OFFLOAD_get_interop_type_desc): New.
* testsuite/libgomp.c/interop-fr-1.c: New test.
* testsuite/libgomp.c-c++-common/get-mapped-ptr-1.c: Use -6
not -5 as non-conforming device number.

4 months agolra, v2: emit caller-save register spills before call insn [PR116028]
Jakub Jelinek [Fri, 21 Mar 2025 19:26:00 +0000 (20:26 +0100)] 
lra, v2: emit caller-save register spills before call insn [PR116028]

Here is an updated version of Surya's PR116028 fix from August, which got
reverted because it caused bootstrap failures on aarch64, later on bootstrap
comparison errors there as well and problems on other targets as well.

Original description:

LRA emits insns to save caller-save registers in the
inheritance/splitting pass.  In this pass, LRA builds EBBs (Extended
Basic Block) and traverses the insns in the EBBs in reverse order from
the last insn to the first insn.  When LRA sees a write to a pseudo (that
has been assigned a caller-save register), and there is a read following
the write, with an intervening call insn between the write and read,
then LRA generates a spill immediately after the write and a restore
immediately before the read.  The spill is needed because the call insn
will clobber the caller-save register.

If there is a write insn and a call insn in two separate BBs but
belonging to the same EBB, the spill insn gets generated in the BB
containing the write insn.  If the write insn is in the entry BB, then
the spill insn that is generated in the entry BB prevents shrink wrap
from happening.  This is because the spill insn references the stack
pointer and hence the prolog gets generated in the entry BB itself.

This patch ensures the the spill insn is generated before the call insn
instead of after the write.  This also ensures that the spill occurs
only in the path containing the call.

The changes compared to the first r15-2810 version are:
1) the reason for aarch64 miscompilations and later on bootstrap comparison
   issues as can be seen on the pr118615.c testcase in the patch was that
   when curr_insn is a JUMP_INSN or some cases of CALL_INSNs,
   split_if_necessary is called with before_p true and if it is successful,
   the code set use_insn = PREV_INSN (curr_insn); instead of use_insn =
   curr_insn; and that use_insn is then what is passed to
   add_next_usage_insn; now, if the patch decides to emit the save
   instruction(s) before the first call after curr_insn in the ebb rather
   than before the JUMP_INSN/CALL_INSN, PREV_INSN (curr_insn) is some random
   insn before it, not anything related to the split_reg actions.
   If it is e.g. a DEBUG_INSN in one case vs. some unrelated other insn
   otherwise, that can affect further split_reg within the same function
2) as suggested by Surya in PR118615, it makes no sense to try to change
   behavior if the first call after curr_insn is in the same bb as curr_insn
3) split_reg is actually called sometimes from within inherit_in_ebb but
   sometimes from elsewhere; trying to use whatever last call to
   inherit_in_ebb saw last is a sure way to run into wrong-code issues,
   so instead of clearing the rtx var at the start of inherit_in_ebb it is
   now cleared at the end of it
4) calling the var latest_call_insn was weird, inherit_in_ebb walks the ebb
   backwards, so what the var contains is the first call insn within the
   ebb (after curr_insn)
5) the patch was using
   lra_process_new_insns (PREV_INSN (latest_call_insn), NULL, save,
                          "Add save<-reg");
   to emit the save insn before latest_call_insn.  That feels quite weird
   given that latest_call_insn has explicit support for adding stuff
   before some insn or after some insn, adding something before some
   insn doesn't really need to be done as addition after PREV_INSN
6) some formatting nits + new testcase + removal of xfail even on arm32

Bootstrapped/regtested on x86_64-linux/i686-linux (my usual
--enable-checking=yes,rtl,extra builds), aarch64-linux (normal default
bootstrap) and our distro scratch build
({x86_64,i686,aarch64,powerpc64le,s390x}-linux --enable-checking=release
LTO profiledbootstrap/regtest), I think Sam James tested on 32-bit arm
too.
On aarch64-linux this results in
-FAIL: gcc.dg/pr10474.c scan-rtl-dump pro_and_epilogue "Performing shrink-wrapping"

I admit I don't know the code well nor understood everything it is doing.

I have some concerns:
1) I wonder if there is a guarantee that first_call_insn if non-NULL will be
   always in between curr_insn and usage_insn when call_save_p; I'd hope
   yes because if usage_insn is before first_call_insn in the ebb,
   presumably it wouldn't need to find call save regs because the range
   wouldn't cross any calls
2) I wonder whether it wouldn't be better instead of inserting the saves
   before first_call_insn insert it at the start of the bb containing that
   call (after labels of course); emitting it right before a call could
   mislead code looking for argument slot initialization of the call
3) even when avoiding the use_insn = PREV_INSN (curr_insn);, I wonder
   if it is ok to use use_insn equal to curr_insn rather than the insns
   far later where we actually inserted it, but primarily because I don't
   understand the code much; I think for the !before_p case it is doing
   similar thing  on a shorter distance, the saves were emitted after
   curr_insn and we record it on curr_insn

2025-03-21  Surya Kumari Jangala  <jskumari@linux.ibm.com>
    Jakub Jelinek  <jakub@redhat.com>

PR rtl-optimization/116028
PR rtl-optimization/118615
* lra-constraints.cc (first_call_insn): New variable.
(split_reg): Spill register before first_call_insn if call_save_p
and the call is in a different bb in the ebb.
(split_if_necessary): Formatting fix.
(inherit_in_ebb): Set first_call_insn when handling a CALL_INSN.
For successful split_if_necessary with before_p, only change
use_insn if it emitted any new instructions before curr_insn.
Clear first_call_insn before returning.

* gcc.dg/ira-shrinkwrap-prep-1.c: Remove xfail for powerpc.
* gcc.dg/pr10474.c: Remove xfail for powerpc and arm.
* gcc.dg/pr118615.c: New test.

4 months agoc++: add fixed test [PR119378]
Patrick Palka [Fri, 21 Mar 2025 19:23:49 +0000 (15:23 -0400)] 
c++: add fixed test [PR119378]

Fixed by r15-123 (specifically the change to set processing_template_decl
when tsubsting UNBOUND_CLASS_TEMPLATE).

PR c++/119378

gcc/testsuite/ChangeLog:

* g++.dg/template/friend85.C: New test.

4 months agoOpenMP: 'interop' construct - add ME support + target-independent libgomp
Paul-Antoine Arras [Thu, 13 Mar 2025 16:16:41 +0000 (17:16 +0100)] 
OpenMP: 'interop' construct - add ME support + target-independent libgomp

This patch partially enables use of the OpenMP interop construct by adding
middle end support, mostly in the omplower pass, and in the target-independent
part of the libgomp runtime. It follows up on previous patches for C, C++ and
Fortran front ends support. The full interop feature requires another patch to
enable foreign runtime support in libgomp plugins.

gcc/ChangeLog:

* builtin-types.def
(BT_FN_VOID_INT_INT_PTR_PTR_PTR_INT_PTR_INT_PTR_UINT_PTR): New.
* gimple-low.cc (lower_stmt): Handle GIMPLE_OMP_INTEROP.
* gimple-pretty-print.cc (dump_gimple_omp_interop): New function.
(pp_gimple_stmt_1): Handle GIMPLE_OMP_INTEROP.
* gimple.cc (gimple_build_omp_interop): New function.
(gimple_copy): Handle GIMPLE_OMP_INTEROP.
* gimple.def (GIMPLE_OMP_INTEROP): Define.
* gimple.h (gimple_build_omp_interop): Declare.
(gimple_omp_interop_clauses): New function.
(gimple_omp_interop_clauses_ptr): Likewise.
(gimple_omp_interop_set_clauses): Likewise.
(gimple_return_set_retval): Handle GIMPLE_OMP_INTEROP.
* gimplify.cc (gimplify_scan_omp_clauses): Handle OMP_CLAUSE_INIT,
OMP_CLAUSE_USE and OMP_CLAUSE_DESTROY.
(gimplify_omp_interop): New function.
(gimplify_expr): Replace sorry with call to gimplify_omp_interop.
* omp-builtins.def (BUILT_IN_GOMP_INTEROP): Define.
* omp-low.cc (scan_sharing_clauses): Handle OMP_CLAUSE_INIT,
OMP_CLAUSE_USE and OMP_CLAUSE_DESTROY.
(scan_omp_1_stmt): Handle GIMPLE_OMP_INTEROP.
(lower_omp_interop_action_clauses): New function.
(lower_omp_interop): Likewise.
(lower_omp_1): Handle GIMPLE_OMP_INTEROP.

gcc/c/ChangeLog:

* c-parser.cc (c_parser_omp_clause_destroy): Make addressable.
(c_parser_omp_clause_init): Make addressable.

gcc/cp/ChangeLog:

* parser.cc (cp_parser_omp_clause_init): Make addressable.

gcc/fortran/ChangeLog:

* trans-openmp.cc (gfc_trans_omp_clauses): Make OMP_CLAUSE_DESTROY and
OMP_CLAUSE_INIT addressable.
* types.def (BT_FN_VOID_INT_INT_PTR_PTR_PTR_INT_PTR_INT_PTR_UINT_PTR):
New.

include/ChangeLog:

* gomp-constants.h (GOMP_DEVICE_DEFAULT_OMP_61, GOMP_INTEROP_TARGET,
GOMP_INTEROP_TARGETSYNC, GOMP_INTEROP_FLAG_NOWAIT): Define.

libgomp/ChangeLog:

* icv-device.c (omp_set_default_device): Check
GOMP_DEVICE_DEFAULT_OMP_61.
* libgomp-plugin.h (struct interop_obj_t): New.
(enum gomp_interop_flag): New.
(GOMP_OFFLOAD_interop): Declare.
(GOMP_OFFLOAD_get_interop_int): Declare.
(GOMP_OFFLOAD_get_interop_ptr): Declare.
(GOMP_OFFLOAD_get_interop_str): Declare.
(GOMP_OFFLOAD_get_interop_type_desc): Declare.
* libgomp.h (_LIBGOMP_OMP_LOCK_DEFINED): Define.
(struct gomp_device_descr): Add interop_func, get_interop_int_func,
get_interop_ptr_func, get_interop_str_func, get_interop_type_desc_func.
* libgomp.map: Add GOMP_interop.
* libgomp_g.h (GOMP_interop): Declare.
* target.c (resolve_device): Handle GOMP_DEVICE_DEFAULT_OMP_61.
(omp_get_interop_int): Replace stub with actual implementation.
(omp_get_interop_ptr): Likewise.
(omp_get_interop_str): Likewise.
(omp_get_interop_type_desc): Likewise.
(struct interop_data_t): Define.
(gomp_interop_internal): New function.
(GOMP_interop): Likewise.
(gomp_load_plugin_for_device): Load symbols for get_interop_int,
get_interop_ptr, get_interop_str and get_interop_type_desc.
* testsuite/libgomp.c-c++-common/interop-1.c: New test.

gcc/testsuite/ChangeLog:

* c-c++-common/gomp/interop-1.c: Remove dg-prune-output "sorry".
* c-c++-common/gomp/interop-2.c: Likewise.
* c-c++-common/gomp/interop-3.c: Likewise.
* c-c++-common/gomp/interop-4.c: Remove dg-message "not supported".
* g++.dg/gomp/interop-5.C: Likewise.
* gfortran.dg/gomp/interop-4.f90: Likewise.
* c-c++-common/gomp/interop-5.c: New test.
* gfortran.dg/gomp/interop-5.f90: New test.

Co-authored-by: Tobias Burnus <tburnus@baylibre.com>
4 months agoFortran: Fix typo in error message.
Jerry DeLisle [Fri, 21 Mar 2025 17:34:08 +0000 (10:34 -0700)] 
Fortran: Fix typo in error message.

PR fortran/119406

gcc/fortran/ChangeLog:

* resolve.cc (resolve_locality_spec): Add space in error
message.

4 months agoFortran: Fix typo in error message.
Jerry DeLisle [Fri, 21 Mar 2025 17:13:37 +0000 (10:13 -0700)] 
Fortran: Fix typo in error message.

PR fortran/119403

gcc/fortran/ChangeLog:

* interface.cc (compare_parameter): Fix typo.

4 months agoipa: target clone and mangling alias [PR114992]
Jason Merrill [Thu, 20 Mar 2025 16:57:15 +0000 (12:57 -0400)] 
ipa: target clone and mangling alias [PR114992]

Since the mangling of the second lambda changed (previously we counted all
lambdas, now we only count lambdas with the same signature), we
generate_mangling_alias for handler<lambda2> for backward compatibility.
Since handler is COMDAT, resolve_alias puts the alias in the same comdat
group as handler itself.  Then create_dispatcher_calls tries to add the
alias to the same comdat group as the dispatcher, but it's already in a
same_comdat_group, so we ICE.

It seems like we're just missing a remove_from_same_comdat_group before
add_to_same_comdat_group.

PR c++/114992

gcc/ChangeLog:

* multiple_target.cc (create_dispatcher_calls):
remove_from_same_comdat_group before add_to_same_comdat_group.

gcc/testsuite/ChangeLog:

* g++.target/i386/mangling-alias1.C: New test.