Martin Liska [Fri, 28 Jul 2017 10:36:36 +0000 (12:36 +0200)]
Do not handle VLA in sanitization (PR sanitizer/81460).
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81460
* sanopt.c (sanitize_rewrite_addressable_params): Do not rewrite
parameters that are of a variable-length.
2017-07-28 Martin Liska <mliska@suse.cz>
PR sanitizer/81460
* gcc.dg/asan/pr81460.c: New test.
Jakub Jelinek [Fri, 28 Jul 2017 07:11:51 +0000 (09:11 +0200)]
re PR tree-optimization/81578 (ICE in omp_reduction_init_op)
PR tree-optimization/81578
* tree-parloops.c (build_new_reduction): Bail out if
reduction_code isn't one of the standard OpenMP reductions.
Move the details printing after that decision.
Jakub Jelinek [Thu, 27 Jul 2017 19:13:42 +0000 (21:13 +0200)]
re PR c/45784 (gcc OpenMP - error: invalid controlling predicate)
PR c/45784
* c-omp.c (c_finish_omp_for): If the condition is wrapped in
rhs of COMPOUND_EXPR(s), skip them and readd their lhs into
new COMPOUND_EXPRs around the rhs of the comparison.
* testsuite/libgomp.c/pr45784.c: New test.
* testsuite/libgomp.c++/pr45784.C: New test.
[PATCH][AArch64] Fix missing optimization for CMP+AND
During combine GCC tries to merge CMP (with zero) and AND into a TST. However,
in cases where an ANDS operand is not compatible, this was being missed. Adding
a define_split where this operand was moved to a register seems to help out.
Committed on behalf of Sudi Das
---
gcc/
2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Sudakshina Das <sudi.das@arm.com>
* config/aarch64/aarch64.md
(define_split for and<mode>3nr_compare): Move
non aarch64_logical_operand to a register.
(define_split for and_<SHIFT:optab><mode>3nr_compare0): Move non
register immediate operand to a register.
* config/aarch64/predicates.md (aarch64_mov_imm_operand): New.
gcc/testsuite
2017-07-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
Sudakshina Das <sudi.das@arm.com>
* gcc.target/aarch64/tst_imm_split_1.c: New Test.
Co-Authored-By: Sudakshina Das <sudi.das@arm.com>
From-SVN: r250631
Richard Biener [Thu, 27 Jul 2017 12:01:21 +0000 (12:01 +0000)]
re PR middle-end/81502 (In some cases the data is moved to memory unnecessarily [partial regression])
2017-07-27 Richard Biener <rguenther@suse.de>
PR tree-optimization/81502
* tree-ssa.c (non_rewritable_lvalue_p): Handle BIT_INSERT_EXPR
with incompatible but same sized type.
(execute_update_addresses_taken): Likewise.
James Greenhalgh [Thu, 27 Jul 2017 11:42:17 +0000 (11:42 +0000)]
[Patch (preapproved)] Guard Copy Header pass on
While answering a user question on the equivalence of
-ftree-loop-vectorize + -ftree-slp-vectorize and -ftree-vectorize I
spotted one case which broke the equivalence. pass_ch::process_loop_p
was guarded on flag_tree_vectorize, meaning you would get it for
-ftree-vectorize, but not for -ftree-loop-vectorize/-ftree-slp-vectorize.
This patch fixes that, getting rid of the only use of flag_tree_vectorize
in the code base.
gcc/
* tree-ssa-loop-ch.c (pass_ch::process_loop_p): Guard on
flag_tree_loop_vectorize rather than flag_tree_vectorize.
The little-endian VSX code uses rotates to swap the two 64-bit halves of
128-bit scalar modes. This is fine for TImode and V1TImode, but it
isn't really valid to use RTL rotates on floating-point modes like
KFmode and TFmode, and doing that triggered an assert added by the
SVE series. This patch uses bit-casts to V1TImode instead.
2017-07-27 Richard Sandiford <richard.sandiford@linaro.org>
gcc/
* config/rs6000/rs6000-protos.h (rs6000_emit_le_vsx_permute): Declare.
* config/rs6000/rs6000.c (rs6000_gen_le_vsx_permute): Replace with...
(rs6000_emit_le_vsx_permute): ...this. Take the destination as input.
Emit instructions rather than returning an expression. Handle TFmode
and KFmode by casting to TImode.
(rs6000_emit_le_vsx_load): Update to use rs6000_emit_le_vsx_permute.
(rs6000_emit_le_vsx_store): Likewise.
* config/rs6000/vsx.md (VSX_TI): New iterator.
(*vsx_le_permute_<mode>): Use it instead of VSX_LE_128.
(*vsx_le_undo_permute_<mode>): Likewise.
(*vsx_le_perm_load_<mode>): Use rs6000_emit_le_vsx_permute to
emit the split sequence.
(*vsx_le_perm_store_<mode>): Likewise.
Jakub Jelinek [Thu, 27 Jul 2017 08:49:16 +0000 (10:49 +0200)]
re PR tree-optimization/81555 (Wrong code at -O1)
PR tree-optimization/81555
PR tree-optimization/81556
* tree-ssa-reassoc.c (rewrite_expr_tree): Add NEXT_CHANGED argument,
if true, force CHANGED for the recursive invocation.
(reassociate_bb): Remember original length of ops array, pass
len != orig_len as NEXT_CHANGED in rewrite_expr_tree call.
* gcc.c-torture/execute/pr81555.c: New test.
* gcc.c-torture/execute/pr81556.c: New test.
Jakub Jelinek [Thu, 27 Jul 2017 07:53:33 +0000 (09:53 +0200)]
attribs.c (decl_attributes): Imply noinline, noclone and no_icf attributes for noipa attribute.
* attribs.c (decl_attributes): Imply noinline, noclone and no_icf
attributes for noipa attribute. For naked attribute use
lookup_attribute first before lookup_attribute_spec.
* final.c (rest_of_handle_final): Disable IPA RA for functions with
noipa attribute.
* ipa-visibility.c (non_local_p): Fix comment typos. Return true
for functions with noipa attribute.
(cgraph_externally_visible_p): Return true for functions with noipa
attribute.
* cgraph.c (cgraph_node::get_availability): Return AVAIL_INTERPOSABLE
for functions with noipa attribute.
* doc/extend.texi: Document noipa function attribute.
* tree-ssa-structalias.c (refered_from_nonlocal_fn): Set *nonlocal_p
also for functions with noipa attribute.
(ipa_pta_execute): Set nonlocal_p also for nodes with noipa attribute.
c-family/
* c-attribs.c (c_common_attribute_table): Add noipa attribute.
(handle_noipa_attribute): New function.
testsuite/
* gcc.dg/attr-noipa.c: New test.
* gcc.dg/ipa/ipa-pta-18.c: New test.
* gcc.dg/ipa/ipa-sra-11.c: New test.
[gcc]
2017-07-26 Michael Meissner <meissner@linux.vnet.ibm.com>
* config/rs6000/rs6000-cpus.def (ISA_2_7_MASKS_SERVER): Delete
-mvsx-small-integer option.
(ISA_3_0_MASKS_IEEE): Likewise.
(OTHER_VSX_VECTOR_MASKS): Likewise.
(POWERPC_MASKS): Likewise.
* config/rs6000/rs6000.opt (-mvsx-small-integer): Likewise.
* config/rs6000/rs6000.c (rs6000_hard_regno_mode_ok): Simplify
code, only testing for DImode being allowed in non-VSX floating
point registers.
(rs6000_init_hard_regno_mode_ok): Change TARGET_VSX_SMALL_INTEGER
to TARGET_P8_VECTOR test. Remove redundant VSX test inside of
another VSX test.
(rs6000_option_override_internal): Delete -mvsx-small-integer.
(rs6000_expand_vector_set): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(rs6000_secondary_reload_simple_move): Likewise.
(rs6000_preferred_reload_class): Delete TARGET_VSX_SMALL_INTEGER,
since TARGET_P9_VECTOR was already tested.
(rs6000_opt_masks): Remove -mvsx-small-integer.
* config/rs6000/vsx.md (vsx_extract_<mode>): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(vsx_extract_<mode>_p9): Delete TARGET_VSX_SMALL_INTEGER, since a
test for TARGET_VEXTRACTUB was used, and that uses
TARGET_P9_VECTOR.
(p9 extract splitter): Likewise.
(vsx_extract_<mode>_di_p9): Likewise.
(vsx_extract_<mode>_store_p9): Likewise.
(vsx_extract_si): Delete TARGET_VSX_SMALL_INTEGER, since a test
for TARGET_P9_VECTOR was used. Delete code that is now dead with
the elimination of TARGET_VSX_SMALL_INTEGER.
(vsx_extract_<mode>_p8): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_fl_<FL_CONV:mode>): Likewise.
(vsx_ext_<VSX_EXTRACT_I:VS_scalar>_ufl_<FL_CONV:mode>): Likewise.
(vsx_set_<mode>_p9): Likewise.
(vsx_set_v4sf_p9): Likewise.
(vsx_set_v4sf_p9_zero): Likewise.
(vsx_insert_extract_v4sf_p9): Likewise.
(vsx_insert_extract_v4sf_p9_2): Likewise.
* config/rs6000/rs6000.md (sign extend splitter): Change
TARGET_VSX_SMALL_INTEGER to TARGET_P8_VECTOR test.
(floatsi<mode>2_lfiwax_mem): Likewise.
(floatunssi<mode>2_lfiwzx_mem): Likewise.
(float<QHI:mode><FP_ISA3:mode>2): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(float<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2): Likewise.
(floatuns<QHI:mode><FP_ISA3:mode>2_internal): Likewise.
(fix_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fix_trunc<mode>si2_stfiwx): Likewise.
(fix_trunc<mode>si2_internal): Likewise.
(fix_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fix_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fixuns_trunc<mode>si2): Change TARGET_VSX_SMALL_INTEGER to
TARGET_P8_VECTOR test.
(fixuns_trunc<mode>si2_stfiwx): Likewise.
(fixuns_trunc<SFDF:mode><QHI:mode>2): Delete
TARGET_VSX_SMALL_INTEGER, since a test for TARGET_P9_VECTOR was
used.
(fixuns_trunc<SFDF:mode><QHI:mode>2_internal): Likewise.
(fctiw<u>z_<mode>_smallint): Delete TARGET_VSX_SMALL_INTEGER,
since a test for TARGET_P9_VECTOR was used.
(splitter for loading small constants): Likewise.
[gcc/testsuite]
2017-07-25 Michael Meissner <meissner@linux.vnet.ibm.com>
Tony Reix [Wed, 26 Jul 2017 21:43:28 +0000 (21:43 +0000)]
configure.ac: Check for XCOFF32/XCOFF64.
* configure.ac: Check for XCOFF32/XCOFF64. Check for loadquery.
* filetype.awk: Separate AIX XCOFF32 and XCOFF64.
* xcoff.c: Add support for AIX XCOFF32 and XCOFF64 formats.
* configure, config.h.in: Regenerate.
H.J. Lu [Wed, 26 Jul 2017 19:13:23 +0000 (19:13 +0000)]
x86: Properly check saved register CFA offset
X86 prologue saves register at CFA offset. Since its location on stack
is computed as CFA - its CFA_OFFSET, CFA_OFFSET points the end of the
saved register area on stack. This patch updates sp_valid_at and
fp_valid_at to properly check saved register CFA offset.
James Greenhalgh [Wed, 26 Jul 2017 17:40:39 +0000 (17:40 +0000)]
[Patch AArch64 obvious] Unify address costs to generic_addrcost_table
The special case address cost tables for Cortex-A57 and qdf24xx are no
different from the generic address cost table. We should just use the
address cost table directly. If this changes in future, a core is welcome
to add new address cost tables.
gcc/
* config/aarch64/aarch64.c (cortexa57_addrcost_table): Remove.
(qdf24xx_addrcost_table): Likewise.
(cortexa57_tunings): Update to use generic_branch_cost.
(cortexa72_tunings): Likewise.
(cortexa73_tunings): Likewise.
(qdf24xx_tunings): Likewise.
Leonid Koppel [Wed, 26 Jul 2017 17:39:26 +0000 (17:39 +0000)]
PR c++/67054 - Inherited ctor with non-default-constructible members
PR c++/67054 - Inherited ctor with non-default-constructible members
* method.c (walk_field_subobs) Consider member initializers (NSDMIs)
when deducing an inheriting constructor.
James Greenhalgh [Wed, 26 Jul 2017 17:39:12 +0000 (17:39 +0000)]
[Patch AArch64 Obvious] Unify branch costs to generic_branch_cost
All the cores in AArch64 use the pair {1, 3} for their branch costs. As
that is covered by generic_branch_cost, we can just use that directly and
save the tiny amount of redundant code. If in future any core wants to
modify this, they can always add a special-case branch-cost back.
Sebastian Huber [Wed, 26 Jul 2017 12:39:43 +0000 (12:39 +0000)]
[SPARC] Add -mfsmuld option
Add the -mfsmuld option to control the generation of the FsMULd
instruction. In general, this instruction is available in architecture
version V8 and V9 CPUs with FPU. Some CPUs of this category do not
support this instruction properly, e.g. AT697E, AT697F and UT699. Some
CPUs of this category do not implement it in hardware, e.g. LEON3/4 with
GRFPU-lite.
Richard Biener [Wed, 26 Jul 2017 11:35:45 +0000 (11:35 +0000)]
gimple-match-head.c (do_valueize): Return OP if valueize returns NULL_TREE.
2017-07-26 Richard Biener <rguenther@suse.de>
* gimple-match-head.c (do_valueize): Return OP if valueize
returns NULL_TREE.
(get_def): New helper to get at the def stmt of a SSA name
if valueize allows.
* genmatch.c (dt_node::gen_kids_1): Use get_def instead of
do_valueize to get at the def stmt.
(dt_operand::gen_gimple_expr): Simplify do_valueize calls.
* gcc/testsuite/gcc.dg/pr70920-2.c: Adjust for transform already
happening in ccp1.
* gcc/testsuite/gcc.dg/pr70920-4.c: Likewise.
Fix PR46932: Block auto increment on frame pointer
Block auto increment on frame pointer references. This is never
beneficial since the SFP expands into SP+C or FP+C during register
allocation. The generated code for the testcase is now as expected:
Martin Liska [Wed, 26 Jul 2017 08:52:37 +0000 (10:52 +0200)]
Move non-local goto expansion after parm_birth_insn (PR sanitize/81186).
2017-07-26 Martin Liska <mliska@suse.cz>
PR sanitize/81186
* function.c (expand_function_start): Make expansion of
nonlocal_goto_save_area after parm_birth_insn.
2017-07-26 Martin Liska <mliska@suse.cz>
PR sanitize/81186
* gcc.dg/asan/pr81186.c: New test.
Carl Love [Tue, 25 Jul 2017 23:16:25 +0000 (23:16 +0000)]
extend.texi: Update the built-in documentation file for the existing built-in functions...
gcc/ChangeLog:
2017-07-25 Carl Love <cel@us.ibm.com>
* doc/extend.texi: Update the built-in documentation file for the
existing built-in functions
vector signed char vec_cnttz (vector signed char);
vector unsigned char vec_cnttz (vector unsigned char);
vector signed short vec_cnttz (vector signed short);
vector unsigned short vec_cnttz (vector unsigned short);
vector signed int vec_cnttz (vector signed int);
vector unsigned int vec_cnttz (vector unsigned int);
vector signed long long vec_cnttz (vector signed long long);
vector unsigned long long vec_cnttz (vector unsigned long long);
gcc/testsuite/ChangeLog:
2017-07-25 Carl Love <cel@us.ibm.com>
* gcc.target/powerpc/builtins-4-p9-runnable.c: Add test file for
vec_cnttz builtins.
Ian Lance Taylor [Tue, 25 Jul 2017 22:54:23 +0000 (22:54 +0000)]
compiler: clean up unresolved placeholders for pointer types
Add a new helper routine Type::finish_pointer_types that walks through
the pointer type cache and looks for placeholder types that may have
been created at some point before conversion of named types, and
invokes Type::finish_backend() on said placeholders. This is needed
to handle cases where the compiler manufactures a pointer type as part
of lowering, then a placeholder is created for it due to a call to
Type::backend_type_size(), but there is no explicit reference to the
type in user code.
Jonathan Wakely [Tue, 25 Jul 2017 17:47:52 +0000 (18:47 +0100)]
Remove deprecated iostream members for C++17
* include/bits/ios_base.h (ios_base::io_state, ios_base::open_mode)
(ios_base::seek_dir): Remove for C++17.
* include/std/streambuf (basic_streambuf::stossc): Remove for C++17.
Add deprecated attribute for C++11 and C++14.
* testsuite/27_io/types/1.cc: Don't run for C++17 and later.
* testsuite/27_io/types/4.cc: New.
Jim Wilson [Tue, 25 Jul 2017 16:06:37 +0000 (16:06 +0000)]
Fix i686-pc-cygwin build failure.
gcc/
PR bootstrap/81521
* config/i386/winnt-cxx.c (i386_pe_adjust_class_at_definition): Look
for FUNCTION_DECLs in TYPE_FIELDS rather than TYPE_METHODS.
i386.c (ix86_decompose_address): Do not check for register RTX when looking at index_reg or base_reg.
* config/i386/i386.c (ix86_decompose_address): Do not check for
register RTX when looking at index_reg or base_reg.
* config/i386/i386.h (INCOMING_RETURN_ADDR_RTX): Use stack_pointer_rtx.
Eric Botcazou [Tue, 25 Jul 2017 14:47:16 +0000 (14:47 +0000)]
gimple.c (gimple_assign_set_rhs_with_ops): Do not ask gsi_replace to update EH info here.
* gimple.c (gimple_assign_set_rhs_with_ops): Do not ask gsi_replace
to update EH info here.
ada/
* checks.adb (Apply_Divide_Checks): Ensure that operands are not
evaluated twice.
c-attribs.c (c_common_attribute_table): Add entry for "patchable_function_entry".
2017-07-07 Torsten Duwe <duwe@suse.de>
c-family/
* c-attribs.c (c_common_attribute_table): Add entry for
"patchable_function_entry".
lto/
* lto-lang.c (lto_attribute_table): Add entry for
"patchable_function_entry".
* common.opt: Introduce -fpatchable-function-entry
command line option, and its variables function_entry_patch_area_size
and function_entry_patch_area_start.
* opts.c (common_handle_option): Add -fpatchable_function_entry_ case,
including a two-value parser.
* target.def (print_patchable_function_entry): New target hook.
* targhooks.h (default_print_patchable_function_entry): New function.
* targhooks.c (default_print_patchable_function_entry): Likewise.
* toplev.c (process_options): Switch off IPA-RA if
patchable function entries are being generated.
* varasm.c (assemble_start_function): Look at the
patchable-function-entry command line switch and current
function attributes and maybe generate NOP instructions by
calling the print_patchable_function_entry hook.
* doc/extend.texi: Document patchable_function_entry attribute.
* doc/invoke.texi: Document -fpatchable_function_entry
command line option.
* doc/tm.texi.in (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
New target hook.
* doc/tm.texi: Re-generate.
* c-c++-common/patchable_function_entry-default.c: New test.
* c-c++-common/patchable_function_entry-decl.c: Likewise.
* c-c++-common/patchable_function_entry-definition.c: Likewise.
David Edelsohn [Tue, 25 Jul 2017 13:11:37 +0000 (13:11 +0000)]
dwarf2asm.c (dw2_asm_output_nstring): Encode double quote character for AIX.
* dwarf2asm.c (dw2_asm_output_nstring): Encode double quote
character for AIX.
* dwarf2out.c (output_macinfo): Copy debug_line_section_label
to dl_section_ref. On AIX, append an expression to subtract
the size of the section length to dl_section_ref.
Do not silently continue if config.{build,host,gcc} fails
If config.{build,host,gcc} fails, configure currently silently
continues. This then makes it much harder than necessary to notice
you made a stupid pasto in config.gcc (and where exactly).
* configure.ac: If any of the config.* scripts fail, exit 1.
* configure: Regenerate.
Martin Liska [Tue, 25 Jul 2017 10:20:23 +0000 (12:20 +0200)]
Fix wrong condition in ipa-visibility.c (PR ipa/81520).
2017-07-25 Martin Liska <mliska@suse.cz>
PR ipa/81520
* ipa-visibility.c (function_and_variable_visibility): Make the redirection
just on target that do supporting aliasing. Fix GNU coding style.
2017-07-25 Martin Liska <mliska@suse.cz>
Marek Polacek [Tue, 25 Jul 2017 09:49:08 +0000 (09:49 +0000)]
re PR c/81364 (Bogus -Wmultistatement-macros warning)
PR c/81364
* c-parser.c (c_parser_else_body): Don't warn about multistatement
macro expansion if the body is in { }.
(c_parser_while_statement): Likewise.
(c_parser_for_statement): Likewise.
Daniel Santos [Mon, 24 Jul 2017 22:00:35 +0000 (22:00 +0000)]
PR testsuite/80759 Fix broken tests in ms-sysv.exp
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* gcc.target/x86_64/abi/ms-sysv/do-test.S
(ELFFN_BEGIN): Rename to FN_TYPE.
(ELFFN_END): Rename to FN_SIZE.
(ASMNAME): New macro.
(FUNC): Rename to FUNC_BEGIN, use ASMNAME and use .globl instead of
.global.
(FUNC_END): Use ASMNAME.
(test_data_save): Remove.
(test_data_input): Likewise.
(test_data_output: Likewise.
(test_data_fn): Likewise.
(test_data_retaddr): Likewise.
(regs_to_mem): Make globals, use r10 instead of rax.
(mem_to_regs): Likewise.
(do_test_unaligned): Remove .cfi directives, remove pushf/popf, move
body to ms-sysv.c.
(do_test_aligned): Likewise.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.c:
Add dg-* directives.
(PASTE_STR): New macro.
(ASMNAME): Likewise.
(LOAD_TEST_DATA_ADDR): Likewise.
(TEST_DATA_OFFSET): Likewise.
(do_test_body0): New C function.
(do_test_body): New inline assembly routine.
* gcc.target/x86_64/abi/ms-sysv/ms-sysv.exp
(runtest_ms_sysv): Modify.
Daniel Santos [Mon, 24 Jul 2017 21:59:57 +0000 (21:59 +0000)]
PR testsuite/80759 Fix -mcall-ms2sysv-xlogues on Darwin and Solaris
2017-07-24 Daniel Santos <daniel.santos@pobox.com>
PR testsuite/80759
* config.host: include i386/t-msabi for darwin and solaris.
* config/i386/i386-asm.h
(ELFFN): Rename to FN_TYPE.
(FN_SIZE): New macro.
(FN_HIDDEN): Likewise.
(ASMNAME): Likewise.
(FUNC_START): Rename to FUNC_BEGIN, use ASMNAME, replace .global with
.globl.
(HIDDEN_FUNC): Use ASMNAME and .globl instead of .global.
(SSE_SAVE): Convert to cpp macro, hard-code offset (always 0x60).
* config/i386/resms64.S: Use SSE_SAVE as cpp macro instead of gas
.macro.
* config/i386/resms64f.S: Likewise.
* config/i386/resms64fx.S: Likewise.
* config/i386/resms64x.S: Likewise.
* config/i386/savms64.S: Likewise.
* config/i386/savms64f.S: Likewise.
cfgrtl: Don't crash in rtl_dump_bb if BB_END(bb) is NULL
Currently rtl_dump_bb crashes if BB_END(bb) is NULL, like it can be
during expand (rtl_dump_bb can be called at any time, by the emergency
dump added recently for example).
This fixes it.
* cfgrtl.c (rtl_dump_bb): Don't call NEXT_INSN on NULL.
re PR target/79041 (aarch64 backend emits R_AARCH64_ADR_PREL_PG_HI21 relocation despite -mpc-relative-literal-loads option being used)
Fix PR79041
As described in PR79041, -mcmodel=large -mpc-relative-literal-loads
may be used to avoid generating ADRP/ADD or ADRP/LDR. However both
trunk and GCC7 may still emit ADRP for some constant pool literals.
Fix this by adding a aarch64_pcrelative_literal_loads check.
gcc/
PR target/79041
* config/aarch64/aarch64.c (aarch64_classify_symbol):
Avoid SYMBOL_SMALL_ABSOLUTE for literals with pc-relative literals
gcc/testsuite/
* gcc.target/aarch64/pr79041-2.c: New test.
projects / thirdparty / gcc.git / log
