Chris Demetriou [Mon, 29 Jul 2002 22:07:27 +0000 (22:07 +0000)]
configure.in (mips*-*-*): Add a test to see if MIPS libgloss linker scripts use STARTUP directives...
2002-07-29 Chris Demetriou <cgd@broadcom.com>
* configure.in (mips*-*-*): Add a test to see if MIPS libgloss
linker scripts use STARTUP directives consistently.
* configure: Regenerate.
* config.in: Regenerate.
* config/mips/elf.h (STARTFILE_SPEC): Define conditionally, based
on whether HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES is defined.
* config/mips/elf64.h (STARTFILE_SPEC): Likewise.
* config/mips/isa3264.h (STARTFILE_SPEC): Do not redefine if
HAVE_MIPS_LIBGLOSS_STARTUP_DIRECTIVES is set; the result
will be the same.
emit-rtl.c (set_mem_attributes_minus_bitpos): Rename from set_mem_attributes and add BITPOS argument.
* emit-rtl.c (set_mem_attributes_minus_bitpos): Rename from
set_mem_attributes and add BITPOS argument. Subtract it from
OFFSET when same is adjusted.
(set_mem_attributes): New wrapper function.
* expr.c (expand_assignment): Use set_mem_attributes_minus_bitpos;
remove offset adjustment hack.
* expr.h (set_mem_attributes_minus_bitpos): Declare.
* gensupport.c: Include hashtab.h.
(insn_elision, condition_table, hash_c_test, cmp_c_test,
maybe_eval_c_test): New routines and data structures to
support insn elision.
(init_md_reader): Read and initialize the condition_table.
(read_md_rtx): Discard insn patterns whose C test is provably
always false.
* gensupport.h: Declare new functions and data structures.
* genconditions.c, dummy-conditions.c: New files.
* Makefile.in: Build genconditions; run it to construct
insn-conditions.c; build that and link it into most gen*
programs.
(HOST_SUPPORT, HOST_EARLY_SUPPORT): New variables.
(GEN): Delete, unused.
(STAGESTUFF): Update.
* gencodes.c: (gen_insn): #define CODE_FOR_xxx equal to
CODE_FOR_nothing for all elided patterns.
(main): Tweaked to support this.
* genflags.c (gen_proto): Emit a static inline generator
function here for all elided patterns, which simply returns
NULL_RTX.
(gen_insn): Do not define HAVE_xxx for elided patterns.
(main): Tweaked to support this. No need to forward-declare
struct rtx_def.
* genrecog.c: Do not bother emitting the C test if it's known
to be true at compile time.
Richard Earnshaw [Mon, 29 Jul 2002 12:41:46 +0000 (12:41 +0000)]
arm.md (sibcall, [...]): Add RETURN as part of the pattern, remove clobber of LR.
* arm.md (sibcall, sibcall_value): Add RETURN as part of the pattern,
remove clobber of LR.
(sibcall_insn, sibcall_value_insn): Update accordingly.
(sibcall_epilogue): Remove debugging comment from assembler stream.
defaults.h (ASM_OUTPUT_MEASURED_SIZE): Take only two arguments.
* defaults.h (ASM_OUTPUT_MEASURED_SIZE): Take only two
arguments. Always use ".-symbol" as expression argument.
* doc/tm.texi: Update to match. Document requirement for
".size symbol, .-symbol" to be acceptable to assembler.
Roger Sayle [Sun, 28 Jul 2002 05:34:04 +0000 (05:34 +0000)]
builtins.def [...]: Require an explicit ATTRS argument.
* builtins.def [DEF_GCC_BUILTIN]: Require an explicit ATTRS
argument. Mark BUILT_IN_RETURN, BUILT_IN_EH_RETURN,
BUILT_IN_LONGJMP and BUILT_IN_TRAP as noreturn, the ISO C99
floating point unordered comparisons (e.g. __builtin_isgreater)
as const, and leave the remaining GCC_BUILTINs unchanged.
* c-decl.c (builtin_function): No need to explicitly mark
BUILT_IN_RETURN and BUILT_IN_EH_RETURN as noreturn.
* cp/decl.c (builtin_function_1): No need to explicitly mark
BUILT_IN_RETURN and BUILT_IN_EH_RETURN as noreturn.
Roger Sayle [Sun, 28 Jul 2002 02:11:05 +0000 (02:11 +0000)]
Makefile.in: rtlanal.o now depends upon real.h.
* Makefile.in: rtlanal.o now depends upon real.h.
* flags.h [flag_signaling_nans]: New flag.
[HONOR_SNANS]: New macro.
* toplev.c [flag_signaling_nans]: Initialize to false.
(f_options): Add processing for "-fsignaling-nans".
(set_fast_math_flags): Clear flag_signaling_nans with -ffast-math.
(process_options): flag_signaling_nans implies flag_trapping_math.
* c-common.c (cb_register_builtins): Define __SUPPORT_SNAN__
when -fsignaling-nans. First step to implementing WG14's N965.
* fold-const.c (fold) [MULT_EXPR]: Conditionalize transforming
1.0 * x into x, and -1.0 * x into -x on !HONOR_SNANS.
[RDIV_EXPR]: Conditionalize x/1.0 into x on !HONOR_SNANS.
* simplify-rtx.c (simplify_relational_operation): Conditionalize
transforming abs(x) < 0.0 into false on !HONOR_SNANS.
* rtlanal.c: #include real.c for TARGET_FLOAT_FORMAT definitions
required by HONOR_SNANS. (may_trap_p): Floating point DIV, MOD,
UDIV, UMOD, GE, GT, LE, LT and COMPARE may always trap with
-fsignaling_nans. EQ and NE only trap for flag_signaling_nans
not flag_trapping_math (i.e. HONOR_SNANS but not HONOR_NANS).
* doc/invoke.texi: Document new -fsignaling-nans compiler option.
Stan Shebs [Sat, 27 Jul 2002 20:54:52 +0000 (20:54 +0000)]
configure.in: Rename config_gtfiles to target_gtfiles.
* configure.in: Rename config_gtfiles to target_gtfiles.
* configure: Regenerate.
* doc/gty.texi: Update reference.
* config.gcc (powerpc-*-darwin*): Set target_gtfiles
instead of appending to it.
Alan Modra [Fri, 26 Jul 2002 23:46:47 +0000 (23:46 +0000)]
rs6000.c (rs6000_traceback_name): New var.
* config/rs6000/rs6000.c (rs6000_traceback_name): New var.
(rs6000_traceback): New var.
(rs6000_override_options): Set rs6000_traceback.
(rs6000_output_function_epilogue): Implement traceback options.
* config/rs6000/rs6000.h (TARGET_OPTIONS): Add "traceback=".
(rs6000_traceback_name): Declare.
* config/rs6000/rs6000.c (output_profile_hook): Don't generate profile
label reference when NO_PROFILE_COUNTERS.
Jason Merrill [Fri, 26 Jul 2002 20:10:43 +0000 (16:10 -0400)]
function.c (assign_parms): Handle frontend-directed pass by invisible reference.
* function.c (assign_parms): Handle frontend-directed pass by
invisible reference.
cp/
* call.c (build_over_call): Likewise.
(cp_convert_parm_for_inlining): New fn.
(convert_for_arg_passing): New fn.
(convert_default_arg, build_over_call): Use it.
(type_passed_as): New fn.
* pt.c (tsubst_decl): Use it.
* decl2.c (cp_build_parm_decl): New fn.
(build_artificial_parm): Use it.
(start_static_storage_duration_function): Likewise.
* decl.c (start_cleanup_fn, grokdeclarater): Likewise.
(grokparms): Don't mess with DECL_ARG_TYPE.
* typeck.c (convert_arguments): Use convert_for_arg_passing.
* cp-lang.c (LANG_HOOKS_TREE_INLINING_CONVERT_PARM_FOR_INLINING):
Define.
* cp-tree.h: Declare new fns.
Alan Modra [Fri, 26 Jul 2002 02:47:35 +0000 (02:47 +0000)]
rs6000.md: Enable patterns using rlwinm for PowerPC64.
* config/rs6000/rs6000.md: Enable patterns using rlwinm for
PowerPC64. Replace "T" and "S" constraints with "n" when the
predicate will do. Formatting fixes.
(extzvsi_internal2): Use "andi.", "andis." and attr type of "compare"
as for extzvsi_internal1.
invoke.texi: Document -mabi=meabi, and expand on the EABI description.
* doc/invoke.texi: Document -mabi=meabi, and expand on the EABI
description. Document -mips32, -mips64, and the associated -march
values. Describe the "mipsN" arguments to -march. Say that the
-mipsN options are equivalent to -march. Reword the description
of default type sizes.
* toplev.h (target_flags_explicit): Declare.
* toplev.c (target_flags_explicit): New var.
(set_target_switch): Update target_flags_explicit.
* config/mips/abi64.h (SUBTARGET_TARGET_OPTIONS): Undefine.
* config/mips/elf64.h (MIPS_ISA_DEFAULT): Undefine.
* config/mips/iris6.h (SUBTARGET_ASM_SPEC): -mabi=64 implies -mips3.
* config/mips/isa3264.h (MIPS_ENABLE_EMBEDDED_O32): Undefine.
* config/mips/mips.h (mips_cpu_info): New struct.
(mips_cpu_string, mips_explicit_type_size_string): Remove.
(mips_cpu_info_table, mips_arch_info, mips_tune_info): Declare.
(MIPS_CPP_SET_PROCESSOR): New macro.
(TARGET_CPP_BUILTINS): Declare a macro for each supported processor.
Define _MIPS_ARCH and _MIPS_TUNE.
(MIPS_ISA_DEFAULT): Don't provide a default value. Instead...
(MIPS_CPU_STRING_DEFAULT): Set to "from-abi" if neither it nor
MIPS_ISA_DEFAULT were already defined.
(MULTILIB_DEFAULTS): Add MULTILIB_ABI_DEFAULT.
(TARGET_OPTIONS): Remove -mcpu and -mexplicit-type-size.
(ABI_NEEDS_32BIT_REGS, ABI_NEEDS_64BIT_REGS): New.
(GAS_ASM_SPEC): Remove -march, -mcpu, -mgp* and -mabi rules.
(ABI_GAS_ASM_SPEC): Remove.
(MULTILIB_ABI_DEFAULT, ASM_ABI_DEFAULT_SPEC): New macros.
(ASM_SPEC): Add -mgp32, -mgp64, -march, -mabi=eabi and -mabi=o64.
Invoke %(asm_abi_default_spec) if no ABI was specified.
(CC1_SPEC): Remove ISA -> register-size rules.
(EXTRA_SPECS): Remove abi_gas_asm_spec. Add asm_abi_default_spec.
* config/mips/mips.c (mips_arch_info, mips_tune_info): New vars.
(mips_cpu_string, mips_explicit_type_size_string): Remove.
(mips_cpu_info_table): New array.
(mips_set_architecture, mips_set_tune): New fns.
(override_options): Rework to make -mipsN equivalent to -march.
Detect more erroneous cases, including those removed from CC1_SPEC.
Don't change the ABI based on architecture, or vice versa.
Unify logic with GAS.
(mips_asm_file_start): Get architecture name from mips_arch_info.
(mips_strict_matching_cpu_name_p, mips_matching_cpu_name_p): New fns.
(mips_parse_cpu): Take the name of the option as argument. Handle
'from-abi'. Raise an error if the option is wrong.
(mips_cpu_info_from_isa): New fn.
[gcc/testsuite]
* gcc.dg/mips-args-[123].c: New tests.
Gabriel Dos Reis [Thu, 25 Jul 2002 08:58:07 +0000 (08:58 +0000)]
c-common.c (c_sizeof_or_alignof_type): Take a third argument for complaining.
* c-common.c (c_sizeof_or_alignof_type): Take a third argument for
complaining.
* c-common.h (c_sizeof): Adjust definition.
(c_alignof): Likewise.
* c-tree.h (c_sizeof_nowarn): Now macro.
* c-typeck.c (c_sizeof_nowarn): Remove definition.
cp/
* cp-tree.h (cxx_sizeof_nowarn): Now a macro.
(cxx_sizeof_or_alignof_type): Take a third argument.
(cxx_sizeof): Adjust definition.
(cxx_alignof): Likewise.
* init.c (build_delete): Use cxx_sizeof_nowarn to reflect reality.
* typeck.c (cxx_sizeof_or_alignof_type): Take a third argument for
complaining.
(c_sizeof_nowarn): Remove definition.
(build_unary_op): Use cxx_sizeof_nowarn.
defaults.h (ASM_OUTPUT_TYPE_DIRECTIVE, [...]): New default definitions of new macros.
* defaults.h (ASM_OUTPUT_TYPE_DIRECTIVE, ASM_OUTPUT_SIZE_DIRECTIVE,
ASM_OUTPUT_MEASURED_SIZE): New default definitions of new macros.
* doc/tm.texi: Document them. Also document SIZE_ASM_OP,
TYPE_ASM_OP, and TYPE_OPERAND_FMT.
* config/elfos.h, config/netbsd-aout.h, config/openbsd.h,
config/alpha/elf.h, config/arm/elf.h, config/avr/avr.h,
config/cris/aout.h, config/i386/freebsd-aout.h,
config/i386/sco5.h, config/ia64/ia64.c, config/ip2k/ip2k.h,
config/m68k/m68kelf.h, config/m68k/m68kv4.h, config/m88k/m88k.h,
config/mcore/mcore-elf.h, config/mips/elf.h, config/mips/elf64.h,
config/mips/iris6.h, config/mips/linux.h, config/pa/pa-linux.h,
config/pa/pa64-hpux.h, config/rs6000/sysv4.h,
config/xtensa/elf.h, config/xtensa/linux.h:
Use the new macros.
Where possible, remove redundant definitions of SIZE_ASM_OP,
TYPE_ASM_OP, and TYPE_OPERAND_FMT.
* config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL.
(smaxsi3): Same.
(uminsi3): Same.
(umaxsi3): Same.
(abssi2_nopower): Disallow when TARGET_ISEL.
(*ne0): Same.
(negsf2): Change to expand and rename old pattern to *negsf2.
(abssf2): Change to expand and rename old pattern to *abssf2.
New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2,
fixunssfsi2.
Change patterns that check for TARGET_HARD_FLOAT or
TARGET_SOFT_FLOAT to also check TARGET_FPRS.
* config/rs6000/rs6000.c: New globals: rs6000_spe_abi,
rs6000_isel, rs6000_fprs, rs6000_isel_string.
(rs6000_override_options): Add 8540 case to
processor_target_table.
Set rs6000_isel for the 8540.
Call rs6000_parse_isel_option.
(enable_mask_for_builtins): New.
(rs6000_parse_isel_option): New.
(rs6000_parse_abi_options): Add spe and no-spe.
(easy_fp_constant): Treat !TARGET_FPRS as soft-float.
(rs6000_legitimize_address): Check for TARGET_FPRS when checking
for TARGET_HARD_FLOAT.
Add case for SPE_VECTOR_MODE.
(rs6000_legitimize_reload_address): Handle SPE vector modes.
(rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
vector modes.
Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT.
(rs6000_emit_move): Check for TARGET_FPRS.
Add cases for SPE vector modes.
(function_arg_boundary): Return 64 for SPE vector modes.
(function_arg_advance): Check for TARGET_FPRS and
Handle SPE vectors.
(function_arg): Same.
(setup_incoming_varargs): Check for TARGET_FPRS.
(rs6000_va_arg): Same.
(struct builtin_description): Un-constify mask field. Move up in
file.
(bdesc_2arg): Un-constify and add SPE builtins.
(bdesc_1arg): Same.
(bdesc_spe_predicates): New.
(bdesc_spe_evsel): New.
(rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
(rs6000_expand_binop_builtin): Same.
(bdesc_2arg_spe): New.
(spe_expand_builtin): New.
(spe_expand_predicate_builtin): New.
(spe_expand_evsel_builtin): New.
(rs6000_expand_builtin): Call spe_expand_builtin for SPE.
(rs6000_init_builtins): Initialize SPE builtins. Call
rs6000_common_init_builtins.
(altivec_init_builtins): Move all non-altivec builtin code to...
(rs6000_common_init_builtins): ...here. New function.
(branch_positive_comparison_operator): Allow NE code for SPE.
(ccr_bit): Return correct ccr bit for SPE fp.
(print_operand): Emit crnor in 'D' case for SPE.
New case 't'.
Add SPE code for 'y' case.
(rs6000_generate_compare): Generate rtl for SPE fp.
(output_cbranch): Handle SPE hard floats.
(rs6000_emit_cmove): Handle isel.
(rs6000_emit_int_cmove): New.
(output_isel): New.
(rs6000_stack_info): Adjust stack frame so GPRs are saved in
64-bits for SPE.
(debug_stack_info): Add SPE info.
(gen_frame_mem_offset): New.
(rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi.
Change mode of frame pointer, when saving it, to Pmode.
(rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi.
Misc cleanups and use gen_frame_mem_offset when appropriate.
* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540.
(TARGET_SPE_ABI): New.
(TARGET_SPE): New.
(TARGET_ISEL): New.
(TARGET_FPRS): New.
(FIXED_SCRATCH): New.
(RTX_COSTS): Add PROCESSOR_PPC8540.
(ASM_CPU_SPEC): Add case for 8540.
(TARGET_OPTIONS): Add isel= case.
(rs6000_spe_abi): New.
(rs6000_isel): New.
(rs6000_fprs): New.
(rs6000_isel_string): New.
(UNITS_PER_SPE_WORD): New.
(LOCAL_ALIGNMENT): Adjust for SPE.
(HARD_REGNO_MODE_OK): Same.
(DATA_ALIGNMENT): Same.
(MEMBER_TYPE_FORCES_BLK): New.
(FIRST_PSEUDO_REGISTER): Set to 113.
(FIXED_REGISTERS): Add SPE registers.
(reg_class): Same.
(REG_CLASS_NAMES): Same.
(REG_CLASS_CONTENTS): Same.
(REGNO_REG_CLASS): Same.
(REGISTER_NAMES): Same.
(DEBUG_REGISTER_NAMES): Same.
(ADDITIONAL_REGISTER_NAMES): Same.
(CALL_USED_REGISTERS): Same.
(CALL_REALLY_USED_REGISTERS): Same.
(SPE_ACC_REGNO): New.
(SPEFSCR_REGNO): New.
(SPE_SIMD_REGNO_P): New.
(HARD_REGNO_NREGS): Adjust for SPE.
(VECTOR_MODE_SUPPORTED_P): Same.
(REGNO_REG_CLASS): Same.
(FUNCTION_VALUE): Same.
(LIBCALL_VALUE): Same.
(LEGITIMATE_OFFSET_ADDRESS_P): Same.
(SPE_VECTOR_MODE): New.
(CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on
the GPRs. Set FIXED_SCRATCH fixed in SPE case.
(rs6000_stack): Add spe_gp_size, spe_padding_size,
spe_gp_save_offset.
(USE_FP_FOR_ARG_P): Check for TARGET_FPRS.
(LEGITIMATE_LO_SUM_ADDRESS_P): Same.
(SPE_CONST_OFFSET_OK): New.
(rs6000_builtins): Add SPE builtins.
* testsuite/gcc.dg/ppc-spe.c: New.
* config/rs6000/eabispe.h: New.
* config/rs6000/spe.h: New.
* config/rs600/spe.md: New.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
__SIMD__ for TARGET_SPE.
* config.gcc: Add powerpc-*-eabispe* case.
Add spe.h to user headers for powerpc.
* config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL.
(smaxsi3): Same.
(uminsi3): Same.
(umaxsi3): Same.
(abssi2_nopower): Disallow when TARGET_ISEL.
(*ne0): Same.
(negsf2): Change to expand and rename old pattern to *negsf2.
(abssf2): Change to expand and rename old pattern to *abssf2.
New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2,
fixunssfsi2.
Change patterns that check for TARGET_HARD_FLOAT or
TARGET_SOFT_FLOAT to also check TARGET_FPRS.
* config/rs6000/rs6000.c: New globals: rs6000_spe_abi,
rs6000_isel, rs6000_fprs, rs6000_isel_string.
(rs6000_override_options): Add 8540 case to
processor_target_table.
Set rs6000_isel for the 8540.
Call rs6000_parse_isel_option.
(enable_mask_for_builtins): New.
(rs6000_parse_isel_option): New.
(rs6000_parse_abi_options): Add spe and no-spe.
(easy_fp_constant): Treat !TARGET_FPRS as soft-float.
(rs6000_legitimize_address): Check for TARGET_FPRS when checking
for TARGET_HARD_FLOAT.
Add case for SPE_VECTOR_MODE.
(rs6000_legitimize_reload_address): Handle SPE vector modes.
(rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
vector modes.
Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT.
(rs6000_emit_move): Check for TARGET_FPRS.
Add cases for SPE vector modes.
(function_arg_boundary): Return 64 for SPE vector modes.
(function_arg_advance): Check for TARGET_FPRS and
Handle SPE vectors.
(function_arg): Same.
(setup_incoming_varargs): Check for TARGET_FPRS.
(rs6000_va_arg): Same.
(struct builtin_description): Un-constify mask field. Move up in
file.
(bdesc_2arg): Un-constify and add SPE builtins.
(bdesc_1arg): Same.
(bdesc_spe_predicates): New.
(bdesc_spe_evsel): New.
(rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
(rs6000_expand_binop_builtin): Same.
(bdesc_2arg_spe): New.
(spe_expand_builtin): New.
(spe_expand_predicate_builtin): New.
(spe_expand_evsel_builtin): New.
(rs6000_expand_builtin): Call spe_expand_builtin for SPE.
(rs6000_init_builtins): Initialize SPE builtins. Call
rs6000_common_init_builtins.
(altivec_init_builtins): Move all non-altivec builtin code to...
(rs6000_common_init_builtins): ...here. New function.
(branch_positive_comparison_operator): Allow NE code for SPE.
(ccr_bit): Return correct ccr bit for SPE fp.
(print_operand): Emit crnor in 'D' case for SPE.
New case 't'.
Add SPE code for 'y' case.
(rs6000_generate_compare): Generate rtl for SPE fp.
(output_cbranch): Handle SPE hard floats.
(rs6000_emit_cmove): Handle isel.
(rs6000_emit_int_cmove): New.
(output_isel): New.
(rs6000_stack_info): Adjust stack frame so GPRs are saved in
64-bits for SPE.
(debug_stack_info): Add SPE info.
(gen_frame_mem_offset): New.
(rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi.
Change mode of frame pointer, when saving it, to Pmode.
(rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi.
Misc cleanups and use gen_frame_mem_offset when appropriate.
* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540.
(TARGET_SPE_ABI): New.
(TARGET_SPE): New.
(TARGET_ISEL): New.
(TARGET_FPRS): New.
(FIXED_SCRATCH): New.
(RTX_COSTS): Add PROCESSOR_PPC8540.
(ASM_CPU_SPEC): Add case for 8540.
(TARGET_OPTIONS): Add isel= case.
(rs6000_spe_abi): New.
(rs6000_isel): New.
(rs6000_fprs): New.
(rs6000_isel_string): New.
(UNITS_PER_SPE_WORD): New.
(LOCAL_ALIGNMENT): Adjust for SPE.
(HARD_REGNO_MODE_OK): Same.
(DATA_ALIGNMENT): Same.
(MEMBER_TYPE_FORCES_BLK): New.
(FIRST_PSEUDO_REGISTER): Set to 113.
(FIXED_REGISTERS): Add SPE registers.
(reg_class): Same.
(REG_CLASS_NAMES): Same.
(REG_CLASS_CONTENTS): Same.
(REGNO_REG_CLASS): Same.
(REGISTER_NAMES): Same.
(DEBUG_REGISTER_NAMES): Same.
(ADDITIONAL_REGISTER_NAMES): Same.
(CALL_USED_REGISTERS): Same.
(CALL_REALLY_USED_REGISTERS): Same.
(SPE_ACC_REGNO): New.
(SPEFSCR_REGNO): New.
(SPE_SIMD_REGNO_P): New.
(HARD_REGNO_NREGS): Adjust for SPE.
(VECTOR_MODE_SUPPORTED_P): Same.
(REGNO_REG_CLASS): Same.
(FUNCTION_VALUE): Same.
(LIBCALL_VALUE): Same.
(LEGITIMATE_OFFSET_ADDRESS_P): Same.
(SPE_VECTOR_MODE): New.
(CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on
the GPRs. Set FIXED_SCRATCH fixed in SPE case.
(rs6000_stack): Add spe_gp_size, spe_padding_size,
spe_gp_save_offset.
(USE_FP_FOR_ARG_P): Check for TARGET_FPRS.
(LEGITIMATE_LO_SUM_ADDRESS_P): Same.
(SPE_CONST_OFFSET_OK): New.
(rs6000_builtins): Add SPE builtins.
* testsuite/gcc.dg/ppc-spe.c: New.
* config/rs6000/eabispe.h: New.
* config/rs6000/spe.h: New.
* config/rs600/spe.md: New.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
__SIMD__ for TARGET_SPE.
* config.gcc: Add powerpc-*-eabispe* case.
Add spe.h to user headers for powerpc.
* config/rs6000/rs6000.md (sminsi3): Allow pattern for TARGET_ISEL.
(smaxsi3): Same.
(uminsi3): Same.
(umaxsi3): Same.
(abssi2_nopower): Disallow when TARGET_ISEL.
(*ne0): Same.
(negsf2): Change to expand and rename old pattern to *negsf2.
(abssf2): Change to expand and rename old pattern to *abssf2.
New expanders: fix_truncsfsi2, floatunssisf2, floatsisf2,
fixunssfsi2.
Change patterns that check for TARGET_HARD_FLOAT or
TARGET_SOFT_FLOAT to also check TARGET_FPRS.
* config/rs6000/rs6000.c: New globals: rs6000_spe_abi,
rs6000_isel, rs6000_fprs, rs6000_isel_string.
(rs6000_override_options): Add 8540 case to
processor_target_table.
Set rs6000_isel for the 8540.
Call rs6000_parse_isel_option.
(enable_mask_for_builtins): New.
(rs6000_parse_isel_option): New.
(rs6000_parse_abi_options): Add spe and no-spe.
(easy_fp_constant): Treat !TARGET_FPRS as soft-float.
(rs6000_legitimize_address): Check for TARGET_FPRS when checking
for TARGET_HARD_FLOAT.
Add case for SPE_VECTOR_MODE.
(rs6000_legitimize_reload_address): Handle SPE vector modes.
(rs6000_legitimate_address): Disallow PRE_INC/PRE_DEC for SPE
vector modes.
Check for TARGET_FPRS when checking for TARGET_HARD_FLOAT.
(rs6000_emit_move): Check for TARGET_FPRS.
Add cases for SPE vector modes.
(function_arg_boundary): Return 64 for SPE vector modes.
(function_arg_advance): Check for TARGET_FPRS and
Handle SPE vectors.
(function_arg): Same.
(setup_incoming_varargs): Check for TARGET_FPRS.
(rs6000_va_arg): Same.
(struct builtin_description): Un-constify mask field. Move up in
file.
(bdesc_2arg): Un-constify and add SPE builtins.
(bdesc_1arg): Same.
(bdesc_spe_predicates): New.
(bdesc_spe_evsel): New.
(rs6000_expand_unop_builtin): Add SPE 5-bit literal builtins.
(rs6000_expand_binop_builtin): Same.
(bdesc_2arg_spe): New.
(spe_expand_builtin): New.
(spe_expand_predicate_builtin): New.
(spe_expand_evsel_builtin): New.
(rs6000_expand_builtin): Call spe_expand_builtin for SPE.
(rs6000_init_builtins): Initialize SPE builtins. Call
rs6000_common_init_builtins.
(altivec_init_builtins): Move all non-altivec builtin code to...
(rs6000_common_init_builtins): ...here. New function.
(branch_positive_comparison_operator): Allow NE code for SPE.
(ccr_bit): Return correct ccr bit for SPE fp.
(print_operand): Emit crnor in 'D' case for SPE.
New case 't'.
Add SPE code for 'y' case.
(rs6000_generate_compare): Generate rtl for SPE fp.
(output_cbranch): Handle SPE hard floats.
(rs6000_emit_cmove): Handle isel.
(rs6000_emit_int_cmove): New.
(output_isel): New.
(rs6000_stack_info): Adjust stack frame so GPRs are saved in
64-bits for SPE.
(debug_stack_info): Add SPE info.
(gen_frame_mem_offset): New.
(rs6000_emit_prologue): Save GPRs in 64-bits for SPE abi.
Change mode of frame pointer, when saving it, to Pmode.
(rs6000_emit_epilogue): Restore GPRs in 64-bits for SPE abi.
Misc cleanups and use gen_frame_mem_offset when appropriate.
* config/rs6000/rs6000.h (processor_type): Add PROCESSOR_PPC8540.
(TARGET_SPE_ABI): New.
(TARGET_SPE): New.
(TARGET_ISEL): New.
(TARGET_FPRS): New.
(FIXED_SCRATCH): New.
(RTX_COSTS): Add PROCESSOR_PPC8540.
(ASM_CPU_SPEC): Add case for 8540.
(TARGET_OPTIONS): Add isel= case.
(rs6000_spe_abi): New.
(rs6000_isel): New.
(rs6000_fprs): New.
(rs6000_isel_string): New.
(UNITS_PER_SPE_WORD): New.
(LOCAL_ALIGNMENT): Adjust for SPE.
(HARD_REGNO_MODE_OK): Same.
(DATA_ALIGNMENT): Same.
(MEMBER_TYPE_FORCES_BLK): New.
(FIRST_PSEUDO_REGISTER): Set to 113.
(FIXED_REGISTERS): Add SPE registers.
(reg_class): Same.
(REG_CLASS_NAMES): Same.
(REG_CLASS_CONTENTS): Same.
(REGNO_REG_CLASS): Same.
(REGISTER_NAMES): Same.
(DEBUG_REGISTER_NAMES): Same.
(ADDITIONAL_REGISTER_NAMES): Same.
(CALL_USED_REGISTERS): Same.
(CALL_REALLY_USED_REGISTERS): Same.
(SPE_ACC_REGNO): New.
(SPEFSCR_REGNO): New.
(SPE_SIMD_REGNO_P): New.
(HARD_REGNO_NREGS): Adjust for SPE.
(VECTOR_MODE_SUPPORTED_P): Same.
(REGNO_REG_CLASS): Same.
(FUNCTION_VALUE): Same.
(LIBCALL_VALUE): Same.
(LEGITIMATE_OFFSET_ADDRESS_P): Same.
(SPE_VECTOR_MODE): New.
(CONDITIONAL_REGISTER_USAGE): Disable FPRs when target does FP on
the GPRs. Set FIXED_SCRATCH fixed in SPE case.
(rs6000_stack): Add spe_gp_size, spe_padding_size,
spe_gp_save_offset.
(USE_FP_FOR_ARG_P): Check for TARGET_FPRS.
(LEGITIMATE_LO_SUM_ADDRESS_P): Same.
(SPE_CONST_OFFSET_OK): New.
(rs6000_builtins): Add SPE builtins.
* testsuite/gcc.dg/ppc-spe.c: New.
* config/rs6000/eabispe.h: New.
* config/rs6000/spe.h: New.
* config/rs600/spe.md: New.
* config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): Define
__SIMD__ for TARGET_SPE.
* config.gcc: Add powerpc-*-eabispe* case.
Add spe.h to user headers for powerpc.
* tree.c (cp_build_qualified_type_real): When copying
pointer-to-method types, unshare the record that holds
the cached pointer-to-member-function type.
In testsuite/ChangeLog:
* g++.dg/other/ptrmem4.C: New testcase.
Richard Earnshaw [Wed, 24 Jul 2002 18:29:00 +0000 (18:29 +0000)]
arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output pattern.
* arm.md (arm_buneq, arm_bltgt): put '\' before ';' in output
pattern.
(arm_buneq_reversed, arm_bltgt_reversed): Likewise.
(movsicc, movsfcc, movdfcc): FAIL if UNEQ or LTGT.
Tom Tromey [Wed, 24 Jul 2002 17:48:41 +0000 (17:48 +0000)]
natFileDescriptorWin32.cc (setLength): New method.
2002-07-24 Tom Tromey <tromey@redhat.com>
Tony Kimball <alk@pobox.com>
* java/io/natFileDescriptorWin32.cc (setLength): New method.
* java/io/natFileDescriptorPosix.cc (setLength): New method.
* java/io/RandomAccessFile.java (setLength): New method.
* java/io/natFileDescriptorEcos.cc (setLength): New method.
* java/io/FileDescriptor.java (setLength): New method.
Co-Authored-By: Tony Kimball <alk@pobox.com>
From-SVN: r55715
Chris Demetriou [Wed, 24 Jul 2002 17:14:33 +0000 (17:14 +0000)]
elf.h (STARTFILE_SPEC): Never include crt0.o.
2002-07-24 Chris Demetriou <cgd@broadcom.com>
* config/mips/elf.h (STARTFILE_SPEC): Never include crt0.o.
* config/mips/elf64.h (STARTFILE_SPEC): Likewise.
* config/mips/isa3264.h (STARTFILE_SPEC): Do not redefine.
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