Eric Botcazou [Tue, 28 Apr 2015 08:54:07 +0000 (08:54 +0000)]
c-ada-spec.c (in_function): Delete.
* c-ada-spec.c (in_function): Delete.
(dump_generic_ada_node): Do not change in_function and remove the
redundant code dealing with it.
(print_ada_declaration): Do not change in_function. Use INDENT_INCR.
(print_ada_methods): Output the static member functions in a nested
package after the regular methods as well as associated renamings.
Co-Authored-By: Pierre-Marie de Rodat <derodat@adacore.com>
From-SVN: r222517
Richard Biener [Tue, 28 Apr 2015 08:30:44 +0000 (08:30 +0000)]
re PR fortran/62283 (basic-block vectorization fails)
2015-04-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/62283
* tree-vect-slp.c (vect_build_slp_tree): When the SLP build
fails fatally and we are vectorizing a basic-block simply
cause the child to be constructed piecewise.
(vect_analyze_slp_cost_1): Adjust.
(vect_detect_hybrid_slp_stmts): Likewise.
(vect_bb_slp_scalar_cost): Likewise.
(vect_get_constant_vectors): For piecewise constructed
constants place them after the last def.
(vect_get_slp_defs): Adjust.
* tree-vect-stmts.c (vect_is_simple_use): Detect in-BB
externals for basic-block vectorization.
* gfortran.dg/vect/pr62283-2.f: New testcase.
* gcc.dg/vect/bb-slp-14.c: Adjust.
re PR target/63503 ([AArch64] A57 executes fused multiply-add poorly in some situations)
2015-04-28 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/
PR target/63503
* config.gcc: Add cortex-a57-fma-steering.o to extra_objs for
aarch64-*-*.
* config/aarch64/t-aarch64: Add a rule for cortex-a57-fma-steering.o.
* config/aarch64/aarch64.h (AARCH64_FL_USE_FMA_STEERING_PASS): Define.
(AARCH64_TUNE_FMA_STEERING): Likewise.
* config/aarch64/aarch64-cores.def: Set
AARCH64_FL_USE_FMA_STEERING_PASS for cores with dynamic steering of
FMUL/FMADD instructions.
* config/aarch64/aarch64.c (aarch64_register_fma_steering): Declare.
(aarch64_override_options): Include cortex-a57-fma-steering.h. Call
aarch64_register_fma_steering () if AARCH64_TUNE_FMA_STEERING is true.
* config/aarch64/cortex-a57-fma-steering.h: New file.
* config/aarch64/cortex-a57-fma-steering.c: Likewise.
Richard Biener [Tue, 28 Apr 2015 07:26:41 +0000 (07:26 +0000)]
re PR c++/65851 (ice in set_lattice_value at tree-ssa-cc p.c:535)
2015-04-28 Richard Biener <rguenther@suse.de>
PR tree-optimization/65851
* tree-ssa-ccp.c (set_lattice_value): Perform a meet when
changing CONSTANT to CONSTANT non-copy. Get new_val by reference.
(ccp_lattice_meet): Remove stray argument. Use operand_equal_p
rather than simple_cst_equal as the latter doesn't handle COMPLEX_CST.
(ccp_visit_phi_node): Adjust.
(evaluate_stmt): For simplifications to SSA names return its
lattice value if that isn't VARYING. Return immediately when
simplified to a constant.
(visit_assignment): Adjust.
(ccp_visit_stmt): Likewise.
Tim Shen [Tue, 28 Apr 2015 04:16:48 +0000 (04:16 +0000)]
regex.tcc: Handle regex_constants::__polynomial.
* include/bits/regex.tcc: Handle regex_constants::__polynomial.
* include/bits/regex_automaton.tcc: Throw exception when parsing
back-reference with flag __polynomial.
* include/bits/regex_constants.h: Add extension flag
syntax_option_type __polynomial.
* bits/regex_executor.tcc: Still let BFS process ECMAScript.
Alternative operation will be fixed in the coming refactoring.
* testsuite/28_regex/algorithms/regex_search/61424.cc: Turn
loose match_search_debug to use DFS only.
Jeff Law [Tue, 28 Apr 2015 04:01:28 +0000 (22:01 -0600)]
re PR tree-optimization/65217 (__builtin_unreachable in if statement causes bad assembly generation)
PR tree-optimization/65217
* tree-ssa-dom.c (record_equality): Given two SSA_NAMEs, if just one
of them has a single use, make sure it is the LHS of the implied
copy.
libstdc++-v3/
* testsuite/lib/libstdc++.exp (check_v3_target_namedlocale):
Make the generated test program fail gracefully if the target
doesn't support passing command-line arguments.
eh_catch.cc (uncaught_exception, [...]): Return false or zero if the library is built without exceptions.
2015-04-27 Federico Lenarduzzi <federico.lenarduzzi@tallertechnologies.com>
Jonathan Wakely <jwakely@redhat.com>
* libsupc++/eh_catch.cc (uncaught_exception, uncaught_exceptions):
Return false or zero if the library is built without exceptions.
* libsupc++/eh_term_handler.cc: Disable verbose terminate handler if
the library is built without exceptions.
Co-Authored-By: Jonathan Wakely <jwakely@redhat.com>
From-SVN: r222484
re PR fortran/60322 ([OOP] Incorrect bounds on polymorphic dummy array)
2015-04-27 Andre Vehreschild <vehre@gmx.de>
PR fortran/60322
Add tests forgotten to svn-add.
* gfortran.dg/class_allocate_19.f03: New test.
* gfortran.dg/class_array_20.f03: New test.
* gfortran.dg/class_array_21.f03: New test.
* gfortran.dg/finalize_29.f08: New test.
re PR fortran/59678 ([F03] Segfault on equalizing variables of a complex derived type)
gcc/fortran
2015-04-27 Andre Vehreschild <vehre@gmx.de>
PR fortran/59678
PR fortran/65841
* trans-array.c (duplicate_allocatable): Fixed deep copy of
allocatable components, which are liable for copy only, when
they are allocated.
(gfc_duplicate_allocatable): Add deep-copy code into if
component allocated block. Needed interface change for that.
(gfc_copy_allocatable_data): Supplying NULL_TREE for code to
add into if-block for checking whether a component was
allocated.
(gfc_duplicate_allocatable_nocopy): Likewise.
(structure_alloc_comps): Likewise.
* trans-array.h: Likewise.
* trans-expr.c (gfc_trans_alloc_subarray_assign): Likewise.
* trans-openmp.c (gfc_walk_alloc_comps): Likewise.
gcc/testsuite
2015-04-27 Andre Vehreschild <vehre@gmx.de>
PR fortran/59678
PR fortran/65841
* gfortran.dg/alloc_comp_deep_copy_1.f03: New test.
* gfortran.dg/alloc_comp_deep_copy_2.f03: New test.
Peter Bergner [Mon, 27 Apr 2015 14:52:50 +0000 (09:52 -0500)]
re PR target/64579 (__TM_end __builtin_tend failed to return transactional state)
gcc/
PR target/64579
* config/rs6000/htm.md: Remove all define_expands.
(UNSPECV_HTM_TABORTDC, UNSPECV_HTM_TABORTDCI, UNSPECV_HTM_TABORTWC,
UNSPECV_HTM_TABORTWCI): Remove.
(UNSPECV_HTM_TABORTXC, UNSPECV_HTM_TABORTXCI, UNSPECV_HTM_TTEST): New.
(tabort_internal, tbegin_internal, tcheck_internal, tend_internal,
trechkpt_internal, treclaim_internal, tsr_internal): Rename from this...
(tabort, tbegin, tcheck, tend, trechkpt, treclaim, tsr): ...to this.
(tabortdc_internal, tabortdci_internal, tabortwc_internal,
tabortwci_internal): Remove define_insns.
(tabort<wd>c, tabort<wd>ci): New define_insns.
(tabort): Use gpc_reg_operand.
(tcheck): Remove operand.
(htm_mfspr_<mode>, htm_mtspr_<mode>): Use GPR mode macro.
* config/rs6000/htmxlintrin.h (__TM_end): Use _HTM_TRANSACTIONAL as
expected value.
* config/rs6000/rs6000-builtin.def (BU_HTM_SPR0): Remove.
(BU_HTM_SPR1): Rename to BU_HTM_V1. Remove use of RS6000_BTC_SPR.
(tabort, tabortdc, tabortdci, tabortwc, tabortwci, tbegin,
tcheck, tend, tendall, trechkpt, treclaim, tresume, tsuspend,
tsr, ttest): Pass in the RS6000_BTC_CR attribute.
(get_tfhar, set_tfhar, get_tfiar, set_tfiar, get_texasr, set_texasr,
get_texasru, set_texasru): Pass in the RS6000_BTC_SPR attribute.
(tcheck): Remove builtin argument.
* config/rs6000/rs6000.c (rs6000_htm_spr_icode): Use TARGET_POWERPC64
not TARGET_64BIT.
(htm_expand_builtin): Fix usage of expandedp. Disallow usage of the
tabortdc and tabortdci builtins when not in 64-bit mode.
Modify code to handle the loss of the HTM define_expands.
Emit code to copy the CR register to TARGET.
(htm_init_builtins): Modify code to handle the loss of the HTM
define_expands.
* config/rs6000/rs6000.h (RS6000_BTC_32BIT): Delete.
(RS6000_BTC_64BIT): Likewise.
(RS6000_BTC_CR): New macro.
* doc/extend.texi: Update documentation for htm builtins.
gcc/testsuite/
PR target/64579
* gcc.target/powerpc/htm-1.c: New test.
* gcc.target/powerpc/htm-builtin-1.c (__builtin_tabortdc): Only test
on 64-bit compiles.
(__builtin_tabortdci): Likewise.
(__builtin_tcheck): Remove operand.
* lib/target-supports.exp (check_htm_hw_available): New function.
* tree-ssa-dom.c (record_equivalences_from_phis): Valueize PHI arg.
(record_equivalences_from_stmt): Valueize rhs.
(record_equality): Canonicalize x and y order via
tree_swap_operands_p. Do not swap operands for same loop depth.
Jakub Jelinek [Mon, 27 Apr 2015 11:26:12 +0000 (13:26 +0200)]
re PR tree-optimization/65875 (ICE: Segmentation fault)
PR tree-optimization/65875
* tree-vrp.c (update_value_range): If in is_new case setting
old_vr to VR_VARYING, also set new_vr to it. Remove
old_vr->type == VR_VARYING test.
(vrp_visit_phi_node): Return SSA_PROP_VARYING instead of
SSA_PROP_INTERESTING if update_value_range returned true,
but new range is VR_VARYING.
2015-04-27 Thomas Preud'homme <thomas.preudhomme@arm.com>
* combine.c (sign_extend_short_imm): New.
(set_nonzero_bits_and_sign_copies): Use above new function for sign
extension of src short immediate.
(reg_nonzero_bits_for_combine): Likewise for tem.
Eric Botcazou [Mon, 27 Apr 2015 10:29:07 +0000 (10:29 +0000)]
stor-layout.c (self_referential_component_ref_p): New predicate.
* stor-layout.c (self_referential_component_ref_p): New predicate.
(copy_self_referential_tree_r): Use it.
(self_referential_size): Punt for simple operations directly involving
self-referential component references.
* tree-cfg.c (dump_function_to_file): Add missing final curly bracket.
Michael Meissner [Fri, 24 Apr 2015 17:24:05 +0000 (17:24 +0000)]
re PR target/65849 (Add missing tuning knobs to #pragma target/attribute target support)
[gcc]
2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/65849
* config/rs6000/rs6000.opt (-mvsx-align-128): Make options that
save to independent variables use the Save attribute. This will
allow these options to be modified with the #pragma/attribute
target support.
(-mallow-movmisalign): Likewise.
(-mallow-df-permute): Likewise.
(-msched-groups): Likewise.
(-malways-hint): Likewise.
(-malign-branch-targets): Likewise.
(-mvectorize-builtins): Likewise.
(-msave-toc-indirect): Likewise.
* config/rs6000/rs6000.c (rs6000_opt_masks): Add more options that
can be set via the #pragma/attribute target support.
(rs6000_opt_vars): Likewise.
(rs6000_inner_target_options): If VSX was set, also set
-mno-avoid-indexed-addresses.
[gcc/testsuite]
2015-04-24 Michael Meissner <meissner@linux.vnet.ibm.com>
PR target/65849
* gcc.target/powerpc/pr65849-1.c: New test to verify being able to
set new options.
* gcc.target/powerpc/pr65849-2.c: Likewise.
[AArch64] Implement -m{cpu,tune,arch}=native using only /proc/cpuinfo
* config.host (case ${host}): Add aarch64*-*-linux case.
* config/aarch64/aarch64-cores.def: Add IMPLEMENTER_ID and PART_NUMBER
fields to all the cores.
* config/aarch64/aarch64-elf.h (DRIVER_SELF_SPECS):
Add MCPU_MTUNE_NATIVE_SPECS.
* config/aarch64/aarch64-option-extensions.def: Add FEATURE_STRING
field to all extensions.
* config/aarch64/aarch64-opts.h: Adjust definition of AARCH64_CORE.
* config/aarch64/aarch64.c: Adjust definition of AARCH64_CORE.
Adjust definition of AARCH64_OPT_EXTENSION.
* config/aarch64/aarch64.h: Adjust definition of AARCH64_CORE.
(MCPU_MTUNE_NATIVE_SPECS): Define.
* config/aarch64/driver-aarch64.c: New file.
* config/aarch64/x-arch64: New file.
* doc/invoke.texi (AArch64 Options): Document native value for -mcpu,
-mtune and -march.
Tom de Vries [Fri, 24 Apr 2015 14:18:57 +0000 (14:18 +0000)]
Replace g++.dg/pr65802.C with gcc.dg/pr65802.c
2015-04-24 Tom de Vries <tom@codesourcery.com>
PR tree-optimization/65802
* g++.dg/pr65802.C: Move to ...
* gcc.dg/pr65802.c: ... here. Add -fexceptions to dg-options. Include
stdarg.h. Rewrite for C.
(fn1): Use va_list and va_arg. Make variable args function. Add use of
va_start and va_end. Remove unnecessary inline asm.
sse.md (*vec_concatv2sf_sse4_1): Do not allow both input operands in memory.
* config/i386/sse.md (*vec_concatv2sf_sse4_1): Do not allow both
input operands in memory.
(*vec_concatv2si_sse4_1): Ditto.
(*vec_concatv2df): Ditto, except for SSE3 and equal input operands.
(vec_extract_lo_<mode><mask_name>): Change operand 1 predicate to
register_operand.
(vec_extract_hi_v32hi): Ditto.
(vec_extract_hi_v64hi): Ditto.
(<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
re PR rtl-optimization/34503 (Issues with constant/copy propagation implementation in gcse.c)
2015-04-24 Thomas Preud'homme <thomas.preudhomme@arm.com>
Steven Bosscher <steven@gcc.gnu.org>
gcc/
PR rtl-optimization/34503
* cprop.c (cprop_reg_p): New.
(hash_scan_set): Use above function to check if register can be
propagated.
(find_avail_set): Return up to two sets, one whose source is a
register and one whose source is a constant. Sets are returned in an
array passed as parameter rather than as a return value.
(cprop_insn): Use a do while loop rather than a goto. Try each of the
sets returned by find_avail_set, starting with the one whose source is
a constant. Use cprop_reg_p to check if register can be propagated.
(do_local_cprop): Use cprop_reg_p to check if register can be
propagated.
(implicit_set_cond_p): Likewise.
gcc/testsuite/
PR rtl-optimization/34503
* gcc.target/arm/pr64616.c: New file.
Co-Authored-By: Steven Bosscher <steven@gcc.gnu.org>
From-SVN: r222398
* ipa-icf.c (sem_function::equals_wpa): Compare thunk info.
(sem_function::equals): IGNORED_NODES parameter is now unused;
update call of equals_private.
(sem_function::equals_private): Do not call equals_wpa; skip
gimple body matching if there is no body.
(sem_function::init): Add logic to hash tthunk info.
(sem_function::parse): Also parse thunks.
* ipa-icf.h (equals_private): Update declaration.
Bill Schmidt [Thu, 23 Apr 2015 20:18:10 +0000 (20:18 +0000)]
altivec.md (*altivec_lvx_<mode>_internal): Remove asterisk from name so this can be generated directly.
2015-04-23 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/altivec.md (*altivec_lvx_<mode>_internal): Remove
asterisk from name so this can be generated directly.
(*altivec_stvx_<mode>_internal): Likewise.
* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Add assert
that this is never called during or after reload/lra.
(rs6000_frame_related): Remove split_reg
argument and logic that references it.
(emit_frame_save): Remove last parameter from call to
rs6000_frame_related.
(rs6000_emit_prologue): Remove last parameter from eight calls to
rs6000_frame_related. Force generation of stvx instruction for
Altivec register saves. Remove split_reg handling, which is no
longer needed.
(rs6000_emit_epilogue): Force generation of lvx instruction for
Altivec register restores.
Jason Merrill [Thu, 23 Apr 2015 15:55:11 +0000 (11:55 -0400)]
re PR c++/65646 (ICE in invalid syntax)
PR c++/65646
* pt.c (check_explicit_specialization): Don't
SET_DECL_TEMPLATE_SPECIALIZATION for a variable with no template
headers.
* decl.c (grokvardecl): Revert earlier fix.
Jan Hubicka [Thu, 23 Apr 2015 15:25:26 +0000 (17:25 +0200)]
ipa-icf.c (sem_item::compare_attributes): New function.
* ipa-icf.c (sem_item::compare_attributes): New function.
(sem_item::compare_referenced_symbol_properties): Compare variable
attributes.
(sem_item::hash_referenced_symbol_properties): Record DECL_ALIGN.
(sem_function::param_used_p): New function.
(sem_function::equals_wpa): Fix attribute comparsion; match
parameter type codes; do not compare paremter flags when
they are not used; compare edge flags; compare indirect calls.
(sem_item::update_hash_by_addr_refs): Hash reference type.
(sem_function::equals_private): Do not match DECL_ATTRIBUTES.
(sem_variable::equals_wpa): Do not match DECL_ALIGN; match
reference use type.
(sem_item_optimizer::update_hash_by_addr_refs): Use param_used_p.
* ipa-icf.h (compare_attributes, param_used_p): Declare.
* ipa-icf.c (symbol_compare_collection::symbol_compare_collection):
cleanup.
(sem_function::get_hash): Do not hash DECL_DISREGARD_INLINE_LIMITS,
DECL_DECLARED_INLINE_P and DECL_IS_OPERATOR_NEW.
(sem_item::compare_referenced_symbol_properties): New.
(sem_item::hash_referenced_symbol_properties): New.
(sem_item::compare_cgraph_references): Rename to ...
(sem_item::compare_symbol_references): ... this one; use
compare_referenced_symbol_properties.
(sem_function::equals_wpa): Do not compare
DECL_DISREGARD_INLINE_LIMITS, DECL_DECLARED_INLINE_P,
DECL_IS_OPERATOR_NEW; compare pointer sizes.
(sem_item::update_hash_by_addr_refs): Call
hash_referenced_symbol_properties.
(sem_item::update_hash_by_local_refs): Cleanup.
(sem_function::merge): Do not mix up symbol properties.
(sem_variable::equals_wpa): Use compare_symbol_references.
* ipa-icf.h (sem_item::compare_referenced_symbol_properties): New.
(sem_item::hash_referenced_symbol_properties): New.
(sem_item::compare_symbol_references): New.
(sem_item::compare_cgraph_references): Remove.
Marek Polacek [Thu, 23 Apr 2015 14:35:12 +0000 (14:35 +0000)]
re PR c/65345 (ICE with _Generic selection on _Atomic int)
PR c/65345
* c-decl.c (set_labels_context_r): New function.
(store_parm_decls): Call it via walk_tree_without_duplicates.
* c-typeck.c (convert_lvalue_to_rvalue): Use create_tmp_var_raw
instead of create_tmp_var. Build TARGET_EXPR instead of
COMPOUND_EXPR.
(build_atomic_assign): Use create_tmp_var_raw instead of
create_tmp_var. Build TARGET_EXPRs instead of MODIFY_EXPR.
* gcc.dg/pr65345-1.c: New test.
* gcc.dg/pr65345-2.c: New test.
PF fortran/60322
* gfortran.dg/class_allocate_19.f03: New test.
* gfortran.dg/class_array_20.f03: New test.
* gfortran.dg/class_array_21.f03: New test.
* gfortran.dg/finalize_10.f90: Corrected scan-trees.
* gfortran.dg/finalize_15.f90: Fixing comparision to model
initialization correctly.
* gfortran.dg/finalize_29.f08: New test.
gcc/fortran/ChangeLog:
2015-04-23 Andre Vehreschild <vehre@gmx.de>
PR fortran/60322
* expr.c (gfc_lval_expr_from_sym): Code to select the regular
or class array added.
* gfortran.h: Add IS_CLASS_ARRAY macro.
* trans-array.c (gfc_add_loop_ss_code): Treat class objects
to be referenced always.
(build_class_array_ref): Adapt retrieval of array descriptor.
(build_array_ref): Likewise.
(gfc_conv_array_ref): Hand the vptr or the descriptor to
build_array_ref depending whether the sym is class or not.
(gfc_trans_array_cobounds): Select correct gfc_array_spec for
regular and class arrays.
(gfc_trans_array_bounds): Likewise.
(gfc_trans_dummy_array_bias): Likewise.
(gfc_get_dataptr_offset): Correcting call of build_array_ref.
(gfc_conv_expr_descriptor): Set the array's offset to -1 when
lbound in inner most dim is 1 and symbol non-pointer/assoc.
* trans-decl.c (gfc_build_qualified_array): Select correct
gfc_array_spec for regular and class arrays.
(gfc_build_dummy_array_decl): Likewise.
(gfc_get_symbol_decl): Get a dummy array for class arrays.
(gfc_trans_deferred_vars): Tell conv_expr that the descriptor
is desired.
* trans-expr.c (gfc_class_vptr_get): Get the class descriptor
from the correct location for class arrays.
(gfc_class_len_get): Likewise.
(gfc_conv_intrinsic_to_class): Add handling of _len component.
(gfc_conv_class_to_class): Prevent access to unset array data
when the array is an optional argument. Add handling of _len
component.
(gfc_copy_class_to_class): Check that _def_init is non-NULL
when used in _vptr->copy()
(gfc_trans_class_init_assign): Ensure that the rank of
_def_init is zero.
(gfc_conv_component_ref): Get the _vptr along with _data refs.
(gfc_conv_variable): Make sure the temp array descriptor is
returned for class arrays, too, and that class arrays are
dereferenced correctly.
(gfc_conv_procedure_call): For polymorphic type initialization
the initializer has to be a pointer to _def_init stored in a
dummy variable, which then needs to be used by value.
* trans-intrinsic.c (gfc_conv_intrinsic_sizeof): Use the
temporary array descriptor for class arrays, too.
(gfc_conv_intrinsic_storage_size): Likewise.
(gfc_conv_intrinsic_loc): Add ref to _data for BT_CLASS
expressions.
* trans-stmt.c (trans_associate_var): Use a temporary array for
the associate variable of class arrays, too, making the array
one-based (lbound == 1).
* trans-types.c (gfc_is_nodesc_array): Use the correct
array data.
* trans.c (gfc_build_array_ref): Use the dummy array descriptor
when present.
* trans.h: Add class_vptr to gfc_se for storing a class ref's
vptr.
Richard Biener [Thu, 23 Apr 2015 11:19:45 +0000 (11:19 +0000)]
passes.def: Remove copy propagation passes run directly after CCP.
2015-04-23 Richard Biener <rguenther@suse.de>
* passes.def: Remove copy propagation passes run directly after CCP.
* tree-ssa-ccp.c (get_value_for_expr): Fall back to a COPY for
SSA names.
(ccp_visit_phi_node): Rework to handle first executable edge
specially.
* tree-vect-slp.c (vect_find_first_load_in_slp_instance): Remove.
(vect_find_last_store_in_slp_instance): Rename to ...
(vect_find_last_scalar_stmt_in_slp): ... this and generalize.
(vect_analyze_slp_cost_1): Use vector_load for constant defs
and vec_construct for external defs when estimating prologue cost.
(vect_analyze_slp_instance): Do not init SLP_INSTANCE_FIRST_LOAD_STMT.
Compute costs here only when vectorizing loops.
(vect_slp_analyze_bb_1): Compute SLP cost here, after vector types
have been determined.
(vect_schedule_slp_instance): Simplify vectorized code placement
and prepare for in-BB external defs.
* tree-vectorizer.h (struct _slp_instance): Remove first_load member.
(SLP_INSTANCE_FIRST_LOAD_STMT): Remove.
* tree-vect-stmts.c (vect_model_store_cost): Remove PURE_SLP_STMT
guard.
(vect_model_load_cost): Likewise.
(vectorizable_store): Instead add it here.
(vectorizable_load): Likewise.
(vect_is_simple_use): Dump def type textually.
Richard Biener [Thu, 23 Apr 2015 08:30:04 +0000 (08:30 +0000)]
cfgexpand.c (expand_gimple_stmt_1): Use ops.code.
2015-04-23 Richard Biener <rguenther@suse.de>
* cfgexpand.c (expand_gimple_stmt_1): Use ops.code.
* cfgloop.c (verify_loop_structure): Verify the root loop node.
* except.c (duplicate_eh_regions): Call get_eh_region_from_lp_number_fn
instead of get_eh_region_from_lp_number.
* loop-init.c (fix_loop_structure): If we removed a loop, reset
the SCEV cache.
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
* config/rs6000/rs6000.c (rtx_is_swappable_p): Commentary
adjustments.
(insn_is_swappable_p): Return 1 for a convert from double to
single precision when all of its uses are splats of BE element
zero.
[gcc/testsuite]
2015-04-22 Bill Schmidt <wschmidt@linux.vnet.ibm.com>