Alan Modra [Tue, 17 Nov 2020 04:43:37 +0000 (15:13 +1030)]
[GOLD] powerpc incremental-dump assertion failure
incremental-dump wants to instantiate Target_powerpc without options
being set up. This patch fixes
internal error in options, at gold/parameters.h:92
* powerpc.cc (Target_powerpc::no_tprel_opt_): Rename from tprel_opt_.
Init to false.
(Target_powerpc::tprel_opt): Test parameters->options().tls_optimize().
(Target_powerpc::set_tprel_opt): Delete.
(Target_powerpc::set_no_tprel_opt): New function. Update all uses
of set_tprel_opt.
H.J. Lu [Thu, 29 Oct 2020 16:19:25 +0000 (09:19 -0700)]
dwarf: Also match abbrev base when searching abbrev list
A .debug_abbrev section can have multiple CUs. When caching abbrev list,
we need to check abbrev base to support multiple CUs.
PR binutils/26808
* dwarf.c (abbrev_list): Add abbrev_base.
(new_abbrev_list): Add an abbrev_base argument and record it.
(find_abbrev_list_by_abbrev_offset): Add an abbrev_base argument
and match it.
(process_debug_info): Pass abbrev_base to new_abbrev_list and
find_abbrev_list_by_abbrev_offset.
(display_debug_abbrev): Pass 0 abbrev_base to new_abbrev_list
and find_abbrev_list_by_abbrev_offset.
* testsuite/binutils-all/x86-64/pr26808.dump: New file.
* testsuite/binutils-all/x86-64/pr26808.dwp.bz2: Likewise.
* testsuite/binutils-all/x86-64/x86-64.exp: Run PR binutils/26808
test.
Nick Clifton [Tue, 27 Oct 2020 16:17:13 +0000 (16:17 +0000)]
Fix the decoding of DW_FORM_ref_addr DWARF attribute.
* dwarf.c (struct abbrev_list): New structure. Used to collect
lists of abbreviation sets.
(struct abbrev_map): New structure. Used to map CU offsets to
abbreviation offsets.
(record_abbrev_list): New function. A new entry to an
abbreviation list.
(free_all_abbrevs): Update to free abbreviation lists.
(new_abbrev_list): New function. Start a new abbreviation
list.
(find_abbrev_list_by_abbrev_offset): New function.
(find_abbrev_map_by_offset): New function.
(add_abbrev): Add abbrev_list parameter.
(add_abbrev_attr): Likewise.
(process_abbrev_section): Rename to process_abbrev_set and add
list parameter.
(get_type_abbrev_from_form): New function. Attempts to decode the
forms used by DW_AT_type attributes.
(get_type_signedness): Display type names if operating in wide
mode. Use get_type_abbrev_from_form.
(read_and_display_attr_value): Use get_type_abbrev_from_form.
(process_debug_info): Pre-parse the CU headers to collate all the
abbrevs before starting the main scan.
(process_debug_abbrev): Do not free any loaded abbrevs.
(free_debug_memory): Free the abbrev maps.
Nick Clifton [Wed, 21 Oct 2020 16:42:42 +0000 (17:42 +0100)]
Work around problem in DWARF decoding library which can result in attempts to read arbitrary bytes as if they were an LEB128 encoded value.
* dwarf.c (skip_attr_bytes): Accept DWARF versions higher than 4
when processing the DW_FORM_ref_addr form.
Skip bytes in DW_FORM_block and DW_FORM_exprloc forms.
Handle DW_FORM_indirect.
(get_type_signedness): Allow a limited amount of recursion.
Do not attempt to decode types that use the DW_FORM_ref_addr form.
(read_and_display_attr_value): Do not attempt to decode types
that use the DW_FORM_ref_addr form.
H.J. Lu [Fri, 16 Oct 2020 11:03:20 +0000 (04:03 -0700)]
gas: Reuse the input file entry in the file table
Some instructions can be emitted (dwarf2_emit_insn is called) before the
first .file <NUMBER> directive has been seen, which allocates the input
file as the first file entry. Reuse the input file entry in the file
table.
PR gas/25878
PR gas/26740
* dwarf2dbg.c (file_entry): Remove auto_assigned.
(assign_file_to_slot): Remove the auto_assign argument.
(allocate_filenum): Updated.
(allocate_filename_to_slot): Reuse the input file entry in the
file table.
(dwarf2_where): Replace as_where with as_where_physical.
* testsuite/gas/i386/dwarf5-line-1.d: New file.
* testsuite/gas/i386/dwarf5-line-1.s: Likewise.
* testsuite/gas/i386/i386.exp: Run dwarf5-line-1.
gas: Always use as_where for preprocessed assembly codes
Always clear the slot 1 if it was assigned to the input file before the
first .file <NUMBER> directive has been seen. Always use as_where to
generate the correct debug infor for preprocessed assembly codes.
PR gas/25878
PR gas/26740
* dwarf2dbg.c (allocate_filename_to_slot): Don't reuse the slot 1
here.
(dwarf2_where): Restore as_where.
(dwarf2_directive_filename): Clear the slot 1 if it was assigned
to the input file.
* testsuite/gas/i386/dwarf5-line-2.d: New file.
* testsuite/gas/i386/dwarf5-line-2.s: Likewise.
* testsuite/gas/i386/dwarf5-line-3.d: Likewise.
* testsuite/gas/i386/dwarf5-line-3.s: Likewise.
* testsuite/gas/i386/i386.exp: Run dwarf5-line-2 and
dwarf5-line-3.
Since a file slot is auto-assigned for the #APP marker appeared before
the first .file <NUMBER> directive has been seen, clear all auto-assigned
file slots when seeing the first .file <NUMBER> directive.
PR gas/26778
* * dwarf2dbg.c (num_of_auto_assigned): New.
(allocate_filenum): Increment num_of_auto_assigned.
(dwarf2_directive_filename): Clear the slots auto-assigned
before the first .file <NUMBER> directive was seen.
* testsuite/gas/i386/dwarf4-line-1.d: New file.
* testsuite/gas/i386/dwarf4-line-1.s: Likewise.
* testsuite/gas/i386/i386.exp: Run dwarf4-line-1.
Mark Wielaard [Mon, 28 Sep 2020 22:02:06 +0000 (00:02 +0200)]
binutils: dwarf.c handle DWARF5 DW_LLE_start_end and DW_LLE_start_length.
display_loclists_list only handled DW_LLE_offset_pair as bounded
location description. Also handle DW_LLE_start_end and DW_LLE_start_lenght.
These don't use the base_address.
binutils/ChangeLog:
* dwarf.c (display_loclists_list): Handle DW_LLE_start_end and
DW_LLE_start_length. Only add base_address for DW_LLE_offset_pair.
Mark Wielaard [Wed, 23 Sep 2020 14:41:06 +0000 (16:41 +0200)]
Sync libiberty and include with GCC for get_DW_UT_name.
This adds a get_DW_UT_name function to dwarfnames using dwarf2.def
for use in binutils readelf to show the unit types in a DWARF5 header.
include/ChangeLog:
Sync with GCC
* dwarf2.def: Add DWARF5 Unit type header encoding macros
DW_UT_FIRST, DW_UT and DW_UT_END.
* dwarf2.h (enum dwarf_unit_type): Removed and define using
DW_UT_FIRST, DW_UT and DW_UT_END macros.
(get_DW_UT_name): New function declaration.
libiberty/ChangeLog:
Sync with GCC
* dwarfnames.c (get_DW_UT_name): Define using DW_UT_FIRST, DW_UT
and DW_UT_END.
Mark Wielaard [Wed, 23 Sep 2020 14:31:14 +0000 (16:31 +0200)]
binutils: Handle DWARF5 DW_FORM_ref_addr and DW_UT_partial.
dwz in DWARF5 mode might produce DW_UT_partial unit types, which are
the same as DW_UT_compile unit types (but start with a DW_TAG_partial_unit)
and it might produce DW_FORM_ref_addr to create a reference between
units. Accept both constructs.
binutils/ChangeLog:
* dwarf.c (read_and_display_attr_value): Handle DW_FORM_ref_addr
for dwarf_version 5 just as version 3 and 4 (only 2 is different).
(process_debug_info): Allow DW_UT_partial.
H.J. Lu [Mon, 16 Nov 2020 14:37:53 +0000 (06:37 -0800)]
elf: Set rel_from_abs to 1 for __ehdr_start
bfdlink.h has
/* Symbol will be converted from absolute to section-relative. Set for
symbols defined by a script from "dot" (also SEGMENT_START or ORIGIN)
outside of an output section statement. */
unsigned int rel_from_abs : 1;
linker.c has
.{* Return TRUE if the symbol described by a linker hash entry H
. is going to be absolute. Linker-script defined symbols can be
. converted from absolute to section-relative ones late in the
. link. Use this macro to correctly determine whether the symbol
. will actually end up absolute in output. *}
.#define bfd_is_abs_symbol(H) \
. (((H)->type == bfd_link_hash_defined \
. || (H)->type == bfd_link_hash_defweak) \
. && bfd_is_abs_section ((H)->u.def.section) \
. && !(H)->rel_from_abs)
.
Set rel_from_abs to 1 for __ehdr_start which will be converted from
absolute to section-relative in assign_file_positions_for_load_sections.
PR ld/26869
* ldelf.c (ldelf_before_allocation): Set rel_from_abs to 1 for
__ehdr_start.
* testsuite/ld-i386/i386.exp: Run pr26869.
* testsuite/ld-i386/pr26869.d: New file.
* testsuite/ld-i386/pr26869.s: Likewise.
arm: Fix the wrong error message string for mve vldr/vstr (PR26763).
For mve vldr/vstr instructions assembler is throwing wrong error message.
Instead of 'Error: syntax error' assembler fails with 'Error: lo register required'.
This patch fixes the issue.
eg:
$ cat x.s
.syntax unified
.thumb
vldrb.s16 q0, r0
Before this patch:
$ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
x.s: Assembler messages:
x.s:4: Error: lo register required -- `vldrb.s16 q0,r0'
After this patch:
$ arm-none-eabi-as x.s -march=armv8.1-m.main+mve -mfloat-abi=hard
x.s: Assembler messages:
x.s:4: Error: syntax error -- `vldrb.s16 q0,r0'
Alan Modra [Fri, 9 Oct 2020 06:26:33 +0000 (16:56 +1030)]
[GOLD] Power10 segv due to wild r2
Calling non-pcrel functions from pcrel code requires a stub to set up
r2. Gold created the stub, but an "optimisation" made the stub jump
to the function local entry, ie. r2 was not initialised.
This patch fixes that long branch stub problem, and another that might
occur for plt call stubs to local functions.
bfd/
* elf64-ppc.c (write_plt_relocs_for_local_syms): Don't do local
entry offset optimisation.
gold/
* powerpc.cc (Powerpc_relobj::do_relocate_sections): Don't do
local entry offset optimisation for lplt_section.
(Target_powerpc::Branch_info::make_stub): Don't add local
entry offset to long branch dest passed to
add_long_branch_entry. Do pass st_other bits.
(Stub_table::Branch_stub_ent): Add "other_" field.
(Stub_table::add_long_branch_entry): Add "other" param, and
save.
(Stub_table::branch_stub_size): Adjust long branch offset.
(Stub_table::do_write): Likewise.
(Target_powerpc::Relocate::relocate): Likewise.
Alan Modra [Fri, 9 Oct 2020 00:29:33 +0000 (10:59 +1030)]
[GOLD] internal error in relocate, at powerpc.cc:10473
GOT relocations can refer directly to a function in a fixed position
executable, unlike ADDR64 which needs a global entry stub, or branch
relocs, which need PLT stubs.
* powerpc.cc (is_got_reloc): New function.
(Target_powerpc::Relocate::relocate): Use it here, exclude GOT
relocs when looking for stubs.
Alan Modra [Wed, 7 Oct 2020 23:57:43 +0000 (10:27 +1030)]
[GOLD] Increase --split-stack-adjust-size
For functions with small (< 256 bytes) stack frames, the current x86
do_calls_non_split ignores --split-stack-adjust-size and, in
combination with __morestack_non_split, supplies a non-split-stack
function with at least 0x100000 (1M) available stack. On powerpc64, a
default of 0x4000 is not large enough to reliably work with the golang
testsuite. This increase the default size to the defacto x86 value.
* options.h (split_stack_adjust_size): Default to 0x100000.
H.J. Lu [Sat, 3 Oct 2020 11:23:55 +0000 (04:23 -0700)]
x86: Update register operand check for AddrPrefixOpReg
When the address size prefix applies to both the memory and the register
operand, we need to extract the address size prefix from the register
operand if the memory operand has no real registers, like symbol, DISP
or symbol(%rip).
NB: GCC always generates symbol(%rip) for RIP-relative addressing for
both x32 and x86-64.
Move the .code16 tests in movdir.s to movdir-16bit to show the correct
output from objdump.
gas/
PR gas/26685
* config/tc-i386.c (process_suffix): Also check the register
operand for the address size prefix if the memory operand has
no real registers.
* testsuite/gas/i386/enqcmd-16bit.d: New file.
* testsuite/gas/i386/enqcmd-16bit.s: Likewise.
* testsuite/gas/i386/movdir-16bit.d: Likewise.
* testsuite/gas/i386/movdir-16bit.s: Likewise.
* testsuite/gas/i386/enqcmd.s: Add tests with symbol and DISP.
* testsuite/gas/i386/x86-64-enqcmd.s: Likewise.
* testsuite/gas/i386/x86-64-movdir.s: Likewise.
* testsuite/gas/i386/movdir.s: Add tests with symbol and DISP.
Remove the .code16 test.
* testsuite/gas/i386/i386.exp: Run movdir-16bit and enqcmd-16bit.
* testsuite/gas/i386/x86-64-enqcmd-intel.d: Updated.
* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
* testsuite/gas/i386/enqcmd-intel.d: Likewise.
* testsuite/gas/i386/enqcmd.d: Likewise.
* testsuite/gas/i386/movdir-intel.d: Likewise.
* testsuite/gas/i386/movdir.d: Likewise.
* testsuite/gas/i386/x86-64-enqcmd-intel.d: Likewise.
* testsuite/gas/i386/x86-64-enqcmd.d: Likewise.
* testsuite/gas/i386/x86-64-movdir-intel.d: Likewise.
* testsuite/gas/i386/x86-64-movdir.d: Likewise.
opcodes/
PR gas/26685
* i386-dis.c (mod_table): Replace Gv with Gdq on movdiri.
Jan Beulich [Tue, 21 Jul 2020 12:20:11 +0000 (14:20 +0200)]
Revert "x86: Don't display eiz with no scale"
This reverts commit 04c662e2b66bedd050f97adec19afe0fcfce9ea7.
In my underlying suggestion I neglected the fact that in those
cases (,%eiz,1) is the only visible indication that 32-bit
addressing is in effect.
Alex Coplan [Tue, 6 Oct 2020 14:56:44 +0000 (15:56 +0100)]
aarch64: Fix bogus type punning in parse_barrier() [PR26699]
This patch fixes a bogus use of type punning in parse_barrier() which
was causing an assembly failure on big endian LP64 hosts when attempting
to assemble "isb sy" for AArch64.
The type of the entries in aarch64_barrier_opt_hsh is
aarch64_name_value_pair. We were incorrectly casting this to the
locally-defined asm_barrier_opt which has a wider type (on LP64) for the
second member. This happened to work on little-endian hosts but fails on
LP64 big endian.
The fix is to use the correct type in parse_barrier(). This makes the
locally-defined asm_barrier_opt redundant, so remove it.
* powerpc.cc (Target_powerpc): Rename power10_stubs_ to
power10_relocs_.
(Target_powerpc::set_power10_relocs): New accessor.
(Target_powerpc::set_power10_stubs): Delete.
(Target_powerpc::power10_stubs): Adjust.
(Target_powerpc::has_localentry0): New accessor.
(ld_0_11): New constant.
(glink_eh_frame_fde_64v1, glink_eh_frame_fde_64v2): Adjust.
(glink_eh_frame_fde_64v2_localentry0): New.
(Output_data_glink::pltresolve_size): Update.
(Output_data_glink::add_eh_frame): Use localentry0 version eh_frame.
(Output_data_glink::do_write): Move r2 save to start of ELFv2 stub
and only emit for has_localentry0. Don't use r2 in the stub.
(Target_powerpc::Scan::local, global): Adjust for
set_power10_relocs renaming.
(Target_powerpc::scan_relocs): Warn and reset plt_localentry0_.
Alan Modra [Sat, 26 Sep 2020 05:40:09 +0000 (15:10 +0930)]
PPC64_OPT_LOCALENTRY is incompatible with tail calls
The save of r2 in __glink_PLTresolve is the culprit. Remove it,
unless we know we need it for --plt-localentry. --plt-localentry
should not be used with power10 pc-relative code that makes tail
calls.
The patch also removes use of r2 as a scratch reg in the ELFv2
__glink_PLTresolve. Using r2 isn't a problem, this is just reducing
the number of scratch regs.
bfd/
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Depend on has_plt_localentry0.
(LD_R0_0R11, ADD_R11_R0_R11): Define.
(ppc64_elf_tls_setup): Disable params->plt_localentry0 when power10
code detected.
(ppc64_elf_size_stubs): Update __glink_PLTresolve eh_frame.
(ppc64_elf_build_stubs): Move r2 save to start of __glink_PLTresolve,
and only emit for has_plt_localentry0. Don't use r2 in the stub.
ld/
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/notoc2.d,
* testsuite/ld-powerpc/tlsdesc.wf,
* testsuite/ld-powerpc/tlsdesc2.d,
* testsuite/ld-powerpc/tlsdesc2.wf,
* testsuite/ld-powerpc/tlsopt5.d,
* testsuite/ld-powerpc/tlsopt5.wf,
* testsuite/ld-powerpc/tlsopt6.d,
* testsuite/ld-powerpc/tlsopt6.wf: Update __glink_PLTresolve.
* options.h (DEFINE_enum): Add optional_arg__ param, adjust
all uses.
(General_options): Add --power10-stubs and --no-power10-stubs.
* options.cc (General_options::finalize): Handle --power10-stubs.
* powerpc.cc (set_power10_stubs): Don't set when --power10-stubs=no.
(power10_stubs_auto): New.
(struct Plt_stub_ent): Add toc_ and tocoff_. Don't use a bitfield
for indx_.
(struct Branch_stub_ent): Add toc_and tocoff_. Use bitfields for
iter_, notoc_ and save_res_.
(add_plt_call_entry): Set toc_. Adjust resizing conditions for
--power10-stubs=auto.
(add_long_branch_entry): Set toc_.
(add_eh_frame, define_stub_syms): No longer use const_iterators
for plt and long branch stub iteration.
(build_tls_opt_head, build_tls_opt_tail): Change parameters and
return value. Move tests for __tls_get_addr to callers.
(plt_call_size): Handle --power10-stubs=auto.
(branch_stub_size): Likewise.
(Stub_table::do_write): Likewise.
(relocate): Likewise.
Alan Modra [Tue, 22 Sep 2020 13:21:42 +0000 (22:51 +0930)]
PR26656, power10 libstdc++.so segfault in __cxxabiv1::__cxa_throw
This adds missing support for a power10 version of the __tls_get_addr
call stub implementing DT_PPC64_OPT PPC64_OPT_TLS. Without this,
power10 code using __tls_get_addr fails miserably at runtime unless
the --no-tls-get-addr-optimize option is given.
PR 26656
* elf64-ppc.c (plt_stub_size): Add "odd" param. Use it with
size_power10_offset rather than calculating from start of stub.
Add size for notoc tls_get_addr_opt stub.
(plt_stub_pad): Add "odd" param, pass to plt_stub_size.
(build_tls_get_addr_head, build_tls_get_addr_tail): New functions.
(build_tls_get_addr_stub): Delete.
(ppc_build_one_stub): Use a temp for htab->params->stub_bfd.
Emit notoc tls_get_addr_opt stub. Move eh_frame code to
suit. Adjust code to use bfd_tls_get_addr_head/tail in place
of build_tls_get_addr_stub.
(ppc_size_one_stub): Size notoc tls_get_addr_opt stub.
Adjust plt_stub_size and plt_stub_pad calls. Correct "odd"
when padding stub. Size eh_frame for notoc stub too.
Correct lr_restore value.
(ppc64_elf_relocate_section): Don't skip over first insn of
notoc tls_get_addr_opt stub.
Some of the powerpc64 code editing functions are better run after
dynamic symbols have stabilised in order to make proper decisions
based on SYMBOL_REFERENCES_LOCAL. The dynamic symbols are processed
early in bfd_elf_size_dynamic_sections, before the backend
always_size_sections function is called.
One function, ppc64_elf_tls_setup must run before
bfd_elf_size_dynamic_sections because it changes dynamic symbols.
ppc64_elf_edit_opd and ppc64_elf_inline_plt can run early or late, I
think. ppc64_elf_tls_optimize and ppc64_elf_edit_toc are better run
later.
So this patch arranges to call some edit functions later via
always_size_sections.
Alan Modra [Tue, 18 Aug 2020 23:17:35 +0000 (08:47 +0930)]
Correct vcmpsq, vcmpuq and xvtlsbb BF field
These shouldn't be optional. The record form of vector instructions
set CR6, giving an expectation that omitting BF should be the same as
specifying CR6.
opcodes/
* ppc-opc.c (powerpc_opcodes): Replace OBF with BF for vcmpsq,
vcmpuq and xvtlsbb.
gas/
* testsuite/gas/ppc/int128.s: Correct vcmpuq.
* testsuite/gas/ppc/int128.d: Update.
* testsuite/gas/ppc/xvtlsbb.d: Update.
Alan Modra [Wed, 12 Aug 2020 14:01:28 +0000 (23:31 +0930)]
PowerPC64 --no-pcrel-optimize
This new option effectively ignores R_PPC64_PCREL_OPT, disabling the
optimization of instructions marked by that relocation. The patch
also disables GOT indirect to GOT/TOC pointer relative code editing
when --no-toc-optimize.
bfd/
* elf64-ppc.h (struct ppc64_elf_params): Add no_pcrel_opt.
* elf64-ppc.c (ppc64_elf_relocate_section): Disable GOT reloc
optimizations when --no-toc-optimize. Disable R_PPC64_PCREL_OPT
optimization when --no-pcrel-optimize.
ld/
* emultempl/ppc64elf.em (params): Init new field.
(enum ppc64_opt): Add OPTION_NO_PCREL_OPT.
(PARSE_AND_LIST_LONGOPTS, PARSE_AND_LIST_OPTIONS),
(PARSE_AND_LIST_ARGS_CASES): Support --no-pcrel-optimize.
projects / thirdparty / binutils-gdb.git / log
