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5 weeks agopru: Fix register class checks in predicates
Dimitar Dimitrov [Thu, 9 May 2024 19:19:24 +0000 (22:19 +0300)] 
pru: Fix register class checks in predicates

The register class checks in the multiply-source predicates was
incorrectly using the register number instead of the register
class for comparison.

gcc/ChangeLog:

* config/pru/predicates.md (pru_mulsrc0_operand): Use register
class instead of register number for the check.
(pru_mulsrc1_operand): Ditto.

Signed-off-by: Dimitar Dimitrov <dimitar@dinux.eu>
5 weeks ago[PR114942][LRA]: Don't reuse input reload reg of inout early clobber operand
Vladimir N. Makarov [Fri, 10 May 2024 13:15:50 +0000 (09:15 -0400)] 
[PR114942][LRA]: Don't reuse input reload reg of inout early clobber operand

  The insn in question has the same reg in inout operand and input
operand.  The inout operand is early clobber.  LRA reused input reload
reg of the inout operand for the input operand which is wrong.  It
were a good decision if the inout operand was not early clobber one.
The patch rejects the reuse for the PR test case.

gcc/ChangeLog:

PR target/114942
* lra-constraints.cc (struct input_reload): Add new member early_clobber_p.
(get_reload_reg): Add new arg early_clobber_p, don't reuse input
reload with true early_clobber_p member value, use the arg for new
element of curr_insn_input_reloads.
(match_reload): Assign false to early_clobber_p member.
(process_addr_reg, simplify_operand_subreg, curr_insn_transform):
Adjust get_reload_reg calls.

gcc/testsuite/ChangeLog:

PR target/114942
* gcc.target/i386/pr114942.c: New.

5 weeks ago[prange] Fix thinko in prange::update_bitmask() [PR115026]
Aldy Hernandez [Fri, 10 May 2024 10:26:49 +0000 (12:26 +0200)] 
[prange] Fix thinko in prange::update_bitmask() [PR115026]

gcc/ChangeLog:

PR tree-optimization/115026
* value-range.cc (prange::update_bitmask): Use operand bitmask.

5 weeks agotree-optimization/114998 - use-after-free with loop distribution
Richard Biener [Fri, 10 May 2024 12:19:49 +0000 (14:19 +0200)] 
tree-optimization/114998 - use-after-free with loop distribution

When loop distribution releases a PHI node of the original IL it
can end up clobbering memory that's re-used when it upon releasing
its RDG resets all stmt UIDs back to -1, even those that got released.

The fix is to avoid resetting UIDs based on stmts in the RDG but
instead reset only those still present in the loop.

PR tree-optimization/114998
* tree-loop-distribution.cc (free_rdg): Take loop argument.
Reset UIDs of stmts still in the IL rather than all stmts
referenced from the RDG.
(loop_distribution::build_rdg): Pass loop to free_rdg.
(loop_distribution::distribute_loop): Likewise.
(loop_distribution::transform_reduction_loop): Likewise.

* gcc.dg/torture/pr114998.c: New testcase.

5 weeks agoAllow patterns in SLP reductions
Richard Biener [Fri, 1 Mar 2024 08:29:32 +0000 (09:29 +0100)] 
Allow patterns in SLP reductions

The following removes the over-broad rejection of patterns for SLP
reductions which is done by removing them from LOOP_VINFO_REDUCTIONS
during pattern detection.  That's also insufficient in case the
pattern only appears on the reduction path.  Instead this implements
the proper correctness check in vectorizable_reduction and guides
SLP discovery to heuristically avoid forming later invalid groups.

I also couldn't find any testcase that FAILs when allowing the SLP
reductions to form so I've added one.

I came across this for single-lane SLP reductions with the all-SLP
work where we rely on patterns to properly vectorize COND_EXPR
reductions.

* tree-vect-patterns.cc (vect_pattern_recog_1): Do not
remove reductions involving patterns.
* tree-vect-loop.cc (vectorizable_reduction): Reject SLP
reduction groups with multiple lane-reducing reductions.
* tree-vect-slp.cc (vect_analyze_slp_instance): When discovering
SLP reduction groups avoid including lane-reducing ones.

* gcc.dg/vect/vect-reduc-sad-9.c: New testcase.

5 weeks agoAVR: target/114981 - Tweak __builtin_powif / __powisf2
Georg-Johann Lay [Wed, 8 May 2024 15:52:56 +0000 (17:52 +0200)] 
AVR: target/114981 - Tweak __builtin_powif / __powisf2

Implement __powisf2 in assembly.

PR target/114981
libgcc/
* config/avr/t-avr (LIB2FUNCS_EXCLUDE): Add _powisf2.
(LIB1ASMFUNCS) [!avrtiny]: Add _powif.
* config/avr/lib1funcs.S (mov4): New .macro.
(L_powif, __powisf2) [!avrtiny]: New module and function.

gcc/testsuite/
* gcc.target/avr/pr114981-powif.c: New test.

5 weeks agobpf: fix printing of memory operands in pseudoc asm dialect
Jose E. Marchesi [Fri, 10 May 2024 07:50:25 +0000 (09:50 +0200)] 
bpf: fix printing of memory operands in pseudoc asm dialect

The BPF backend was emitting memory operands in pseudo-C syntax
without surrounding parentheses.  These were being provided in the
corresponding instruction templates.

This was causing GCC emitting invalid instructions when finding inline
assembly with memory operands like:

asm volatile (
"r1 = *(u64 *)%[ctx_a];"
"if r1 != 42 goto 1f;"
"r1 = *(u64 *)%[ctx_b];"
"if r1 != 42 goto 1f;"
"r1 = *(u64 *)%[ctx_c];"
"if r1 != 7 goto 1f;"
"r1 /= 0;"
"1:"
:
: [ctx_a]"m"(ctx.a),
  [ctx_b]"m"(ctx.b),
  [ctx_c]"m"(ctx.c)
: "r1"
);

This patch changes the backend to include the surrounding parentheses
in the printed representation of the memory operands (much like
surrounding brackets are included in normal asm syntax) and adapts the
impacted instruction templates accordingly.

Tested in target bpf-unknown-none, host x86_64-linux-gnu.

gcc/ChangeLog:

* config/bpf/bpf.cc (bpf_print_operand_address): Include
surrounding parenthesis around mem operands in pseudoc asm
dialect.
* config/bpf/bpf.md (*mov<MM:mode>): Adapt accordingly.
(zero_extendhidi2): Likewise.
(zero_extendqidi2): Likewise.
(*extendsidi2): Likewise.
(*extendsidi2): Likewise.
(extendhidi2): Likewise.
(extendqidi2): Likewise.
(extendhisi2): Likewise.
* config/bpf/atomic.md (atomic_add<AMO:mode>): Likewise.
(atomic_and<AMO:mode>): Likewise.
(atomic_or<AMO:mode>): Likewise.
(atomic_xor<AMO:mode>): Likewise.
(atomic_fetch_add<AMO:mode>): Likewise.
(atomic_fetch_and<AMO:mode>): Likewise.
(atomic_fetch_or<AMO:mode>): Likewise.
(atomic_fetch_xor<AMO:mode>): Likewise.

5 weeks agoc++, mingw: Fix up types of dtor hooks to __cxa_{,thread_}atexit/__cxa_throw on mingw...
Jakub Jelinek [Fri, 10 May 2024 07:21:38 +0000 (09:21 +0200)] 
c++, mingw: Fix up types of dtor hooks to __cxa_{,thread_}atexit/__cxa_throw on mingw ia32 [PR114968]

__cxa_atexit/__cxa_thread_atexit/__cxa_throw functions accept function
pointers to usually directly destructors rather than wrappers around
them.
Now, mingw ia32 uses implicitly __attribute__((thiscall)) calling
conventions for METHOD_TYPE (where the this pointer is passed in %ecx
register, the rest on the stack), so these functions use:
in config/os/mingw32/os_defines.h:
 #if defined (__i386__)
 #define _GLIBCXX_CDTOR_CALLABI __thiscall
 #endif
in libsupc++/cxxabi.h
__cxa_atexit(void (_GLIBCXX_CDTOR_CALLABI *)(void*), void*, void*) _GLIBCXX_NOTHROW;
__cxa_thread_atexit(void (_GLIBCXX_CDTOR_CALLABI *)(void*), void*, void *) _GLIBCXX_NOTHROW;
__cxa_throw(void*, std::type_info*, void (_GLIBCXX_CDTOR_CALLABI *) (void *))
__attribute__((__noreturn__));

Now, mingw for some weird reason uses
 #define TARGET_CXX_USE_ATEXIT_FOR_CXA_ATEXIT hook_bool_void_true
so it never actually uses __cxa_atexit, but does use __cxa_thread_atexit
and __cxa_throw.  Recent changes for modules result in more detailed
__cxa_*atexit/__cxa_throw prototypes precreated by the compiler, and if
that happens and one also includes <cxxabi.h>, the compiler complains about
mismatches in the prototypes.

One thing is the missing thiscall attribute on the FUNCTION_TYPE, the
other problem is that all of atexit/__cxa_atexit/__cxa_thread_atexit
get function pointer types created by a single function,
get_atexit_fn_ptr_type (), which creates it depending on if atexit
or __cxa_atexit will be used as either void(*)(void) or void(*)(void *),
but when using atexit and __cxa_thread_atexit it uses the wrong function
type for __cxa_thread_atexit.

The following patch adds a target hook to add the thiscall attribute to the
function pointers, and splits the get_atexit_fn_ptr_type () function into
get_atexit_fn_ptr_type () and get_cxa_atexit_fn_ptr_type (), the former always
creates shared void(*)(void) type, the latter creates either
void(*)(void*) (on most targets) or void(__attribute__((thiscall))*)(void*)
(on mingw ia32).  So that we don't waiste another GTY global tree for it,
because cleanup_type used for the same purpose for __cxa_throw should be
the same, the code changes it to use that type too.

In register_dtor_fn then based on the decision whether to use atexit,
__cxa_atexit or __cxa_thread_atexit it picks the right function pointer
type, and also if it decides to emit a __tcf_* wrapper for the cleanup,
uses that type for that wrapper so that it agrees on calling convention.

2024-05-10  Jakub Jelinek  <jakub@redhat.com>

PR target/114968
gcc/
* target.def (use_atexit_for_cxa_atexit): Remove spurious space
from comment.
(adjust_cdtor_callabi_fntype): New cxx target hook.
* targhooks.h (default_cxx_adjust_cdtor_callabi_fntype): Declare.
* targhooks.cc (default_cxx_adjust_cdtor_callabi_fntype): New
function.
* doc/tm.texi.in (TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Add.
* doc/tm.texi: Regenerate.
* config/i386/i386.cc (ix86_cxx_adjust_cdtor_callabi_fntype): New
function.
(TARGET_CXX_ADJUST_CDTOR_CALLABI_FNTYPE): Redefine.
gcc/cp/
* cp-tree.h (atexit_fn_ptr_type_node, cleanup_type): Adjust macro
comments.
(get_cxa_atexit_fn_ptr_type): Declare.
* decl.cc (get_atexit_fn_ptr_type): Adjust function comment, only
build type for atexit argument.
(get_cxa_atexit_fn_ptr_type): New function.
(get_atexit_node): Call get_cxa_atexit_fn_ptr_type rather than
get_atexit_fn_ptr_type when using __cxa_atexit.
(get_thread_atexit_node): Call get_cxa_atexit_fn_ptr_type
rather than get_atexit_fn_ptr_type.
(start_cleanup_fn): Add ob_parm argument, call
get_cxa_atexit_fn_ptr_type or get_atexit_fn_ptr_type depending
on it and create PARM_DECL also based on that argument.
(register_dtor_fn): Adjust start_cleanup_fn caller, use
get_cxa_atexit_fn_ptr_type rather than get_atexit_fn_ptr_type
for use_dtor casts.
* except.cc (build_throw): Use get_cxa_atexit_fn_ptr_type ().

5 weeks ago[prange] Do not assume all pointers are the same size [PR115009]
Aldy Hernandez [Thu, 9 May 2024 21:37:30 +0000 (23:37 +0200)] 
[prange] Do not assume all pointers are the same size [PR115009]

In a world with same sized pointers we can always reuse the storage
slots, but since this is not always the case, we need to be more
careful.  However, we can always store an undefined, because that
requires no extra storage.

gcc/ChangeLog:

PR tree-optimization/115009
* value-range-storage.cc (prange_storage::alloc): Do not assume
all pointers are the same size.
(prange_storage::prange_storage): Same.
(prange_storage::fits_p): Same.

5 weeks agoRISC-V: Fix typos in code or comment [NFC]
Kito Cheng [Tue, 7 May 2024 02:18:58 +0000 (10:18 +0800)] 
RISC-V: Fix typos in code or comment [NFC]

Just found some typo when fixing bugs and then use aspell to find few
more typos, this patch didn't do anything other than fix typo.

gcc/ChangeLog:

* config/riscv/riscv-vsetvl.cc: Fix typos in comments.
(get_all_predecessors): Ditto.
(pre_vsetvl::m_unknow_info): Rename to...
(pre_vsetvl::m_unknown_info): this.
(pre_vsetvl::compute_vsetvl_def_data): Rename m_unknow_info to
m_unknown_info.
(pre_vsetvl::cleaup): Rename to...
(pre_vsetvl::cleanup): this.
(pre_vsetvl::compute_vsetvl_def_data): Fix typos.
(pass_vsetvl::lazy_vsetvl): Update function name and fix typos.
* config/riscv/riscv.cc: Fix typos in comments.
(struct machine_function): Fix typo in comments.
(riscv_valid_lo_sum_p): Ditto.
(riscv_force_address): Ditto.
(riscv_immediate_operand_p): Ditto.
(riscv_in_small_data_p): Ditto.
(riscv_first_stack_step): Ditto.
(riscv_expand_prologue): Ditto.
(riscv_convert_vector_chunks): Ditto.
(riscv_override_options_internal): Ditto.
(get_common_costs): Ditto.

5 weeks agodriver: Move -fdiagnostics-urls= early like -fdiagnostics-color= [PR114980]
Xi Ruoyao [Wed, 8 May 2024 03:25:57 +0000 (11:25 +0800)] 
driver: Move -fdiagnostics-urls= early like -fdiagnostics-color= [PR114980]

In GCC 14 we started to emit URLs for "command-line option <option> is
valid for <language> but not <another language>" and "-Werror= argument
'-Werror=<option>' is not valid for <language>" warnings.  So we should
have moved -fdiagnostics-urls= early like -fdiagnostics-color=, or
-fdiagnostics-urls= wouldn't be able to control URLs in these warnings.

No test cases are added because with TERM=xterm-256colors PR114980
already triggers some test failures.

gcc/ChangeLog:

PR driver/114980
* opts-common.cc (prune_options): Move -fdiagnostics-urls=
early like -fdiagnostics-color=.

5 weeks ago[committed] [RISC-V] Provide splitting guidance to combine to faciliate shNadd.uw...
Jeff Law [Fri, 10 May 2024 03:07:06 +0000 (21:07 -0600)] 
[committed] [RISC-V] Provide splitting guidance to combine to faciliate shNadd.uw generation

This fixes a minor code quality issue I found while comparing GCC and LLVM.
Essentially we want to do a bit of re-association to generate shNadd.uw
instructions.

Combine does the right thing and finds all the necessary instructions,
reassociates the operands, combines constants, etc.  Where is fails is finding
a good split point.  The backend can trivially provide guidance on how to split
via a define_split pattern.

This has survived both Ventana's internal CI system (rv64gcb) as well as my own
(rv64gc, rv32gcv).

I'll wait for the external CI system to give the all-clear before pushing.

gcc/
* config/riscv/bitmanip.md: Add splitter for shadd feeding another
add instruction.

gcc/testsuite/

* gcc.target/riscv/zba-shadduw.c: New test.

5 weeks agoRevert: "Enable prange support." [PR114985]
Aldy Hernandez [Thu, 9 May 2024 22:29:13 +0000 (00:29 +0200)] 
Revert: "Enable prange support." [PR114985]

This reverts commit 36e877996936abd8bd08f8b1d983c8d1023a5842 until the IPA
pass is fixed with regards to POINTER = POINTER <RELOP> POINTER.

5 weeks agoConstant fold {-1,-1} << 1 in simplify-rtx.cc
Roger Sayle [Thu, 9 May 2024 21:45:54 +0000 (22:45 +0100)] 
Constant fold {-1,-1} << 1 in simplify-rtx.cc

This patch addresses a missed optimization opportunity in the RTL
optimization passes.  The function simplify_const_binary_operation
will constant fold binary operators with two CONST_INT operands,
and those with two CONST_VECTOR operands, but is missing compile-time
evaluation of binary operators with a CONST_VECTOR and a CONST_INT,
such as vector shifts and rotates.

The first version of this patch didn't contain a switch statement to
explicitly check for valid binary opcodes, which bootstrapped and
regression tested fine, but my paranoia has got the better of me,
so this version now checks that VEC_SELECT or some funky (future)
rtx_code doesn't cause problems.

2024-05-09  Roger Sayle  <roger@nextmovesoftware.com>

gcc/ChangeLog
* simplify-rtx.cc (simplify_const_binary_operation): Constant
fold binary operations where the LHS is CONST_VECTOR and the
RHS is CONST_INT (or CONST_DOUBLE) such as vector shifts.

5 weeks agoc++: failure to suppress -Wsizeof-array-div in template [PR114983]
Marek Polacek [Wed, 8 May 2024 21:02:49 +0000 (17:02 -0400)] 
c++: failure to suppress -Wsizeof-array-div in template [PR114983]

-Wsizeof-array-div offers a way to suppress the warning by wrapping
the second operand of the division in parens:

  sizeof (samplesBuffer) / (sizeof(unsigned char))

but this doesn't work in a template, because we fail to propagate
the suppression bits.  Do it, then.

The finish_parenthesized_expr hunk is not needed because suppress_warning
isn't very fine-grained.  But I think it makes sense to be explicit and
not rely on OPT_Wparentheses also suppressing OPT_Wsizeof_array_div.

PR c++/114983

gcc/cp/ChangeLog:

* pt.cc (tsubst_expr) <case SIZEOF_EXPR>: Use copy_warning.
* semantics.cc (finish_parenthesized_expr): Also suppress
-Wsizeof-array-div.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wsizeof-array-div3.C: New test.

5 weeks agotestsuite: Fix up pr84508* tests [PR84508]
Jakub Jelinek [Thu, 9 May 2024 18:59:05 +0000 (20:59 +0200)] 
testsuite: Fix up pr84508* tests [PR84508]

The tests FAIL on x86_64-linux with
/usr/bin/ld: cannot find -lubsan
collect2: error: ld returned 1 exit status
compiler exited with status 1
FAIL: gcc.target/i386/pr84508-1.c (test for excess errors)
Excess errors:
/usr/bin/ld: cannot find -lubsan

The problem is that only *.dg/ubsan/ubsan.exp calls ubsan_init
which adds the needed search paths to libubsan library.
So, link/run tests for -fsanitize=undefined need to go into
gcc.dg/ubsan/ or g++.dg/ubsan/, even when they are target specific.

2024-05-09  Jakub Jelinek  <jakub@redhat.com>

PR target/84508
* gcc.target/i386/pr84508-1.c: Move to ...
* gcc.dg/ubsan/pr84508-1.c: ... here.  Restrict to i?86/x86_64
non-ia32 targets.
* gcc.target/i386/pr84508-2.c: Move to ...
* gcc.dg/ubsan/pr84508-2.c: ... here.  Restrict to i?86/x86_64
non-ia32 targets.

5 weeks agoPR modula2/115003 exporting a symbol to outer scope with a name clash causes ICE
Gaius Mulley [Thu, 9 May 2024 18:35:20 +0000 (19:35 +0100)] 
PR modula2/115003 exporting a symbol to outer scope with a name clash causes ICE

An ICE will occur if an unknown symbol is exported and causes a name
clash.  The error mechanism attempts to find the scope of an unknown
symbol.  This patch adds a missing case clause to GetScope and returns
NulSym if the scope is an unknown symbol.

gcc/m2/ChangeLog:

PR modula2/115003
* gm2-compiler/SymbolTable.mod (GetScope): Add UndefinedSym
case clause and return NulSym.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
5 weeks agoc++: lambda capturing structured bindings [PR85889]
Marek Polacek [Fri, 1 Mar 2024 22:13:02 +0000 (17:13 -0500)] 
c++: lambda capturing structured bindings [PR85889]

<https://wg21.link/p1381r1> clarifies that it's OK to capture structured
bindings.

[expr.prim.lambda.capture]/4 says "The identifier in a simple-capture shall
denote a local entity" and [basic.pre]/3: "An entity is a [...] structured
binding".

It doesn't appear that this was made a DR, so, strictly speaking, we
should have a -Wc++20-extensions warning, like clang++.

PR c++/85889

gcc/cp/ChangeLog:

* lambda.cc (add_capture): Add a pedwarn for capturing structured
bindings.

gcc/testsuite/ChangeLog:

* g++.dg/cpp2a/decomp3.C: Use -Wno-c++20-extensions.
* g++.dg/cpp1z/decomp60.C: New test.

5 weeks agoAdd myself to DCO
H.J. Lu [Thu, 9 May 2024 14:59:50 +0000 (07:59 -0700)] 
Add myself to DCO

ChangeLog:

* MAINTAINERS: Add myself to DCO.

Signed-off-by: H.J. Lu <hjl.tools@gmail.com>
5 weeks agosra: Do not leave work for DSE (that it can sometimes not perform)
Martin Jambor [Thu, 9 May 2024 14:39:44 +0000 (16:39 +0200)] 
sra: Do not leave work for DSE (that it can sometimes not perform)

When looking again at the g++.dg/tree-ssa/pr109849.C testcase we
discovered that it generates terrible store-to-load forwarding stalls
because SRA was leaving behind aggregate loads but all the stores were
by scalar parts and DSE failed to remove the useless load.  SRA has
all the knowledge to remove the statement even now, so this small
patch makes it do so.

With this patch, the g++.dg/tree-ssa/pr109849.C micro-benchmark runs 9
times faster (on an AMD EPYC 75F3 machine).

gcc/ChangeLog:

2024-04-18  Martin Jambor  <mjambor@suse.cz>

* tree-sra.cc (sra_modify_assign): Remove the original statement
also when dealing with a store to a fully covered aggregate from a
non-candidate.

gcc/testsuite/ChangeLog:

2024-04-23  Martin Jambor  <mjambor@suse.cz>

* g++.dg/tree-ssa/pr109849.C: Also check that the aggeegate store
to cur disappears.
* gcc.dg/tree-ssa/ssa-dse-26.c: Instead of relying on DSE,
check that the unwanted stores were removed at early SRA time.

5 weeks agoManually update entries for the Revert Revert commits.
Jakub Jelinek [Thu, 9 May 2024 11:09:06 +0000 (13:09 +0200)] 
Manually update entries for the Revert Revert commits.

5 weeks agocontrib: Add 109f1b28fc94c93096506e3df0c25e331cef19d0 to ignored commits
Jakub Jelinek [Thu, 9 May 2024 11:01:31 +0000 (13:01 +0200)] 
contrib: Add 109f1b28fc94c93096506e3df0c25e331cef19d0 to ignored commits

2024-05-09  Jakub Jelinek  <jakub@redhat.com>

* gcc-changelog/git_update_version.py: Replace
9dbff9c05520a74e6cd337578f27b56c941f64f3 with
39f81924d88e3cc197fc3df74204c9b5e01e12f7 and
109f1b28fc94c93096506e3df0c25e331cef19d0 in IGNORED_COMMITS.

5 weeks agoDaily bump.
GCC Administrator [Thu, 9 May 2024 10:58:01 +0000 (10:58 +0000)] 
Daily bump.

5 weeks agoRISC-V: Make full-vec-move1.c test robust for optimization
Pan Li [Thu, 9 May 2024 02:56:46 +0000 (10:56 +0800)] 
RISC-V: Make full-vec-move1.c test robust for optimization

During investigate the support of early break autovec, we notice
the test full-vec-move1.c will be optimized to 'return 0;' in main
function body.  Because somehow the value of V type is compiler
time constant,  and then the second loop will be considered as
assert (true).

Thus,  the ccp4 pass will eliminate these stmt and just return 0.

typedef int16_t V __attribute__((vector_size (128)));

int main ()
{
  V v;
  for (int i = 0; i < sizeof (v) / sizeof (v[0]); i++)
    (v)[i] = i;

  V res = v;
  for (int i = 0; i < sizeof (v) / sizeof (v[0]); i++)
    assert (res[i] == i); // will be optimized to assert (true)
}

This patch would like to introduce a extern function to use the res[i]
that get rid of the ccp4 optimization.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/rvv/autovec/vls-vlmax/full-vec-move1.c:
Introduce extern func use to get rid of ccp4 optimization.

Signed-off-by: Pan Li <pan2.li@intel.com>
5 weeks agocontrib: Add 9dbff9c05520a74e6cd337578f27b56c941f64f3 to ignored commits
Jakub Jelinek [Thu, 9 May 2024 10:15:51 +0000 (12:15 +0200)] 
contrib: Add 9dbff9c05520a74e6cd337578f27b56c941f64f3 to ignored commits

2024-05-09  Jakub Jelinek  <jakub@redhat.com>

* gcc-changelog/git_update_version.py: Add
9dbff9c05520a74e6cd337578f27b56c941f64f3 to IGNORED_COMMITS.

5 weeks agotestsuite: Fix up vector-subaccess-1.C test for ia32 [PR89224]
Jakub Jelinek [Thu, 9 May 2024 09:18:21 +0000 (11:18 +0200)] 
testsuite: Fix up vector-subaccess-1.C test for ia32 [PR89224]

The test FAILs on i686-linux due to
.../gcc/testsuite/g++.dg/torture/vector-subaccess-1.C:16:6: warning: SSE vector argument without SSE enabled changes the ABI [-Wpsabi]
excess warnings.

This fixes it by adding -Wno-psabi, like commonly done in other tests.

2024-05-09  Jakub Jelinek  <jakub@redhat.com>

PR c++/89224
* g++.dg/torture/vector-subaccess-1.C: Add -Wno-psabi as additional
options.

5 weeks agoMIPS: Support constraint 'w' for MSA instruction
YunQiang Su [Wed, 8 May 2024 11:04:33 +0000 (19:04 +0800)] 
MIPS: Support constraint 'w' for MSA instruction

Support syntax like:
asm volatile ("fmadd.d %w0, %w1, %w2" : "+w"(a): "w"(b), "w"(c));

gcc
* config/mips/constraints.md: Add new constraint 'w'.

gcc/testsuite
* gcc.target/mips/msa-inline-asm.c: New test.

5 weeks agoRISC-V: Add tests for cpymemsi expansion
Christoph Müllner [Thu, 11 Apr 2024 10:07:10 +0000 (12:07 +0200)] 
RISC-V: Add tests for cpymemsi expansion

cpymemsi expansion was available for RISC-V since the initial port.
However, there are not tests to detect regression.
This patch adds such tests.

Three of the tests target the expansion requirements (known length and
alignment). One test reuses an existing memcpy test from the by-pieces
framework (gcc/testsuite/gcc.dg/torture/inline-mem-cpy-1.c).

gcc/testsuite/ChangeLog:

* gcc.target/riscv/cpymemsi-1.c: New test.
* gcc.target/riscv/cpymemsi-2.c: New test.
* gcc.target/riscv/cpymemsi-3.c: New test.
* gcc.target/riscv/cpymemsi.c: New test.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
5 weeks agoi386: Fix some intrinsics without alignment requirements.
Hu, Lin1 [Fri, 19 Jan 2024 07:22:10 +0000 (15:22 +0800)] 
i386: Fix some intrinsics without alignment requirements.

gcc/ChangeLog:

PR target/84508
* config/i386/emmintrin.h
(_mm_load_sd): Remove alignment requirement.
(_mm_store_sd): Ditto.
(_mm_loadh_pd): Ditto.
(_mm_loadl_pd): Ditto.
(_mm_storel_pd): Add alignment requirement.
* config/i386/xmmintrin.h
(_mm_loadh_pi): Remove alignment requirement.
(_mm_loadl_pi): Ditto.
(_mm_load_ss): Ditto.
(_mm_store_ss): Ditto.

gcc/testsuite/ChangeLog:

PR target/84508
* gcc.target/i386/pr84508-1.c: New test.
* gcc.target/i386/pr84508-2.c: Ditto.

5 weeks ago[ranger] Force buffer alignment in Value_Range [PR114912]
Aldy Hernandez [Fri, 3 May 2024 09:17:32 +0000 (11:17 +0200)] 
[ranger] Force buffer alignment in Value_Range [PR114912]

gcc/ChangeLog:

PR tree-optimization/114912
* value-range.h (class Value_Range): Use a union.

5 weeks ago[prange] Reword dispatch error message
Aldy Hernandez [Wed, 8 May 2024 20:50:22 +0000 (22:50 +0200)] 
[prange] Reword dispatch error message

After reading the ICE for the PR, it's obvious the error message is
rather cryptic.  This makes it less so.

gcc/ChangeLog:

* range-op.cc (range_op_handler::discriminator_fail): Reword error
message.

5 weeks agoi386: fix ix86_hardreg_mov_ok with lra_in_progress
konglin1 [Thu, 9 May 2024 01:48:56 +0000 (09:48 +0800)] 
i386: fix ix86_hardreg_mov_ok with lra_in_progress

Originally eliminate_regs_in_insnit will transform
(parallel [
  (set (reg:QI 130)
    (plus:QI (subreg:QI (reg:DI 19 frame) 0)
      (const_int 96)))
  (clobber (reg:CC 17 flag))]) {*addqi_1}
to
(set (reg:QI 130)
 (subreg:QI (reg:DI 19 frame) 0)) {*movqi_internal}
when verify_changes.

But with No Flags add, it transforms
(set (reg:QI 5 di)
  (plus:QI (subreg:QI (reg:DI 19 frame) 0)
   (const_int 96))) {*addqi_1_nf}
to
(set (reg:QI 5 di)
 (subreg:QI (reg:DI 19 frame) 0)) {*addqi_1_nf}.
there is no extra clobbers at the end, and
its dest reg just is a hardreg. For ix86_hardreg_mov_ok,
it returns false. So it fails to update insn and causes
the ICE when transform to movqi_internal.

But actually it is ok and safe for ix86_hardreg_mov_ok
when lra_in_progress.

And tested the spec2017, the performance was not affected.

gcc/ChangeLog:

* config/i386/i386.cc (ix86_hardreg_mov_ok): Relax
hard reg mov restriction when lra in progress.

5 weeks ago[PATCH v1 1/1] RISC-V: Nan-box the result of movbf on soft-bf16
Xiao Zeng [Wed, 8 May 2024 20:00:58 +0000 (14:00 -0600)] 
[PATCH v1 1/1] RISC-V: Nan-box the result of movbf on soft-bf16

1 This patch implements the Nan-box of bf16.

2 Please refer to the Nan-box implementation of hf16 in:
<https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=057dc349021660c40699fb5c98fd9cac8e168653>

3 The discussion about Nan-box can be found on the website:
<https://www.mail-archive.com/search?q=Nan-box+the+result+of+movhf+on+soft-fp16&l=gcc-patches%40gcc.gnu.org>

4 Below test are passed for this patch
        * The riscv fully regression test.

gcc/ChangeLog:

* config/riscv/riscv.cc (riscv_legitimize_move): Expand movbf
with Nan-boxing value.
* config/riscv/riscv.md (*movbf_softfloat_boxing): New pattern.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/_Bfloat16-nanboxing.c: New test.

5 weeks ago[RISC-V][V2] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis
Jeff Law [Wed, 8 May 2024 19:44:00 +0000 (13:44 -0600)] 
[RISC-V][V2] Fix incorrect if-then-else nesting of Zbs usage in constant synthesis

Reposting without the patch that ignores whitespace.  The CI system doesn't
like including both patches, that'll generate a failure to apply and none of
the tests actually get run.

So I managed to goof the if-then-else level of the bseti bits last week.  They
were supposed to be a last ditch effort to improve the result, but ended up
inside a conditional where they don't really belong.  I almost always use Zba,
Zbb and Zbs together, so it slipped by.

So it's NFC if you always test with Zbb and Zbs enabled together.  But if you
enabled Zbs without Zbb you'd see a failure to use bseti.

gcc/
* config/riscv/riscv.cc (riscv_build_integer_1): Fix incorrect
if-then-else nesting of Zbs code.

5 weeks agoAVR: target/114981 - Support __builtin_powi[l] / __powidf2.
Georg-Johann Lay [Wed, 8 May 2024 15:56:05 +0000 (17:56 +0200)] 
AVR: target/114981 - Support __builtin_powi[l] / __powidf2.

This supports __powidf2 by means of a double wrapper for already
existing f7_powi (renamed to __f7_powi by f7-renames.h).
It tweaks the implementation so that it does not perform trivial
multiplications with 1.0 any more, but instead uses a move.
It also fixes the last statement of f7_powi, which was wrong.
Notice that f7_powi was unused until now.

PR target/114981
libgcc/config/avr/libf7/
* libf7-common.mk (F7_ASM_PARTS): Add D_powi
* libf7-asm.sx (F7MOD_D_powi_, __powidf2): New module and function.
* libf7.c (f7_powi): Fix last (wrong) statement.
Tweak trivial multiplications with 1.0.

gcc/testsuite/
* gcc.target/avr/pr114981-powil.c: New test.

5 weeks ago[PR114810][LRA]: Recognize alternatives with lack of available registers for insn...
Vladimir N. Makarov [Wed, 8 May 2024 14:39:04 +0000 (10:39 -0400)] 
[PR114810][LRA]: Recognize alternatives with lack of available registers for insn and demote them.

  PR114810 was fixed in machine-dependent way.  This patch is a fix of
the PR on LRA side.  LRA chose alternative with constraints `&r,r,ro`
on i686 when all operands of DImode and there are only 6 available
general regs.  The patch recognizes such case and significantly
increase the alternative cost.  It does not reject alternative
completely.  So the fix is safe but it might not work for all
potentially possible cases of registers lack as register classes can
have any relations including subsets and intersections.

gcc/ChangeLog:

PR target/114810
* lra-constraints.cc (process_alt_operands): Calculate union reg
class for the alternative, peak matched regs and required reload
regs.  Recognize alternatives with lack of available registers and
make them costly.  Add debug print about this case.

5 weeks agoc++: #pragma doesn't disable -Wunused-label [PR113582]
Marek Polacek [Wed, 24 Jan 2024 23:06:48 +0000 (18:06 -0500)] 
c++: #pragma doesn't disable -Wunused-label [PR113582]

The PR complains that

  void do_something(){
    #pragma GCC diagnostic push
    #pragma GCC diagnostic ignored "-Wunused-label"
    start:;
    #pragma GCC diagnostic pop
  } #1

doesn't work.  That's because we warn_for_unused_label only while we're
in finish_function, meaning we're at #1 where we're outside the #pragma
region.  We can use suppress_warning + warning_suppressed_p to fix this.

Note that I'm not using TREE_USED.  Propagating it in tsubst_stmt/LABEL_EXPR
from decl to label would mean that we don't warn in do_something2, but
I think we want the warning there: we're in a template and the goto is
a discarded statement.

PR c++/113582

gcc/c-family/ChangeLog:

* c-warn.cc (warn_for_unused_label): Don't warn if -Wunused-label has
been suppressed for the label.

gcc/cp/ChangeLog:

* parser.cc (cp_parser_label_for_labeled_statement): suppress_warning
if it's not enabled at input_location.
* pt.cc (tsubst_stmt): Call copy_warning.

gcc/testsuite/ChangeLog:

* g++.dg/warn/Wunused-label-4.C: New test.

5 weeks agomatch: `a CMP nonnegative ? a : ABS<a>` simplified to just `ABS<a>` [PR112392]
Andrew Pinski [Tue, 7 May 2024 06:53:41 +0000 (23:53 -0700)] 
match: `a CMP nonnegative ? a : ABS<a>` simplified to just `ABS<a>` [PR112392]

We can optimize `a == nonnegative ? a : ABS<a>`, `a > nonnegative ? a : ABS<a>`
and `a >= nonnegative ? a : ABS<a>` into `ABS<a>`. This allows removal of
some extra comparison and extra conditional moves in some cases.
I don't remember where I had found though but it is simple to add so
let's add it.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Note I have a secondary pattern for the equal case as either a or nonnegative
could be used.

PR tree-optimization/112392

gcc/ChangeLog:

* match.pd (`x CMP nonnegative ? x : ABS<x>`): New pattern;
where CMP is ==, > and >=.
(`x CMP nonnegative@y ? y : ABS<x>`): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/phi-opt-41.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
5 weeks agotree-ssa-sink: Improve code sinking pass
Ajit Kumar Agarwal [Wed, 8 May 2024 14:21:27 +0000 (09:21 -0500)] 
tree-ssa-sink: Improve code sinking pass

Currently, code sinking will sink code at the use points with loop having same
nesting depth. The following patch improves code sinking by placing the sunk
code in begining of the block after the labels.

2024-05-08  Ajit Kumar Agarwal  <aagarwa1@linux.ibm.com>

gcc/ChangeLog:

PR tree-optimization/81953
* tree-ssa-sink.cc (statement_sink_location):Sink statements at
the begining of the basic block after labels.

gcc/testsuite/ChangeLog:

PR tree-optimization/81953
* gcc.dg/tree-ssa/ssa-sink-21.c: New test.

5 weeks agoRISC-V: Cover sign-extensions in lshr<GPR:mode>3_zero_extend_4
Christoph Müllner [Tue, 7 May 2024 20:23:26 +0000 (22:23 +0200)] 
RISC-V: Cover sign-extensions in lshr<GPR:mode>3_zero_extend_4

The lshr<GPR:mode>3_zero_extend_4 pattern targets bit extraction
with zero-extension. This pattern represents the canonical form
of zero-extensions of a logical right shift.

The same optimization can be applied to sign-extensions.
Given the two optimizations are so similar, this patch converts
the existing one to also cover the sign-extension case as well.

gcc/ChangeLog:

* config/riscv/iterators.md (ashiftrt): New code attribute
'extract_shift' and adding extractions to optab.
* config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): Rename to...
(*<any_extract:optab><GPR:mode>3):...this and add support for
sign-extensions.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/extend-shift-helpers.h: Add helpers for
sign-extension.
* gcc.target/riscv/sign-extend-rshift-32.c: New test.
* gcc.target/riscv/sign-extend-rshift-64.c: New test.
* gcc.target/riscv/sign-extend-rshift.c: New test.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
5 weeks agoRISC-V: Add zero_extract support for rv64gc
Christoph Müllner [Mon, 6 May 2024 10:33:32 +0000 (12:33 +0200)] 
RISC-V: Add zero_extract support for rv64gc

The combiner attempts to optimize a zero-extension of a logical right shift
using zero_extract. We already utilize this optimization for those cases
that result in a single instructions.  Let's add a insn_and_split
pattern that also matches the generic case, where we can emit an
optimized sequence of a slli/srli.

Tested with SPEC CPU 2017 (rv64gc).

PR target/111501

gcc/ChangeLog:

* config/riscv/riscv.md (*lshr<GPR:mode>3_zero_extend_4): New
pattern for zero-extraction.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/extend-shift-helpers.h: New test.
* gcc.target/riscv/pr111501.c: New test.
* gcc.target/riscv/zero-extend-rshift-32.c: New test.
* gcc.target/riscv/zero-extend-rshift-64.c: New test.
* gcc.target/riscv/zero-extend-rshift.c: New test.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
5 weeks agoRISC-V: Cover sign-extensions in lshrsi3_zero_extend_2
Christoph Müllner [Tue, 7 May 2024 21:26:02 +0000 (23:26 +0200)] 
RISC-V: Cover sign-extensions in lshrsi3_zero_extend_2

The pattern lshrsi3_zero_extend_2 extracts the MSB bits of the lower
32-bit word and zero-extends it back to DImode.
This is realized using srliw, which operates on 32-bit registers.

The same optimziation can be applied to sign-extensions when emitting
a sraiw instead of the srliw.

Given these two optimizations are so similar, this patch simply
converts the existing one to also cover the sign-extension case as well.

gcc/ChangeLog:

* config/riscv/iterators.md (sraiw): New code iterator 'any_extract'.
New code attribute 'extract_sidi_shift'.
* config/riscv/riscv.md (*lshrsi3_zero_extend_2): Rename to...
(*lshrsi3_extend_2):...this and add support for sign-extensions.

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sign-extend-1.c: Test sraiw 24 and sraiw 16.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
5 weeks agoRISC-V: Add test for sraiw-31 special case
Christoph Müllner [Tue, 7 May 2024 20:59:44 +0000 (22:59 +0200)] 
RISC-V: Add test for sraiw-31 special case

We already optimize a sign-extension of a right-shift by 31 in
<optab>si3_extend.  Let's add a test for that (similar to
zero-extend-1.c).

gcc/testsuite/ChangeLog:

* gcc.target/riscv/sign-extend-1.c: New test.

Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
5 weeks agoFix SLP reduction initial value for pointer reductions
Richard Biener [Fri, 23 Feb 2024 10:21:20 +0000 (11:21 +0100)] 
Fix SLP reduction initial value for pointer reductions

For pointer reductions we need to convert the initial value to
the vector component integer type.

* tree-vect-loop.cc (get_initial_defs_for_reduction): Convert
initial value to the vector component type.

5 weeks agoFix non-grouped SLP load/store accounting in alignment peeling
Richard Biener [Tue, 5 Mar 2024 15:07:41 +0000 (16:07 +0100)] 
Fix non-grouped SLP load/store accounting in alignment peeling

When we have a non-grouped access we bogously multiply by zero.
This shows most with single-lane SLP but also happens with
the multi-lane splat case.

* tree-vect-data-refs.cc (vect_enhance_data_refs_alignment):
Properly guard DR_GROUP_SIZE access with STMT_VINFO_GROUPED_ACCESS.

5 weeks agoaarch64: Fix typo in aarch64-ldp-fusion.cc:combine_reg_notes [PR114936]
Alex Coplan [Fri, 3 May 2024 14:12:32 +0000 (14:12 +0000)] 
aarch64: Fix typo in aarch64-ldp-fusion.cc:combine_reg_notes [PR114936]

This fixes a typo in combine_reg_notes in the load/store pair fusion
pass.  As it stands, the calls to filter_notes store any
REG_FRAME_RELATED_EXPR to fr_expr with the following association:

 - i2 -> fr_expr[0]
 - i1 -> fr_expr[1]

but then the checks inside the following if statement expect the
opposite (more natural) association, i.e.:

 - i2 -> fr_expr[1]
 - i1 -> fr_expr[0]

this patch fixes the oversight by swapping the fr_expr indices in the
calls to filter_notes.

In hindsight it would probably have been less confusing / error-prone to
have combine_reg_notes take an array of two insns, then we wouldn't have
to mix 1-based and 0-based indexing as well as remembering to call
filter_notes in reverse program order.  This however is a minimal fix
for backporting purposes.

gcc/ChangeLog:

PR target/114936
* config/aarch64/aarch64-ldp-fusion.cc (combine_reg_notes):
Ensure insn iN has its REG_FRAME_RELATED_EXPR (if any) stored in
FR_EXPR[N-1], thus matching the correspondence expected by the
copy_rtx calls.

5 weeks agotree-ssa-loop-prefetch.cc: Honour -fno-unroll-loops
Stefan Schulze Frielinghaus [Wed, 8 May 2024 08:48:45 +0000 (10:48 +0200)] 
tree-ssa-loop-prefetch.cc: Honour -fno-unroll-loops

This fixes a couple of tests (gcc.dg/vect/pr109011-*.c) on s390 where
loops are unrolled although -fno-unroll-loops is specified.

gcc/ChangeLog:

* tree-ssa-loop-prefetch.cc (determine_unroll_factor): Honour
-fno-unroll-loops.

5 weeks agoAVR: target/114975 - Add combine-pattern for __parityqi2.
Georg-Johann Lay [Tue, 7 May 2024 17:42:30 +0000 (19:42 +0200)] 
AVR: target/114975 - Add combine-pattern for __parityqi2.

PR target/114975
gcc/
* config/avr/avr.md: Add combine pattern for
8-bit parity detection.

gcc/testsuite/
* gcc.target/avr/pr114975-parity.c: New test.

5 weeks agoAVR: target/114975 - Add combine-pattern for __popcountqi2.
Georg-Johann Lay [Tue, 7 May 2024 17:39:55 +0000 (19:39 +0200)] 
AVR: target/114975 - Add combine-pattern for __popcountqi2.

PR target/114975
gcc/
* config/avr/avr.md: Add combine pattern for
8-bit popcount detection.

gcc/testsuite/
* gcc.target/avr/pr114975-popcount.c: New test.

5 weeks agoFix and speedup IDF pruning by dominator
Richard Biener [Thu, 4 Apr 2024 13:18:06 +0000 (15:18 +0200)] 
Fix and speedup IDF pruning by dominator

When insert_updated_phi_nodes_for tries to skip pruning the IDF to
blocks dominated by the nearest common dominator of the set of
definition blocks it compares against ENTRY_BLOCK but that's never
going to be the common dominator.  In fact if it ever were the code
fails to copy IDF to PRUNED_IDF, leading to wrong code.

The following fixes that by avoiding the copy and pruning from the
IDF in-place as well as using the more approprate check against
the single successor of the ENTRY_BLOCK.

* tree-into-ssa.cc (insert_updated_phi_nodes_for): Skip
pruning when the nearest common dominator is the successor
of ENTRY_BLOCK.  Do not copy IDF but prune it directly.

5 weeks agoreassoc: Fix up optimize_range_tests_to_bit_test [PR114965]
Jakub Jelinek [Wed, 8 May 2024 08:17:32 +0000 (10:17 +0200)] 
reassoc: Fix up optimize_range_tests_to_bit_test [PR114965]

The optimize_range_tests_to_bit_test optimization normally emits a range
test first:
          if (entry_test_needed)
            {
              tem = build_range_check (loc, optype, unshare_expr (exp),
                                       false, lowi, high);
              if (tem == NULL_TREE || is_gimple_val (tem))
                continue;
            }
so during the bit test we already know that exp is in the [lowi, high]
range, but skips it if we have range info which tells us this isn't
necessary.
Also, normally it emits shifts by exp - lowi counter, but has an
optimization to use just exp counter if the mask isn't a more expensive
constant in that case and lowi is > 0 and high is smaller than prec.

The following testcase is miscompiled because the two abnormal cases
are triggered.  The range of exp is [43, 43][48, 48][95, 95], so we on
64-bit arch decide we don't need the entry test, because 95 - 43 < 64.
And we also decide to use just exp as counter, because the range test
tests just for exp == 43 || exp == 48, so high is smaller than 64 too.
Because 95 is in the exp range, we can't do that, we'd either need to
do a range test first, i.e.
if (exp - 43U <= 48U - 43U) if ((1UL << exp) & mask1))
or need to subtract lowi from the shift counter, i.e.
if ((1UL << (exp - 43)) & mask2)
but can't do both unless r.upper_bound () is < prec.

The following patch ensures that.

2024-05-08  Jakub Jelinek  <jakub@redhat.com>

PR tree-optimization/114965
* tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Don't try to
optimize away exp - lowi subtraction from shift count unless entry
test is emitted or unless r.upper_bound () is smaller than prec.

* gcc.c-torture/execute/pr114965.c: New test.

5 weeks agoMinor tweaks to code computing modular multiplicative inverse
Eric Botcazou [Mon, 29 Apr 2024 15:46:20 +0000 (17:46 +0200)] 
Minor tweaks to code computing modular multiplicative inverse

This removes the last parameter of choose_multiplier, which is unused, adds
another assertion and more details to the description and various comments.
Likewise to the closely related invert_mod2n, except for the last parameter.

[changelog]
* expmed.h (choose_multiplier): Tweak description and remove last
parameter.
* expmed.cc (choose_multiplier): Likewise.  Add assertion for the
third parameter and adds details to various comments.
(invert_mod2n): Tweak description and add assertion for the first
parameter.
(expand_divmod): Adjust calls to choose_multiplier.
* tree-vect-generic.cc (expand_vector_divmod): Likewise.
* tree-vect-patterns.cc (vect_recog_divmod_pattern): Likewise.

5 weeks agox86: Fix cmov cost model issue [PR109549]
konglin1 [Wed, 8 May 2024 07:46:10 +0000 (15:46 +0800)] 
x86: Fix cmov cost model issue [PR109549]

(if_then_else:SI (eq (reg:CCZ 17 flags)
        (const_int 0 [0]))
    (reg/v:SI 101 [ e ])
    (reg:SI 102))
The cost is 8 for the rtx, the cost for
(eq (reg:CCZ 17 flags) (const_int 0 [0])) is 4,
but this is just an operator do not need to compute it's cost in cmov.

gcc/ChangeLog:

PR target/109549
* config/i386/i386.cc (ix86_rtx_costs): The XEXP (x, 0) for cmov
is an operator do not need to compute cost.

gcc/testsuite/ChangeLog:

* gcc.target/i386/cmov6.c: Fixed.

5 weeks agoEnable prange support.
Aldy Hernandez [Tue, 7 May 2024 12:05:50 +0000 (14:05 +0200)] 
Enable prange support.

This throws the switch on prange.  After this patch, it is no longer
valid to store a pointer in an irange (or vice versa).  Instead, they
must go in prange, which is faster and more memory efficient.

I will push this now, so I have time to do any follow-up bugfixing
before going on paternity leave.

There are various cleanups we plan on doing after this patch (faster
intersect/union, remove range-op-mixed.h, remove value_range in favor
of int_range_max, reclaim the name for the Value_Range temporary,
clean up range-ops, etc etc).  But we will hold off on those for now
to make it easier to revert this patch, if for some reason we need to
do so while I'm away.

Tested on x86-64 Linux.

gcc/ChangeLog:

* gimple-range-cache.cc (sbr_sparse_bitmap::sbr_sparse_bitmap):
Change irange to prange.
* gimple-range-fold.cc (fold_using_range::fold_stmt): Same.
(fold_using_range::range_of_address): Same.
* gimple-range-fold.h (range_of_address): Same.
* gimple-range-infer.cc (gimple_infer_range::add_nonzero): Same.
* gimple-range-op.cc (class cfn_strlen): Same.
* gimple-range-path.cc
(path_range_query::adjust_for_non_null_uses): Same.
* gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses): Same.
* tree-ssa-structalias.cc (find_what_p_points_to): Same.
* range-op-ptr.cc (range_op_table::initialize_pointer_ops): Remove
hybrid entries in table.
* range-op.cc (range_op_table::range_op_table): Add pointer
entries for bitwise and/or and min/max.
* value-range.cc (irange::verify_range): Add assert.
* value-range.h (irange::varying_compatible_p): Remove check for
error_mark_node.
(irange::supports_p): Remove pointer support.
* ipa-cp.h (ipa_supports_p): Add prange support.

5 weeks agoRevert "Revert "testsuite/gcc.target/cris/pr93372-2.c: Handle xpass from combine...
Hans-Peter Nilsson [Wed, 8 May 2024 02:11:20 +0000 (04:11 +0200)] 
Revert "Revert "testsuite/gcc.target/cris/pr93372-2.c: Handle xpass from combine improvement""

This reverts commit 39f81924d88e3cc197fc3df74204c9b5e01e12f7.

5 weeks agoc++/modules: Stream unmergeable temporaries by value again [PR114856]
Nathaniel Shead [Tue, 30 Apr 2024 12:29:57 +0000 (22:29 +1000)] 
c++/modules: Stream unmergeable temporaries by value again [PR114856]

In r14-9266-g2823b4d96d9ec4 I gave all temporary vars a DECL_CONTEXT,
including those at namespace or global scope, so that they could be
properly merged across importers.  However, not all of these temporary
vars are actually supposed to be mergeable.

For instance, in the attached testcase we have an unnamed temporary var
used in the NSDMI of a class member, which cannot properly merged -- but
it also doesn't need to be, as it'll be thrown away when the class type
itself is merged anyway.

This patch reverts the change made above and instead makes a weaker
adjustment that only causes temporary vars with linkage have a
DECL_CONTEXT to merge from.  This way these unnamed, "unmergeable"
temporaries are properly streamed by value again.

PR c++/114856

gcc/cp/ChangeLog:

* call.cc (make_temporary_var_for_ref_to_temp): Set context for
temporaries with linkage.
* init.cc (create_temporary_var): Revert to only set context
when in a function decl.

gcc/testsuite/ChangeLog:

* g++.dg/modules/pr114856.h: New test.
* g++.dg/modules/pr114856_a.H: New test.
* g++.dg/modules/pr114856_b.C: New test.

Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com>
Reviewed-by: Jason Merrill <jason@redhat.com>
Reviewed-by: Patrick Palka <ppalka@redhat.com>
5 weeks agoc++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types...
Andrew Pinski [Tue, 20 Feb 2024 21:38:28 +0000 (13:38 -0800)] 
c++/c-common: Fix convert_vector_to_array_for_subscript for qualified vector types [PR89224]

After r7-987-gf17a223de829cb, the access for the elements of a vector type would lose the qualifiers.
So if we had `constvector[0]`, the type of the element of the array would not have const on it.
This was due to a missing build_qualified_type for the inner type of the vector when building the array type.
We need to add back the call to build_qualified_type and now the access has the correct qualifiers. So the
overloads and even if it is a lvalue or rvalue is correctly done.

Note we correctly now reject the testcase gcc.dg/pr83415.c which was incorrectly accepted after r7-987-gf17a223de829cb.

Built and tested for aarch64-linux-gnu.

PR c++/89224

gcc/c-family/ChangeLog:

* c-common.cc (convert_vector_to_array_for_subscript): Call build_qualified_type
for the inner type.

gcc/cp/ChangeLog:

* constexpr.cc (cxx_eval_array_reference): Compare main variants
for the vector/array types instead of the types directly.

gcc/testsuite/ChangeLog:

* g++.dg/torture/vector-subaccess-1.C: New test.
* gcc.dg/pr83415.c: Change warning to error.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
5 weeks agoDCE __cxa_atexit calls where the function is pure/const [PR19661]
Andrew Pinski [Fri, 15 Mar 2024 23:34:22 +0000 (16:34 -0700)] 
DCE __cxa_atexit calls where the function is pure/const [PR19661]

In C++ sometimes you have a deconstructor function which is "empty", like for an
example with unions or with arrays.  The front-end might not know it is empty either
so this should be done on during optimization.o
To implement it I added it to DCE where we mark if a statement is necessary or not.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

Changes since v1:
  * v2: Add support for __aeabi_atexit for arm-*eabi. Add extra comments.
        Add cxa_atexit-5.C testcase for -fPIC case.
  * v3: Fix testcases for the __aeabi_atexit (forgot to do in the v2).

PR tree-optimization/19661

gcc/ChangeLog:

* tree-ssa-dce.cc (is_cxa_atexit): New function.
(is_removable_cxa_atexit_call): New function.
(mark_stmt_if_obviously_necessary): Don't mark removable
cxa_at_exit calls.
(mark_all_reaching_defs_necessary_1): Likewise.
(propagate_necessity): Likewise.

gcc/testsuite/ChangeLog:

* g++.dg/tree-ssa/cxa_atexit-1.C: New test.
* g++.dg/tree-ssa/cxa_atexit-2.C: New test.
* g++.dg/tree-ssa/cxa_atexit-3.C: New test.
* g++.dg/tree-ssa/cxa_atexit-4.C: New test.
* g++.dg/tree-ssa/cxa_atexit-5.C: New test.
* g++.dg/tree-ssa/cxa_atexit-6.C: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
5 weeks agoMATCH: Add some more value_replacement simplifications (a != 0 ? expr : 0) to match
Andrew Pinski [Tue, 30 Apr 2024 21:45:26 +0000 (14:45 -0700)] 
MATCH: Add some more value_replacement simplifications (a != 0 ? expr : 0) to match

This adds a few more of what is currently done in phiopt's value_replacement
to match. I noticed this when I was hooking up phiopt's value_replacement
code to use match and disabling the old code. But this can be done
independently from the hooking up phiopt's value_replacement as phiopt
is already hooked up for simplified versions already.

/* a != 0 ? a / b : 0  -> a / b iff b is nonzero. */
/* a != 0 ? a * b : 0 -> a * b */
/* a != 0 ? a & b : 0 -> a & b */

We prefer the `cond ? a : 0` forms to allow optimization of `a * cond` which
uses that form.

Bootstrapped and tested on x86_64-linux-gnu with no regressions.

PR tree-optimization/114894

gcc/ChangeLog:

* match.pd (`a != 0 ? a / b : 0`): New pattern.
(`a != 0 ? a * b : 0`): New pattern.
(`a != 0 ? a & b : 0`): New pattern.

gcc/testsuite/ChangeLog:

* gcc.dg/tree-ssa/phi-opt-value-5.c: New test.

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
5 weeks ago[committed][RISC-V] Turn on overlap_op_by_pieces for generic-ooo tuning
Jeff Law [Tue, 7 May 2024 21:34:16 +0000 (15:34 -0600)] 
[committed][RISC-V] Turn on overlap_op_by_pieces for generic-ooo tuning

Per quick email exchange with Palmer.  Given the triviality, I'm just pushing
it.

gcc/
* config/riscv/riscv.cc (generic_ooo_tune_info): Turn on
overlap_op_by_pieces.

5 weeks ago[committed] [RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_BY_PIECES_P
Christoph Müllner [Tue, 7 May 2024 21:16:21 +0000 (15:16 -0600)] 
[committed] [RISC-V] Allow uarchs to set TARGET_OVERLAP_OP_BY_PIECES_P

This is almost exclusively work from the VRULL team.

As we've discussed in the Tuesday meeting in the past, we'd like to have a knob
in the tuning structure to indicate that overlapped stores during
move_by_pieces expansion of memcpy & friends are acceptable.

This patch adds the that capability in our tuning structure.  It's off for all
the uarchs upstream, but we have been using it inside Ventana for our uarch
with success.  So technically it's NFC upstream, but puts in the infrastructure
multiple organizations likely need.

gcc/

* config/riscv/riscv.cc (struct riscv_tune_param): Add new
"overlap_op_by_pieces" field.
(rocket_tune_info, sifive_7_tune_info): Set it.
(sifive_p400_tune_info, sifive_p600_tune_info): Likewise.
(thead_c906_tune_info, xiangshan_nanhu_tune_info): Likewise.
(generic_ooo_tune_info, optimize_size_tune_info): Likewise.
(riscv_overlap_op_by_pieces): New function.
(TARGET_OVERLAP_OP_BY_PIECES_P): define.

gcc/testsuite/

* gcc.target/riscv/memcpy-nonoverlapping.c: New test.
* gcc.target/riscv/memset-nonoverlapping.c: New test.

5 weeks agoc++: Implement C++26 P2893R3 - Variadic friends [PR114459]
Jakub Jelinek [Tue, 7 May 2024 20:38:01 +0000 (22:38 +0200)] 
c++: Implement C++26 P2893R3 - Variadic friends [PR114459]

The following patch imeplements the C++26 P2893R3 - Variadic friends
paper.  The paper allows for the friend type declarations to specify
more than one friend type specifier and allows to specify ... at
the end of each.  The patch doesn't introduce tentative parsing of
friend-type-declaration non-terminal, but rather just extends existing
parsing where it is a friend declaration which ends with ; after the
declaration specifiers to the cases where it ends with ...; or , or ...,
In that case it pedwarns for cxx_dialect < cxx26, handles the ... and
if there is , continues in a loop to parse the further friend type
specifiers.

2024-05-07  Jakub Jelinek  <jakub@redhat.com>

PR c++/114459
gcc/c-family/
* c-cppbuiltin.cc (c_cpp_builtins): Predefine
__cpp_variadic_friend=202403L for C++26.
gcc/cp/
* parser.cc (cp_parser_member_declaration): Implement C++26
P2893R3 - Variadic friends.  Parse friend type declarations
with ... or with more than one friend type specifier.
* friend.cc (make_friend_class): Allow TYPE_PACK_EXPANSION.
* pt.cc (instantiate_class_template): Handle PACK_EXPANSION_P
in friend classes.
gcc/testsuite/
* g++.dg/cpp26/feat-cxx26.C (__cpp_variadic_friend): Add test.
* g++.dg/cpp26/variadic-friend1.C: New test.

5 weeks agoexpansion: Use __trunchfbf2 calls rather than __extendhfbf2 [PR114907]
Jakub Jelinek [Tue, 7 May 2024 19:30:21 +0000 (21:30 +0200)] 
expansion: Use __trunchfbf2 calls rather than __extendhfbf2 [PR114907]

The HF and BF modes have the same size/precision and neither is
a subset nor superset of the other.
So, using either __extendhfbf2 or __trunchfbf2 is weird.
The expansion apparently emits __extendhfbf2, but on the libgcc side
we apparently have __trunchfbf2 implemented.

I think it is easier to switch to using what is available rather than
adding new entrypoints to libgcc, even alias, because this is backportable.

2024-05-07  Jakub Jelinek  <jakub@redhat.com>

PR middle-end/114907
* expr.cc (convert_mode_scalar): Use trunc_optab rather than
sext_optab for HF->BF conversions.
* optabs-libfuncs.cc (gen_trunc_conv_libfunc): Likewise.

* gcc.dg/pr114907.c: New test.

5 weeks agotree-inline: Remove .ASAN_MARK calls when inlining functions into no_sanitize callers...
Jakub Jelinek [Tue, 7 May 2024 19:29:14 +0000 (21:29 +0200)] 
tree-inline: Remove .ASAN_MARK calls when inlining functions into no_sanitize callers [PR114956]

In r9-5742 we've started allowing to inline always_inline functions into
functions which have disabled e.g. address sanitization even when the
always_inline function is implicitly from command line options sanitized.

This mostly works fine because most of the asan instrumentation is done only
late after ipa, but as the following testcase the .ASAN_MARK ifn calls
gimplifier adds can result in ICEs.

Fixed by dropping those during inlining, similarly to how we drop
.TSAN_FUNC_EXIT calls.

2024-05-07  Jakub Jelinek  <jakub@redhat.com>

PR sanitizer/114956
* tree-inline.cc: Include asan.h.
(copy_bb): Remove also .ASAN_MARK calls if id->dst_fn has asan/hwasan
sanitization disabled.

* gcc.dg/asan/pr114956.c: New test.

5 weeks agoc++: DECL_DECOMPOSITION_P cleanup
Marek Polacek [Fri, 1 Mar 2024 18:36:51 +0000 (13:36 -0500)] 
c++: DECL_DECOMPOSITION_P cleanup

DECL_DECOMPOSITION_P already checks VAR_P but we repeat the check
in a lot of places.

gcc/cp/ChangeLog:

* decl.cc (duplicate_decls): Don't check VAR_P before
DECL_DECOMPOSITION_P.
* init.cc (build_aggr_init): Likewise.
* parser.cc (cp_parser_range_for): Likewise.
(do_range_for_auto_deduction): Likewise.
(cp_convert_range_for): Likewise.
(cp_convert_omp_range_for): Likewise.
(cp_finish_omp_range_for): Likewise.
* pt.cc (extract_locals_r): Likewise.
(tsubst_omp_for_iterator): Likewise.
(tsubst_decomp_names): Likewise.
(tsubst_stmt): Likewise.
* typeck.cc (maybe_warn_about_returning_address_of_local): Likewise.

5 weeks agoPR modula2/114133 bugfix constants must be cast prior to vararg call
Gaius Mulley [Tue, 7 May 2024 18:24:08 +0000 (19:24 +0100)] 
PR modula2/114133 bugfix constants must be cast prior to vararg call

This bug fix corrects the test codes below by converting the constant
literals to the type required by C.  In the testcases below the values, 1
etc were converted into the INTEGER type before being passed to a C
vararg function.  By default in modula2 constant literal ordinals are
represented as the ZTYPE (the largest GCC integer type node).

gcc/testsuite/ChangeLog:

PR modula2/114133
* gm2/extensions/run/pass/callingc10.mod: Convert constant
literal numbers into INTEGER.
* gm2/extensions/run/pass/callingc11.mod: Ditto.
* gm2/extensions/run/pass/vararg2.mod: Ditto.
* gm2/iso/run/pass/packed.mod: Emit a printf as a runtime
diagnostic.

Signed-off-by: Gaius Mulley <gaiusmod2@gmail.com>
5 weeks ago[RISC-V] [PATCH v2] Enable inlining str* by default
Jeff Law [Tue, 7 May 2024 17:43:09 +0000 (11:43 -0600)] 
[RISC-V] [PATCH v2] Enable inlining str* by default

So with Chrstoph's patches from late 2022 we've had the ability to inline
strlen, and str[n]cmp (scalar).  However, we never actually turned this
capability on by default!

This patch flips the those default to allow inlinining by default.  It also
fixes one bug exposed by our internal testing when NBYTES is zero for strncmp.
I don't think that case happens enough to try and optimize it, we just disable
inline expansion for that instance.

This has been bootstrapped and regression tested on rv64gc at various times as
well as cross tested on rv64gc more times than I can probably count (we've have
this patch internally for a while).  More importantly, I just successfully
tested it on rv64gc and rv32gcv elf configurations with the trunk

gcc/

* config/riscv/riscv-string.cc (riscv_expand_strcmp): Do not inline
strncmp with zero size.
(emit_strcmp_scalar_compare_subword): Adjust rotation for rv32 vs rv64.
* config/riscv/riscv.opt (var_inline_strcmp): Enable by default.
(vriscv_inline_strncmp, riscv_inline_strlen): Likewise.

gcc/testsuite

* gcc.target/riscv/zbb-strlen-disabled-2.c: Turn off inlining.

5 weeks agoAdd aarch64-w64-mingw32 target to libgcc
Zac Walker [Mon, 12 Feb 2024 14:22:47 +0000 (15:22 +0100)] 
Add aarch64-w64-mingw32 target to libgcc

Reuse MinGW definitions from i386 for libgcc. Move reused files to
libgcc/config/mingw folder.

libgcc/ChangeLog:

* config.host: Add aarch64-w64-mingw32 target. Adjust targets
after moving MinGW files.
* config/i386/t-gthr-win32: Move to...
* config/mingw/t-gthr-win32: ...here.
* config/i386/t-mingw-pthread: Move to...
* config/mingw/t-mingw-pthread: ...here.
* config/aarch64/t-no-eh: New file. EH is not yet implemented for
the target, and the default definition should be disabled.

5 weeks agoaarch64: Add aarch64-w64-mingw32 target to libatomic
Zac Walker [Fri, 1 Mar 2024 01:23:45 +0000 (02:23 +0100)] 
aarch64: Add aarch64-w64-mingw32 target to libatomic

libatomic/ChangeLog:

* configure.tgt: Add aarch64-w64-mingw32 target.

5 weeks agoaarch64: Build and add objects for Cygwin and MinGW for AArch64
Zac Walker [Tue, 20 Feb 2024 12:55:51 +0000 (13:55 +0100)] 
aarch64: Build and add objects for Cygwin and MinGW for AArch64

gcc/ChangeLog:

* config.gcc: Build and add objects for Cygwin and MinGW. Add Cygwin
and MinGW options to the target.

5 weeks agoRename "x86 Windows Options" to "Cygwin and MinGW Options"
Zac Walker [Thu, 11 Apr 2024 11:43:23 +0000 (13:43 +0200)] 
Rename "x86 Windows Options" to "Cygwin and MinGW Options"

Rename "x86 Windows Options" to "Cygwin and MinGW Options".
It will be used also for AArch64.

gcc/ChangeLog:

* config/i386/mingw-w64.opt.urls: Rename options' name and
regenerate option URLs.
* config/lynx.opt.urls: Likewise.
* config/mingw/cygming.opt.urls: Likewise.
* config/mingw/mingw.opt.urls: Likewise.
* doc/invoke.texi: Likewise.

5 weeks agoaarch64: Add SEH to machine_function
Zac Walker [Tue, 20 Feb 2024 17:10:08 +0000 (18:10 +0100)] 
aarch64: Add SEH to machine_function

SEH is not enabled in aarch64-w64-mingw32 target yet. However, it is
needed to be declared in machine_function for reusing winnt.cc.

gcc/ChangeLog:

* config/aarch64/aarch64.h (struct seh_frame_state): Declare SEH
structure in machine_function.
(GTY): Add SEH field.

5 weeks agoaarch64: Add Cygwin and MinGW environments for AArch64
Zac Walker [Thu, 11 Apr 2024 11:41:51 +0000 (13:41 +0200)] 
aarch64: Add Cygwin and MinGW environments for AArch64

Define Cygwin and MinGW environment such as types, SEH definitions,
shared libraries, etc.

gcc/ChangeLog:

* config.gcc: Add Cygwin and MinGW difinitions.
* config/aarch64/aarch64-protos.h
(mingw_pe_maybe_record_exported_symbol): Declare functions
which are used in Cygwin and MinGW environment.
(mingw_pe_section_type_flags): Likewise.
(mingw_pe_unique_section): Likewise.
(mingw_pe_encode_section_info): Likewise.
* config/aarch64/cygming.h: New file.

5 weeks agoExclude i386 functionality from aarch64 build
Zac Walker [Thu, 11 Apr 2024 11:38:59 +0000 (13:38 +0200)] 
Exclude i386 functionality from aarch64 build

This patch defines TARGET_AARCH64_MS_ABI in config.gcc and uses it to
exclude i386 functionality from aarch64 build and adjust MinGW headers
for AArch64 MS ABI.

gcc/ChangeLog:

* config.gcc: Define TARGET_AARCH64_MS_ABI.
* config/mingw/mingw-stdint.h (INTPTR_TYPE): Use
TARGET_AARCH64_MS_ABI to adjust MinGW headers for
AArch64 MS ABI.
(UINTPTR_TYPE): Likewise.
(defined): Likewise.
* config/mingw/mingw32.h (DEFAULT_ABI): Likewise.
(defined): Likewise.
* config/mingw/winnt.cc (defined): Use TARGET_ARM64_MS_ABI to
exclude ix86_get_callcvt.
(i386_pe_maybe_mangle_decl_assembler_name): Likewise.
(i386_pe_mangle_decl_assembler_name): Likewise.

5 weeks agoRename section and encoding functions from i386 which will be used in aarch64
Zac Walker [Tue, 20 Feb 2024 16:22:31 +0000 (17:22 +0100)] 
Rename section and encoding functions from i386 which will be used in aarch64

gcc/ChangeLog:

* config/i386/cygming.h (SUBTARGET_ENCODE_SECTION_INFO):
Rename functions in mingw folder which will be reused for
aarch64.
(TARGET_ASM_UNIQUE_SECTION): Likewise.
(TARGET_ASM_NAMED_SECTION): Likewise.
(TARGET_SECTION_TYPE_FLAGS): Likewise.
(ASM_DECLARE_COLD_FUNCTION_NAME): Likewise.
(ASM_OUTPUT_EXTERNAL_LIBCALL): Likewise.
* config/i386/i386-protos.h (i386_pe_unique_section):
Rename into ...
(mingw_pe_unique_section): ... this.
(i386_pe_declare_function_type): Rename into ...
(mingw_pe_declare_function_type): ... this.
(i386_pe_encode_section_info): Rename into ...
(mingw_pe_encode_section_info): ... this.
(i386_pe_maybe_record_exported_symbol): Rename into ...
(mingw_pe_maybe_record_exported_symbol): ... this.
(i386_pe_section_type_flags): Rename into ...
(mingw_pe_section_type_flags): ... this.
(i386_pe_asm_named_section): Rename into ...
(mingw_pe_asm_named_section): ... this.
* config/mingw/winnt.cc (i386_pe_encode_section_info):
Rename into ...
(mingw_pe_encode_section_info): ... this.
(i386_pe_unique_section): Rename into ...
(mingw_pe_unique_section): ... this.
(i386_pe_section_type_flags): Rename into ...
(mingw_pe_section_type_flags): ... this.
(i386_pe_asm_named_section): Rename into ...
(mingw_pe_asm_named_section): ... this.
(i386_pe_asm_output_aligned_decl_common): Likewise.
(i386_pe_declare_function_type): Rename into ...
(mingw_pe_declare_function_type): ... this.
(i386_pe_maybe_record_exported_symbol): Rename into ...
(mingw_pe_maybe_record_exported_symbol): ... this.
(i386_pe_start_function): Likewise.
* varasm.cc (switch_to_comdat_section): Likewise.

5 weeks agoReuse MinGW from i386 for AArch64
Zac Walker [Fri, 1 Mar 2024 01:41:50 +0000 (02:41 +0100)] 
Reuse MinGW from i386 for AArch64

This patch creates a new config/mingw directory to share MinGW
related definitions, and moves there the corresponding existing files
from config/i386.

gcc/ChangeLog:

* config.gcc: Adjust targets after moving MinGW related files
from i386 to mingw folder.
* config/i386/cygming.opt: Move to...
* config/mingw/cygming.opt: ...here.
* config/i386/cygming.opt.urls: Move to...
* config/mingw/cygming.opt.urls: ...here.
* config/i386/cygwin-d.cc: Move to...
* config/mingw/cygwin-d.cc: ...here.
* config/i386/mingw-stdint.h: Move to...
* config/mingw/mingw-stdint.h: ...here.
* config/i386/mingw.opt: Move to...
* config/mingw/mingw.opt: ...here.
* config/i386/mingw.opt.urls: Move to...
* config/mingw/mingw.opt.urls: ...here.
* config/i386/mingw32.h: Move to...
* config/mingw/mingw32.h: ...here.
* config/i386/msformat-c.cc: Move to...
* config/mingw/msformat-c.cc: ...here.
* config/i386/t-cygming: Move to...
* config/mingw/t-cygming: ...here and updated.
* config/i386/winnt-cxx.cc: Move to...
* config/mingw/winnt-cxx.cc: ...here.
* config/i386/winnt-d.cc: Move to...
* config/mingw/winnt-d.cc: ...here.
* config/i386/winnt-stubs.cc: Move to...
* config/mingw/winnt-stubs.cc: ...here.
* config/i386/winnt.cc: Move to...
* config/mingw/winnt.cc: ...here.

5 weeks agoaarch64: Add aarch64-w64-mingw32 COFF
Zac Walker [Thu, 11 Apr 2024 12:46:07 +0000 (14:46 +0200)] 
aarch64: Add aarch64-w64-mingw32 COFF

Define ASM specific for COFF format on AArch64.

gcc/ChangeLog:

* config.gcc: Add COFF format support definitions.
* config/aarch64/aarch64-coff.h: New file.

5 weeks agoaarch64: Mark x18 register as a fixed register for MS ABI
Zac Walker [Thu, 11 Apr 2024 11:30:27 +0000 (13:30 +0200)] 
aarch64: Mark x18 register as a fixed register for MS ABI

Define the MS ABI for aarch64-w64-mingw32.
Adjust FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
STATIC_CHAIN_REGNUM for AArch64 MS ABI.
The X18 register is reserved on Windows for the TEB.

gcc/ChangeLog:

* config.gcc: Define TARGET_AARCH64_MS_ABI when
AArch64 MS ABI is used.
* config/aarch64/aarch64.h (FIXED_X18): Adjust
FIXED_REGISTERS, CALL_REALLY_USED_REGISTERS and
STATIC_CHAIN_REGNUM for AArch64 MS ABI.
(CALL_USED_X18): Likewise.
(FIXED_REGISTERS): Likewise.
* config/aarch64/aarch64-abi-ms.h: New file.

5 weeks agoIntroduce aarch64-w64-mingw32 target
Zac Walker [Fri, 1 Mar 2024 00:40:53 +0000 (01:40 +0100)] 
Introduce aarch64-w64-mingw32 target

Add the initial aarch64-w64-mingw32 target for gcc.

This is the first commit in a sequence of patch series to add
new aarch64-w64-mingw32 target.

Coauthors: Zac Walker <zacwalker@microsoft.com>,
Mark Harmstone <mark@harmstone.com>  and
Ron Riddle <ron.riddle@microsoft.com>

Refactored, prepared, and validated by
Radek Barton <radek.barton@microsoft.com> and
Evgeny Karpov <evgeny.karpov@microsoft.com>

fixincludes/ChangeLog:

* mkfixinc.sh: Extend for *-mingw32* targets.

gcc/ChangeLog:

* config.gcc: Add aarch64-w64-mingw32 target.

5 weeks agoAVR: target/114835 - Tweak popcountqi2
Wolfgang Hospital [Tue, 7 May 2024 14:24:39 +0000 (16:24 +0200)] 
AVR: target/114835 - Tweak popcountqi2

libgcc/
PR target/114835
* config/avr/lib1funcs.S (__popcountqi2): Use code that
is one instruction shorter / faster.

5 weeks agolibstdc++: Fix handling of incomplete UTF-8 sequences in _Unicode_view
Jonathan Wakely [Wed, 1 May 2024 16:09:39 +0000 (17:09 +0100)] 
libstdc++: Fix handling of incomplete UTF-8 sequences in _Unicode_view

Eddie Nolan reported to me that _Unicode_view was not correctly
implementing the substitution of ill-formed subsequences with U+FFFD,
due to failing to increment the counter when the iterator reaches the
end of the sequence before a multibyte sequence is complete.  As a
result, the incomplete sequence was not completely consumed, and then
the remaining character was treated as another ill-formed sequence,
giving two U+FFFD characters instead of one.

To avoid similar mistakes in future, this change introduces a lambda
that increments the iterator and the counter together. This ensures the
counter is always incremented when the iterator is incremented, so that
we always know how many characters have been consumed.

libstdc++-v3/ChangeLog:

* include/bits/unicode.h (_Unicode_view::_M_read_utf8): Ensure
count of characters consumed is correct when the end of the
input is reached unexpectedly.
* testsuite/ext/unicode/view.cc: Test incomplete UTF-8
sequences.

5 weeks agolibstdc++: Fix <memory> for -std=c++23 -ffreestanding [PR114866]
Jonathan Wakely [Thu, 2 May 2024 11:14:52 +0000 (12:14 +0100)] 
libstdc++: Fix <memory> for -std=c++23 -ffreestanding [PR114866]

std::shared_ptr isn't declared for freestanding, so guard uses of it
with #if _GLIBCXX_HOSTED in <bits/out_ptr.h>.

libstdc++-v3/ChangeLog:

PR libstdc++/114866
* include/bits/out_ptr.h [!_GLIBCXX_HOSTED]: Don't refer to
shared_ptr, __shared_ptr or __is_shred_ptr.
* testsuite/20_util/headers/memory/114866.cc: New test.

5 weeks agolibstdc++: Simplify std::variant comparison operators
Jonathan Wakely [Thu, 28 Mar 2024 14:19:45 +0000 (14:19 +0000)] 
libstdc++: Simplify std::variant comparison operators

libstdc++-v3/ChangeLog:

* include/std/variant (_VARIANT_RELATION_FUNCTION_TEMPLATE):
Simplify.

5 weeks agoaarch64: Preserve mem info on change of base for ldp/stp [PR114674]
Alex Coplan [Wed, 10 Apr 2024 15:30:36 +0000 (16:30 +0100)] 
aarch64: Preserve mem info on change of base for ldp/stp [PR114674]

The ldp/stp fusion pass can change the base of an access so that the two
accesses end up using a common base register.  So far we have been using
adjust_address_nv to do this, but this means that we don't preserve
other properties of the mem we're replacing.  It seems better to use
replace_equiv_address_nv, as this will preserve e.g. the MEM_ALIGN of the
mem whose address we're changing.

The PR shows that by adjusting the other mem we lose alignment
information about the original access and therefore end up rejecting an
otherwise viable pair when --param=aarch64-stp-policy=aligned is passed.
This patch fixes that by using replace_equiv_address_nv instead.

Notably this is the same approach as taken by
aarch64_check_consecutive_mems when a change of base is required, so
this at least makes things more consistent between the ldp fusion pass
and the peepholes.

gcc/ChangeLog:

PR target/114674
* config/aarch64/aarch64-ldp-fusion.cc (ldp_bb_info::fuse_pair):
Use replace_equiv_address_nv on a change of base instead of
adjust_address_nv on the other access.

gcc/testsuite/ChangeLog:

PR target/114674
* gcc.target/aarch64/pr114674.c: New test.

5 weeks agoFix block index check in insert_updated_phi_nodes_for
Richard Biener [Thu, 4 Apr 2024 13:16:28 +0000 (15:16 +0200)] 
Fix block index check in insert_updated_phi_nodes_for

This replaces a >= 0 block index check with the appropriate NUM_FIXED_BLOCKs,
the check is from times ENTRY_BLOCK was negative.

* tree-into-ssa.cc (insert_updated_phi_nodes_for): Fix block
index check.

5 weeks agoAvoid re-allocating vector
Richard Biener [Wed, 17 Apr 2024 11:20:40 +0000 (13:20 +0200)] 
Avoid re-allocating vector

The following avoids re-allocating the var map BB vector by
pre-allocating it to the exact size needed when operating on the
whole function.

* tree-ssa-live.cc (init_var_map): Pre-allocate vec_bbs vector
to the correct size and use quick_push.

5 weeks agolibstdc++: Constrain equality ops for std::pair, std::tuple, std::variant
Jonathan Wakely [Wed, 27 Mar 2024 15:24:05 +0000 (15:24 +0000)] 
libstdc++: Constrain equality ops for std::pair, std::tuple, std::variant

Implement the changes from P2944R3 which add constraints to the
comparison operators of std::pair, std::tuple, and std::variant.

The paper also changes std::optional, but we already constrain its
comparisons using SFINAE on the return type. However, we need some
additional constraints on the [optional.comp.with.t] operators that
compare an optional with a value. The paper doesn't say to do that, but
I think it's needed because otherwise when the comparison for two
optional objects fails its constraints, the two overloads that are
supposed to be for comparing to a non-optional become the best overload
candidates, but are ambiguous (and we don't even get as far as checking
the constraints for satisfaction). I reported LWG 4072 for this.

The paper does not change std::expected, but probably should have done.
I'll submit an LWG issue about that and implement it separately.

Also add [[nodiscard]] to all these comparison operators.

libstdc++-v3/ChangeLog:

* include/bits/stl_pair.h (operator==): Add constraint.
* include/bits/version.def (constrained_equality): Define.
* include/bits/version.h: Regenerate.
* include/std/optional: Define feature test macro.
(__optional_rep_op_t): Use is_convertible_v instead of
is_convertible.
* include/std/tuple: Define feature test macro.
(operator==, __tuple_cmp, operator<=>): Reimplement C++20
comparisons using lambdas. Add constraints.
* include/std/utility: Define feature test macro.
* include/std/variant: Define feature test macro.
(_VARIANT_RELATION_FUNCTION_TEMPLATE): Add constraints.
(variant): Remove unnecessary friend declarations for comparison
operators.
* testsuite/20_util/optional/relops/constrained.cc: New test.
* testsuite/20_util/pair/comparison_operators/constrained.cc:
New test.
* testsuite/20_util/tuple/comparison_operators/constrained.cc:
New test.
* testsuite/20_util/variant/relops/constrained.cc: New test.
* testsuite/20_util/tuple/comparison_operators/overloaded.cc:
Disable for C++20 and later.
* testsuite/20_util/tuple/comparison_operators/overloaded2.cc:
Remove dg-error line for target c++20.

5 weeks agolibstdc++: Use https instead of http in some comments
Jonathan Wakely [Fri, 3 May 2024 17:14:09 +0000 (18:14 +0100)] 
libstdc++: Use https instead of http in some comments

libstdc++-v3/ChangeLog:

* include/backward/auto_ptr.h: Use https for URL in comment.
* include/bits/basic_ios.h: Likewise.
* include/std/iostream: Likewise.

5 weeks agolibstdc++: Update ABI test to disallow adding to released symbol versions
Jonathan Wakely [Thu, 11 Apr 2024 14:35:11 +0000 (15:35 +0100)] 
libstdc++: Update ABI test to disallow adding to released symbol versions

If we update the list of "active" symbols versions now, rather than when
adding a new symbol version, we will notice if new symbols get added to
the wrong version (as in PR 114692).

libstdc++-v3/ChangeLog:

* testsuite/util/testsuite_abi.cc: Update latest versions to
new versions that should be used in future.

5 weeks agomiddle-end/27800 - avoid unnecessary temporary during gimplification
Richard Biener [Tue, 20 Feb 2024 10:47:03 +0000 (11:47 +0100)] 
middle-end/27800 - avoid unnecessary temporary during gimplification

This avoids a tempoary when gimplifying reg = a ? b : c, re-using
the LHS of an assignment if that's a register.

PR middle-end/27800
* gimplify.cc (gimplify_modify_expr_rhs): For a COND_EXPR
avoid a temporary from gimplify_cond_expr when the LHS is
a register by pushing the assignment into the COND_EXPR arms.

* gcc.dg/pr27800.c: New testcase.

5 weeks agoRemove redundant check
Richard Biener [Mon, 8 Jan 2024 07:15:51 +0000 (08:15 +0100)] 
Remove redundant check

operand_equal_p already has checking code to verify the hash
is equal, avoid doing that again in gimplify_hasher::equal.

* gimplify.cc (gimplify_hasher::equal): Remove redundant
checking.

5 weeks agotree-optimization/110490 - bitcount for narrow modes
Stefan Schulze Frielinghaus [Tue, 7 May 2024 12:12:55 +0000 (14:12 +0200)] 
tree-optimization/110490 - bitcount for narrow modes

Bitcount operations popcount, clz, and ctz are emulated for narrow modes
in case an operation is only supported for wider modes.  Beside that ctz
may be emulated via clz in expand_ctz.  Reflect this in
expression_expensive_p.

I considered the emulation of ctz via clz as not expensive since this
basically reduces to ctz (x) = c - (clz (x & ~x)) where c is the mode
precision minus 1 which should be faster than a loop.

gcc/ChangeLog:

PR tree-optimization/110490
* tree-scalar-evolution.cc (expression_expensive_p): Also
consider mode widening for popcount, clz, and ctz.

5 weeks agoUse unsigned for stack var indexes during RTL expansion
Richard Biener [Thu, 4 Apr 2024 11:01:10 +0000 (13:01 +0200)] 
Use unsigned for stack var indexes during RTL expansion

We're currently using size_t but at the same time storing them into
bitmaps which only support unsigned int index.  The following makes
it unsigned int throughout, saving memory as well.

* cfgexpand.cc (stack_var::representative): Use 'unsigned'
for stack var indexes instead of 'size_t'.
(stack_var::next): Likewise.
(EOC): Likewise.
(stack_vars_alloc): Likewise.
(stack_vars_num): Likewise.
(decl_to_stack_part): Likewise.
(stack_vars_sorted): Likewise.
(add_stack_var): Likewise.
(add_stack_var_conflict): Likewise.
(stack_var_conflict_p): Likewise.
(visit_op): Likewise.
(visit_conflict): Likewise.
(add_scope_conflicts_1): Likewise.
(stack_var_cmp): Likewise.
(part_hashmap): Likewise.
(update_alias_info_with_stack_vars): Likewise.
(union_stack_vars): Likewise.
(partition_stack_vars): Likewise.
(dump_stack_var_partition): Likewise.
(expand_stack_vars): Likewise.
(account_stack_vars): Likewise.
(stack_protect_decl_phase_1): Likewise.
(stack_protect_decl_phase_2): Likewise.
(asan_decl_phase_3): Likewise.
(init_vars_expansion): Likewise.
(estimated_stack_frame_size): Likewise.

5 weeks agobuild: Derive object names in make_sunver.pl
Rainer Orth [Tue, 7 May 2024 11:14:05 +0000 (13:14 +0200)] 
build: Derive object names in make_sunver.pl

The recent move of libgfortran object files to subdirs and the resulting
breakage of libgfortran.so symbol exports demonstrated how fragile
deriving object and archive names from their libtool counterparts in the
Makefiles is.  Therefore, this patch moves that step into
make_sunver.pl, considerably simplifying the Makefile rules to create
the version scripts.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11, verifying that the version scripts are identical
except for the input filenames.

2024-05-06  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

contrib:
* make_sunver.pl: Use File::Basename;
Skip -lLIB args.
Convert libtool object/archive names to underlying
objects/archives.

libatomic:
* Makefile.am [LIBAT_BUILD_VERSIONED_SHLIB_SUN]
(libatomic.map-sun): Pass $(libatomic_la_OBJECTS),
$(libatomic_la_LIBADD) to make_sunver.pl unmodified.
* Makefile.in: Regenerate.

libffi:
* Makefile.am [LIBFFI_BUILD_VERSIONED_SHLIB_SUN] (libffi.map-sun):
Pass $(libffi_la_OBJECTS), $(libffi_la_LIBADD) to make_sunver.pl
unmodified.
* Makefile.in: Regenerate.

libgfortran:
* Makefile.am [LIBGFOR_USE_SYMVER_SUN} (gfortran.ver-sun): Pass
$(libgfortran_la_OBJECTS), $(libgfortran_la_LIBADD) to
make_sunver.pl unmodified.
* Makefile.in: Regenerate.

libgomp:
* Makefile.am [LIBGOMP_BUILD_VERSIONED_SHLIB_SUN]
(libgomp.ver-sun): Pass $(libgomp_la_OBJECTS),
$(libgomp_la_LIBADD) to make_sunver.pl unmodified.
* Makefile.in: Regenerate.

libitm:
* Makefile.am [LIBITM_BUILD_VERSIONED_SHLIB_SUN] (libitm.map-sun):
Pass $(libitm_la_OBJECTS), $(libitm_la_LIBADD) to make_sunver.pl
unmodified.
* Makefile.in: Regenerate.

libquadmath:
* Makefile.am [LIBQUAD_USE_SYMVER_SUN] (quadmath.map-sun): Pass
$(libquadmath_la_OBJECTS), $(libquadmath_la_LIBADD) to
make_sunver.pl unmodified.
* Makefile.in: Regenerate.

libssp:
* Makefile.am [LIBSSP_USE_SYMVER_SUN] (ssp.map-sun): Pass
$(libssp_la_OBJECTS), $(libssp_la_LIBADD) to make_sunver.pl
unmodified.
* Makefile.in: Regenerate.

libstdc++-v3:
* src/Makefile.am [ENABLE_SYMVERS_SUN]
(libstdc++-symbols.ver-sun): Pass $(libstdc___la_OBJECTS),
$(libstdc___la_LIBADD) to make_sunver.pl unmodified.
* src/Makefile.in: Regenerate.

5 weeks agomiddle-end/114931 - type_hash_canon and structual equality types
Richard Biener [Fri, 3 May 2024 08:44:50 +0000 (10:44 +0200)] 
middle-end/114931 - type_hash_canon and structual equality types

TYPE_STRUCTURAL_EQUALITY_P is part of our type system so we have
to make sure to include that into the type unification done via
type_hash_canon.  This requires the flag to be set before querying
the hash which is the biggest part of the patch.

PR middle-end/114931
gcc/
* tree.cc (type_hash_canon_hash): Hash TYPE_STRUCTURAL_EQUALITY_P.
(type_cache_hasher::equal): Compare TYPE_STRUCTURAL_EQUALITY_P.
(build_array_type_1): Set TYPE_STRUCTURAL_EQUALITY_P before
probing with type_hash_canon.
(build_function_type): Likewise.
(build_method_type_directly): Likewise.
(build_offset_type): Likewise.
(build_complex_type): Likewise.
* attribs.cc (build_type_attribute_qual_variant): Likewise.

gcc/c-family/
* c-common.cc (complete_array_type): Set TYPE_STRUCTURAL_EQUALITY_P
before probing with type_hash_canon.

gcc/testsuite/
* gcc.dg/pr114931.c: New testcase.

5 weeks agoMinor range type fixes for IPA in preparation for prange.
Aldy Hernandez [Tue, 19 Mar 2024 16:55:58 +0000 (17:55 +0100)] 
Minor range type fixes for IPA in preparation for prange.

The polymorphic Value_Range object takes a tree type at construction
so it can determine what type of range to use (currently irange or
frange).  It seems a few of the types are slightly off.  This isn't a
problem now, because IPA only cares about integers and pointers, which
can both live in an irange.  However, with prange coming about, we
need to get the type right, because you can't store an integer in a
pointer range or vice versa.

Also, in preparation for prange, the irange::supports_p() idiom will become:

      irange::supports_p () || prange::supports_p()

To avoid changing all these places, I've added an inline function we
can later change and change everything at once.

Finally, there's a Value_Range::supports_type_p() &&
irange::supports_p() in the code.  The latter is a subset of the
former, so there's no need to check both.

gcc/ChangeLog:

* ipa-cp.cc (ipa_vr_operation_and_type_effects): Use ipa_supports_p.
(ipa_value_range_from_jfunc): Change Value_Range type.
(propagate_vr_across_jump_function): Same.
* ipa-cp.h (ipa_supports_p): New.
* ipa-fnsummary.cc (evaluate_conditions_for_known_args): Change Value_Range type.
* ipa-prop.cc (ipa_compute_jump_functions_for_edge): Use ipa_supports_p.
(ipcp_get_parm_bits): Same.

5 weeks agoRemove obsolete Solaris 11.3 support
Rainer Orth [Tue, 7 May 2024 08:45:55 +0000 (10:45 +0200)] 
Remove obsolete Solaris 11.3 support

Support for Solaris 11.3 had already been obsoleted in GCC 13.  However,
since the only Solaris system in the cfarm was running 11.3, I've kept
it in tree until now when both Solaris 11.4/SPARC and x86 systems have
been added.

This patch actually removes the Solaris 11.3 support.  Apart from
several minor simplifications, there are two more widespread changes:

* In Solaris 11.4, libsocket and libnsl were folded into libc, so
  there's no longer a need to link them explictly.

* Since Solaris 11.4, Solaris includes all crts needed by gcc (like
  crt1.o and gcrt1.o) with the base system.  All workarounds to provide
  fallbacks can thus go.

Bootstrapped without regressions on i386-pc-solaris2.11 and
sparc-sun-solaris2.11 (as/ld, gas/ld, and gas/gld) as well as Solaris
11.3/x86 to ascertain that version is actually rejected.

2024-04-30  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

c++tools:
* configure.ac (ax_lib_socket_nsl.m4): Don't sinclude.
(AX_LIB_SOCKET_NSL): Don't call.
(NETLIBS): Remove.
* configure: Regenerate.
* Makefile.in (NETLIBS): Remove.
(g++-mapper-server$(exeext)): Remove $(NETLIBS).

gcc:
* config.gcc: Move *-*-solaris2.11.[0-3]* to unsupported list.
<*-*-solaris2*> (default_use_cxa_atexit): Set unconditionally.
* configure.ac (AX_LIB_SOCKET_NSL): Don't call.
(NETLIBS): Remove.
(gcc_cv_ld_aligned_shf_merge): Remove.
(hidden_linkonce) <i?86-*-solaris2* | x86_64-*-solaris2*>: Remove.
(gcc_cv_target_dl_iterate_phdr) <*-*-solaris2*>: Always set to yes.
* Makefile.in (NETLIBS): Remove.
* configure, config.in, aclocal.m4: Regenerate.
* config/sol2.h: Don't check HAVE_SOLARIS_CRTS.
(STARTFILE_SPEC): Remove !HAVE_SOLARIS_CRTS case.
[USE_GLD] (LINK_EH_SPEC): Remove TARGET_DL_ITERATE_PHDR guard.
* config/i386/i386.cc (USE_HIDDEN_LINKONCE): Remove guard.
* varasm.cc (mergeable_string_section): Remove
HAVE_LD_ALIGNED_SHF_MERGE handling.
(mergeable_constant_section): Likewise.

* doc/install.texi (Specific,i?86-*-solaris2*): Reference Solaris
11.4 only.
(Specific, *-*-solaris2*): Document Solaris 11.3 removal.  Remove
11.3 references and caveats.  Update for 11.4.

gcc/cp:
* Make-lang.in (cc1plus$(exeext)): Remove $(NETLIBS).

gcc/objcp:
* Make-lang.in (cc1objplus$(exeext)): Remove $(NETLIBS).

gcc/testsuite:
* lib/target-supports.exp (check_effective_target_pie): Always
enable on *-*-solaris2*.

libgcc:
* configure.ac <*-*-solaris2*> (libgcc_cv_solaris_crts): Remove.
* config.host <*-*-solaris2*>: Remove !libgcc_cv_solaris_crts
support.
* configure, config.in: Regenerate.
* config/sol2/gmon.c (internal_mcount) [!HAVE_SOLARIS_CRTS]: Remove.
* config/i386/sol2-c1.S, config/sparc/sol2-c1.S: Remove.
* config/sol2/t-sol2 (crt1.o, gcrt1.o): Remove.

libstdc++-v3:
* testsuite/lib/dg-options.exp (add_options_for_net_ts)
<*-*-solaris2*>: Don't link with -lsocket -lnsl.

5 weeks agoRevert "Revert "combine: Don't combine if I2 does not change""
Richard Biener [Tue, 7 May 2024 08:14:19 +0000 (10:14 +0200)] 
Revert "Revert "combine: Don't combine if I2 does not change""

This reverts commit 109f1b28fc94c93096506e3df0c25e331cef19d0.

5 weeks agoada: Fix calculation of tasks in null arrays
Piotr Trojanek [Wed, 10 Jan 2024 17:48:04 +0000 (18:48 +0100)] 
ada: Fix calculation of tasks in null arrays

Fix handling of null arrays when calculating the secondary stack size
for the binder.

gcc/ada/

* sem_util.adb (Number_Of_Elements_In_Array): Fix counting of
elements in null arrays; remove redundant parenthesis; avoid
run-time conversion of 1 to universal integer.

5 weeks agoada: Prevent calculation of negative stack counts
Piotr Trojanek [Wed, 10 Jan 2024 12:32:04 +0000 (13:32 +0100)] 
ada: Prevent calculation of negative stack counts

Negative numbers of stack counts have no meaning.

gcc/ada/

* lib.ads, lib.adb (Primary_Stack_Count, Sec_Stack_Count,
Increment_Primary_Stack_Count, Increment_Sec_Stack_Count,
Unit_Record): Stack counts are never negative.
* ali.ads (Unit_Record): Likewise.
* bindgen.adb (Num_Primary_Stacks, Num_Sec_Stacks): Likewise.
* exp_ch3.adb (Count_Default_Sized_Task_Stacks): Likewise.
* sem_util.ads, sem_util.adb (Number_Of_Elements_In_Array):
Likewise.