]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
2 months agortc: mc146818: Fix building on more architectures
Tom Rini [Mon, 4 Aug 2025 21:57:11 +0000 (15:57 -0600)] 
rtc: mc146818: Fix building on more architectures

This driver makes calls to in8/out8(). On PowerPC these are separate and
real calls but elsewhere they are able to simply be wrappers to
inb/outb. Rework this logic to be able to build this driver on more
platforms.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agortc: Tighten some rtc driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:10 +0000 (15:57 -0600)] 
rtc: Tighten some rtc driver dependencies

The Marvell RTC rtc driver cannot build without access to some
platform specific header files. Express that requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agosysreset: Tighten some sysreset driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:19 +0000 (15:57 -0600)] 
sysreset: Tighten some sysreset driver dependencies

The MPC83xx sysreset driver cannot build without access to some
architecture specific header files. Express that requirements in Kconfig
as well.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agosound: Tighten some sound driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:16 +0000 (15:57 -0600)] 
sound: Tighten some sound driver dependencies

A few sound drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agosoc: Tighten some soc driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:57:15 +0000 (15:57 -0600)] 
soc: Tighten some soc driver dependencies

The Qualcomm Snapdragon "SoC" driver cannot build without access to some
ARM64 specific functionality. Express that requirements in Kconfig as
well.

Reviewed-by: Casey Connolly <casey.connolly@linaro.org>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoremoteproc: Tighten some remoteproc driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:54:24 +0000 (15:54 -0600)] 
remoteproc: Tighten some remoteproc driver dependencies

The TI IPU remoteproc driver cannot build without access to some
platform specific header files. Express that requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoreset: Tighten some reset driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:54:25 +0000 (15:54 -0600)] 
reset: Tighten some reset driver dependencies

A few reset drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agopwm: pwm-aspeed: Add missing <linux/log2.h> to pwm-aspeed.c
Tom Rini [Mon, 4 Aug 2025 21:53:54 +0000 (15:53 -0600)] 
pwm: pwm-aspeed: Add missing <linux/log2.h> to pwm-aspeed.c

This driver references the logarithmic macros while relying on an
indirection inclusion of <linux/log2.h>. Add the missing include
directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agopwm: Tighten some pwm driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:53:53 +0000 (15:53 -0600)] 
pwm: Tighten some pwm driver dependencies

A few pwm drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agopinctrl: Tighten some pinctrl driver dependencies
Tom Rini [Mon, 4 Aug 2025 21:52:53 +0000 (15:52 -0600)] 
pinctrl: Tighten some pinctrl driver dependencies

A few pinctrl drivers cannot build without access to some platform
specific header files. Express those requirements in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agosm: Rework the Kconfig logic here
Tom Rini [Mon, 4 Aug 2025 21:51:11 +0000 (15:51 -0600)] 
sm: Rework the Kconfig logic here

The symbol "SM" is a library symbol and should not be prompted for. It
should be selected by the drivers that use it. In this case we need to
add a SANDBOX_SM symbol for the sandbox driver. The meson SM driver
cannot build on other platforms, so add the appropriate dependency.

Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agosandbox: Add an additional dummy sync macro
Tom Rini [Mon, 4 Aug 2025 21:50:08 +0000 (15:50 -0600)] 
sandbox: Add an additional dummy sync macro

There are some drivers which call a "dmb" for a type of sync. Add that
as well to sandbox.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agonet: e1000: Free temporary buffer on exit
Andrew Goodbody [Mon, 4 Aug 2025 15:32:51 +0000 (16:32 +0100)] 
net: e1000: Free temporary buffer on exit

In do_e1000_spi_checksum a temporary buffer is allocated but never
freed. Add code to free on exit. Also refactor the code to make the exit
code common.

This issue found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2 months agorockchip: add /chosen/bootsource to U-Boot proper DT
Quentin Schulz [Wed, 30 Jul 2025 12:03:18 +0000 (14:03 +0200)] 
rockchip: add /chosen/bootsource to U-Boot proper DT

U-Boot typically can be loaded from different storage media, such as
eMMC, SD card, SPI flash, but also from non-persistent media such as USB
(via proprietary protocols loading directly into SRAM, or fastboot, DFU,
 etc..), JTAG, ...

This information is usually reported by the BootROM via some proprietary
mechanism (some specific address in registers/DRAM for example). For
Rockchip, that information is stored in a register
(BROM_BOOTSOURCE_ID_ADDR).

While we already have the information about which medium was used to
load U-Boot proper from SPL (via /chosen/u-boot,spl-boot-device), this
new property represents the medium used to load U-Boot first phase
(depending on configuration, can be VPL/TPL/SPL) which absolutely may
differ from the one used to load U-Boot proper!

It would be useful to know which medium was used to load the first phase
of U-Boot, for example to check fallback mechanisms (proper loaded from
a different medium than first phase) are actually working.

For now, this only applies to Rockchip's U-Boot proper DT but could be
applied to the kernel's as well and possibly for other architectures or
vendors.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
2 months agopinctrl: sx150x: reformat and fixup Copyright header
Neil Armstrong [Wed, 30 Jul 2025 08:03:39 +0000 (10:03 +0200)] 
pinctrl: sx150x: reformat and fixup Copyright header

The Linux pinctrl-sx150 was originally written as a GPIO driver
and fully rewritten by me as a Pinctrl driver and extended by
other contributors.

Fixup the Copyright header style and correctly report the
Copyright headers from the Linux driver.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
2 months agopinctrl: gpio: sx150x: fix compilation warnings.
Chali Anis [Wed, 30 Jul 2025 02:19:08 +0000 (22:19 -0400)] 
pinctrl: gpio: sx150x: fix compilation warnings.

Fixes: 5451504256d3 ("pinctrl: gpio: sx150x: add Semtech SX150x I2C GPIO expander and pinctrl driver")
Signed-off-by: Chali Anis <chalianis1@gmail.com>
2 months agoarm: dts: mediatek: remove useless SPI property must_tx
Shiji Yang [Sun, 27 Jul 2025 05:35:13 +0000 (13:35 +0800)] 
arm: dts: mediatek: remove useless SPI property must_tx

This property is not documented. And the "mediatek,ipm-spi" SPI
driver doesn't check it.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2 months agogpio: dwapb_gpio: Using wrong function to free memory
Andrew Goodbody [Fri, 25 Jul 2025 11:48:22 +0000 (12:48 +0100)] 
gpio: dwapb_gpio: Using wrong function to free memory

In gpio_dwapb_bind plat is used to reference memory allocated by
devm_kcalloc but it is attempted to be freed using kfree. Instead free
this memory using the correct devm_kfree function.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
2 months agoclk: cdce9xx: Fix use of dev_read_u32_default
Andrew Goodbody [Fri, 25 Jul 2025 10:41:12 +0000 (11:41 +0100)] 
clk: cdce9xx: Fix use of dev_read_u32_default

The function dev_read_u32_default does not return an error and the
variable 'val' is unsigned so testing for >= 0 will always be true. It
looks like the code was attempting to return -1 if xtal-load-pf was not
present but that cannot work. Instead use dev_read_u32 which returns an
error code separately from writing the value into the passed pointer.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Fixes: 260777fc2333 ("clk: cdce9xx: add support for cdce9xx clock synthesizer")
Acked-by: Quentin Schulz <quentin.schulz@cherry.de>
2 months agosandbox: Add more dummy functions to mimic other architectures
Tom Rini [Fri, 18 Jul 2025 01:15:52 +0000 (19:15 -0600)] 
sandbox: Add more dummy functions to mimic other architectures

This adds more common functions found on other architectures that will
allow for more compile-testing of drivers. These are either dummy
functions as we do not need them or mappings to existing functions,
similar to how other architectures handle it.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoarm: bcm235xx: Remove this SoC
Tom Rini [Fri, 18 Jul 2025 01:15:48 +0000 (19:15 -0600)] 
arm: bcm235xx: Remove this SoC

As there are no platforms for this SoC, remove the code.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agonvme: Tighten requirements on NVME_APPLE driver
Tom Rini [Fri, 18 Jul 2025 01:15:30 +0000 (19:15 -0600)] 
nvme: Tighten requirements on NVME_APPLE driver

This driver requires Apple rtkit headers in order to build.  Express
that requirement in Kconfig as well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agopci: Tighten some PCI controller dependencies
Tom Rini [Fri, 18 Jul 2025 01:15:26 +0000 (19:15 -0600)] 
pci: Tighten some PCI controller dependencies

A large number of PCI controllers cannot build without access to some
platform specific header files. Express those requirements in Kconfig as
well.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agopci: Add missing <linux/sizes.h> to pcie_iproc.c
Tom Rini [Fri, 18 Jul 2025 01:15:21 +0000 (19:15 -0600)] 
pci: Add missing <linux/sizes.h> to pcie_iproc.c

This driver references the SZ_ macros while relying on an indirection
inclusion of <linux/sizes.h>. Add the missing include directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoMerge patch series "arch: arm: dts: k3-am625-phyboard-lyra: Disable unused watchdogs...
Tom Rini [Mon, 11 Aug 2025 20:54:10 +0000 (14:54 -0600)] 
Merge patch series "arch: arm: dts: k3-am625-phyboard-lyra: Disable unused watchdogs in U-Boot"

This series from Wadim Egorov <w.egorov@phytec.de> cleans up how
watchdogs are handled on some phytec TI K3 platforms.

Link: https://lore.kernel.org/r/20250730154217.1116751-1-w.egorov@phytec.de
2 months agoinclude: env: phytec: k3: Add deprecation warning to legacy boot flow
Wadim Egorov [Wed, 30 Jul 2025 15:42:17 +0000 (17:42 +0200)] 
include: env: phytec: k3: Add deprecation warning to legacy boot flow

We switched towards standard boot with still keeping a fallback
using legacy boot command alive. Add a deprecation warning to
make it more clear that we will remove it in future versions.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoboard: phytec: phycore-am62ax: Add watchdog start to bootcmd
Wadim Egorov [Wed, 30 Jul 2025 15:42:16 +0000 (17:42 +0200)] 
board: phytec: phycore-am62ax: Add watchdog start to bootcmd

Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoboard: phytec: phycore-am64x: Add watchdog start to bootcmd
Wadim Egorov [Wed, 30 Jul 2025 15:42:15 +0000 (17:42 +0200)] 
board: phytec: phycore-am64x: Add watchdog start to bootcmd

Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoboard: phytec: phycore-am62x: Add watchdog start to bootcmd
Wadim Egorov [Wed, 30 Jul 2025 15:42:14 +0000 (17:42 +0200)] 
board: phytec: phycore-am62x: Add watchdog start to bootcmd

Allows run-time control over watchdog auto-start and the timeout via
setting the environment variable watchdog_timeout_ms. A value of zero
means "do not start". Use CONFIG_WATCHDOG_TIMEOUT_MSECS as initial value.
Users can enable the watchdog to monitor the boot process until userspace
or OS takes over to serve the watchdog.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoarch: arm: dts: k3-am642-phyboard-electra: Disable unused watchdogs in U-Boot
Wadim Egorov [Wed, 30 Jul 2025 15:42:13 +0000 (17:42 +0200)] 
arch: arm: dts: k3-am642-phyboard-electra: Disable unused watchdogs in U-Boot

The watchdog driver probes all available watchdog devices.
This causes SMP boot errors when bringing up secondary CPUs.
In our setup, only a single watchdog is needed to monitor the
boot process until userspace or the OS takes over. Disable all
unnecessary watchdog devices in U-Boot to avoid conflicts
during CPU bring-up.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoarch: arm: dts: k3-am62a7-phyboard-lyra: Disable unused watchdogs in U-Boot
Wadim Egorov [Wed, 30 Jul 2025 15:42:12 +0000 (17:42 +0200)] 
arch: arm: dts: k3-am62a7-phyboard-lyra: Disable unused watchdogs in U-Boot

The watchdog driver probes all available watchdog devices.
This causes SMP boot errors when bringing up secondary CPUs.
In our setup, only a single watchdog is needed to monitor the
boot process until userspace or the OS takes over. Disable all
unnecessary watchdog devices in U-Boot to avoid conflicts
during CPU bring-up.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoarch: arm: dts: k3-am625-phyboard-lyra: Disable unused watchdogs in U-Boot
Wadim Egorov [Wed, 30 Jul 2025 15:42:11 +0000 (17:42 +0200)] 
arch: arm: dts: k3-am625-phyboard-lyra: Disable unused watchdogs in U-Boot

The watchdog driver probes all available watchdog devices.
This causes SMP boot errors when bringing up secondary CPUs.
In our setup, only a single watchdog is needed to monitor the
boot process until userspace or the OS takes over. Disable all
unnecessary watchdog devices in U-Boot to avoid conflicts
during CPU bring-up.

Signed-off-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoPrepare v2025.10-rc2 v2025.10-rc2
Tom Rini [Mon, 11 Aug 2025 19:47:46 +0000 (13:47 -0600)] 
Prepare v2025.10-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoconfigs: Resync with savedefconfig
Tom Rini [Mon, 11 Aug 2025 18:05:31 +0000 (12:05 -0600)] 
configs: Resync with savedefconfig

Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoarm: socfpga: Correct how we set BOOTFILE
Tom Rini [Mon, 11 Aug 2025 17:58:25 +0000 (11:58 -0600)] 
arm: socfpga: Correct how we set BOOTFILE

In order to set the BOOTFILE symbol we first need to have USE_BOOTFILE
be set, or some of the logic might not work as expected later on when
building. Second, defaults like this belong with the symbol itself.

Fixes: da595d236b97 ("include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile")
Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agoMerge tag 'u-boot-socfpga-next-20250808' of https://source.denx.de/u-boot/custodians...
Tom Rini [Fri, 8 Aug 2025 17:13:41 +0000 (11:13 -0600)] 
Merge tag 'u-boot-socfpga-next-20250808' of https://source.denx.de/u-boot/custodians/u-boot-socfpga

This pull request introduces initial U-Boot support for Agilex7 M-series, along
with several enhancements and cleanups across existing Agilex platforms. Key
changes include new board support, DDR driver additions, updated device trees,
and broader SoCFPGA SPL improvements.

Highlights:

- Agilex7 M-series bring-up:
  - Basic DT support and board initialization for Agilex7 M-series SoC and
    SoCDK.
  - New sdram_agilex7m DDR driver with UIBSSM mailbox support and HBM support.
  - Clock driver support for Agilex7 M-series.
  - New defconfig: socfpga_agilex7m_defconfig.
- Agilex and Agilex5 enhancements:
  - Improved SPL support: ASYNC interrupt enabling, system manager init
    refactor, and cold scratch register usage.
  - Updated firewall probing and watchdog support in SPL.
  - Cleaned up DDR code, added secure region support for ATF, and improved warm
    reset handling.
- Device Tree and config updates:
  - Migration to upstream Linux DT layout for Agilex platforms.
  - Consolidated socfpga_agilex_defconfig and removed deprecated configs.
  - Platform-specific environment variables for Distro Boot added.
- Driver fixes and cleanups:
  - dwc_eth_xgmac and clk-agilex cleanup and improvements.
  - Several coverity and style fixes.

Contributions in this PR are from Alif Zakuan Yuslaimi, Tingting Meng, and
Andrew Goodbody.  This patch set has been tested on Agilex 5 devkit, Agilex
devkit and Agilex7m devkit.

Passing all pipeline tests at SoCFPGA U-boot custodian
https://source.denx.de/u-boot/custodians/u-boot-socfpga/-/pipelines/27318

2 months agoMerge tag 'efi-2025-10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 8 Aug 2025 17:09:42 +0000 (11:09 -0600)] 
Merge tag 'efi-2025-10-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2025-10-rc2

Documentation:

* Describe running U-Boot as a pflash image on RISC-V QEMU
* Correct the description of the bootph-verify device-tree property

UEFI:

* In mkeficapsule fix a resource leak in read_bin_file()
* Support loading a Linux initial RAM disk with the bootefi command.

2 months agoMAINTAINERS: update email address of Heiko Schocher
Heiko Schocher [Fri, 8 Aug 2025 11:40:14 +0000 (13:40 +0200)] 
MAINTAINERS: update email address of Heiko Schocher

use the new email address for community work.

While at it, cleanup git shortlog output, by adding
fixes in .mailmap

Signed-off-by: Heiko Schocher <hs@nabladev.com>
2 months agoMerge tag 'u-boot-imx-master-20250808' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Fri, 8 Aug 2025 14:33:19 +0000 (08:33 -0600)] 
Merge tag 'u-boot-imx-master-20250808' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/27314

- Several Smatch reported fixes.
- Enable the temperature command on imx8ulp-evk.
- Fix mx8mm_fracpll_tbl.
- Make optee packaging optional for imx8m.
- Reuse and export low_drive_freq_update() on imx9.
- Enable USB OTG ID pin pull up in SPL on dh-imx6.

2 months agoconfigs: Add defconfig for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:25:01 +0000 (18:25 -0700)] 
configs: Add defconfig for Agilex7 M-series

Add defconfig for Agilex7 M-series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: dts: Update Makefile for new platform Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:25:00 +0000 (18:25 -0700)] 
arch: arm: dts: Update Makefile for new platform Agilex7 M-series

Update Makefile to support Agilex7 M-series platform enablement.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: mach-socfpga: Update kconfig for new platform Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:59 +0000 (18:24 -0700)] 
arch: arm: mach-socfpga: Update kconfig for new platform Agilex7 M-series

Update Kconfig for new platform Agilex7 M-series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: soc64: Fix dram size calculation in clamshell mode
Tingting Meng [Mon, 4 Aug 2025 01:24:58 +0000 (18:24 -0700)] 
ddr: altera: soc64: Fix dram size calculation in clamshell mode

Fix wrong memory size calculation in clamshell mode

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: soc64: Clean up bit-shift by zero bit
Tingting Meng [Mon, 4 Aug 2025 01:24:57 +0000 (18:24 -0700)] 
ddr: altera: soc64: Clean up bit-shift by zero bit

Clean up bit-shift by zero bit

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: Add DDR driver for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:56 +0000 (18:24 -0700)] 
ddr: altera: Add DDR driver for Agilex7 M-series

This is for new platform enablement for Agilex7 M-series.
Add DDR driver for Agilex7 M-series. This driver is designed to support
DDR and HBM memory. The official HBM handoff is not ready yet, therefore
hardcoded handoff is used for HBM driver validation on mUDV board.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: Add uibssm mailbox support for Agilex7 M-series with HBM
Tingting Meng [Mon, 4 Aug 2025 01:24:55 +0000 (18:24 -0700)] 
ddr: altera: Add uibssm mailbox support for Agilex7 M-series with HBM

Add uibssm mailbox driver for Agilex7 M-series. HPS will interact with UIB
and HBM subsystem through software defined mailbox interface.
HPS can retrieve HBM memory interface calibration status, UIB
configuration, memory interfae configuration, trigger calibration and etc
with the list of supported mailbox command type and opcode.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoclk: altera: Add clock support for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:54 +0000 (18:24 -0700)] 
clk: altera: Add clock support for Agilex7 M-series

Agilex7 M-series reuse the clock driver from Agilex.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoinclude: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile
Tingting Meng [Mon, 4 Aug 2025 01:24:53 +0000 (18:24 -0700)] 
include: configs: soc64: Use CONFIG_SPL_ATF to differentiate bootfile

ATF boot flow (SPL->ATF->U-Boot Proper->OS) boot to OS via kernel.itb file
using bootm command.

Change to use CONFIG_SPL_ATF to differentiate the bootfile of default
environment variable. We shouldn't use CONFIG_FIT because it is enabled
by default for U-Boot Proper.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoinclude: configs: Add config header file for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:52 +0000 (18:24 -0700)] 
include: configs: Add config header file for Agilex7 M-series

Add config header file for new platform Agilex7 M-series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:51 +0000 (18:24 -0700)] 
arch: arm: mach-socfpga: Update handoff settings for Agilex7 M-series

Handoff settings updated for new platform Agilex7 M-series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: mach-socfpga: Improve help info.
Tingting Meng [Mon, 4 Aug 2025 01:24:50 +0000 (18:24 -0700)] 
arch: arm: mach-socfpga: Improve help info.

To improve help info for bridge enable/disable command.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: mach-socfpga: Add Agilex7 M-series mach-socfgpa enablement
Tingting Meng [Mon, 4 Aug 2025 01:24:49 +0000 (18:24 -0700)] 
arch: arm: mach-socfpga: Add Agilex7 M-series mach-socfgpa enablement

Add platform related files for new platform Agilex7 M-series.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: dts: Basic device tree support added for Agilex7 M-series
Tingting Meng [Mon, 4 Aug 2025 01:24:48 +0000 (18:24 -0700)] 
arch: arm: dts: Basic device tree support added for Agilex7 M-series

Agilex7 M-series support has been added using upstream Linux DTS.

socfpga_agilex_socdk-u-boot.dtsi was updated to support both Agilex and
Agilex7 M-series platforms.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: dts: agilex: Switch to using upstream Linux DT config
Tingting Meng [Mon, 4 Aug 2025 01:24:47 +0000 (18:24 -0700)] 
arch: arm: dts: agilex: Switch to using upstream Linux DT config

Migrate the legacy Agilex platform to use the upstream Linux device tree
configuration. This helps reduce maintenance overhead and aligns U-Boot
with the Linux kernel's DTS hierarchy and naming conventions.

This change improves consistency between U-Boot and Linux by removing
custom/legacy DTS handling and instead relying on the standardized
definitions provided by the upstream Linux DTS.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: agilex: Clean up DT settings in U-Boot dtsi files
Tingting Meng [Mon, 4 Aug 2025 01:24:46 +0000 (18:24 -0700)] 
arch: arm: agilex: Clean up DT settings in U-Boot dtsi files

Reorganize misplaced properties by moving board-common settings from
socfpga_agilex_socdk-u-boot.dtsi to socfpga_agilex-u-boot.dtsi to maintain
proper separation between common and board-level configurations.

Signed-off-by: Tingting Meng <tingting.meng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: soc64: Perform warm reset after L2 reset in SPL
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:45 +0000 (18:24 -0700)] 
arm: socfpga: soc64: Perform warm reset after L2 reset in SPL

SPL checks for a magic word in the system manager's scratch
register to determine if an L2 reset has occurred. If detected,
SPL places all slave CPUs (CPU1–3) into WFI mode. The master
CPU (CPU0) then initiates a warm reset by writing to the RMR_EL3
system register and also enters WFI mode.

This warm reset flow is handled entirely within the HPS. The
function `socfpga_sysreset_request()` triggers the warm
reset, and upon SPL re-entry, the updated `lowlevel_init_soc64.S`
handles the necessary initialization.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agosysreset: socfpga: soc64: Enable L2 reset
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:44 +0000 (18:24 -0700)] 
sysreset: socfpga: soc64: Enable L2 reset

Put all slave CPUs (CPU1-3) into WFI mode. Master CPU (CPU0) writes
the magic word into system manager's scratch register to indicate
the system has performed L2 reset and request reset manager to
perform hardware handshake and then trigger L2 reset. CPU0 put
itself into WFI mode. L2 reset will reboot all HPS CPU cores after
which all HPS cores are in WFI mode. L2 reset is followed by warm
reset request by SPL via RMR_EL3 system register.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: misc: Exclude Agilex from clock manager base address retrieval
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:43 +0000 (18:24 -0700)] 
arm: socfpga: misc: Exclude Agilex from clock manager base address retrieval

Agilex retrieves its clock manager address via probing its own clock
driver model during the SPL initialization.

Therefore, excluding Agilex from calling its clock driver in misc
driver to retrieve the clock manager address.

Once all SoC64 devices has been successfully transition to clock
driver model method, this implementation will be cleaned up.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoinclude: configs: socfpga: Add environment variables for distro boot
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:42 +0000 (18:24 -0700)] 
include: configs: socfpga: Add environment variables for distro boot

Added environment variables needed to support NAND distro boot

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: agilex: Get ACF from boot scratch register
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:41 +0000 (18:24 -0700)] 
ddr: altera: agilex: Get ACF from boot scratch register

The DDR data rate must be set correctly in the DDRIOCTRL
register according to the Actual Clock Frequency (ACF) value.

By enabling the reading of ACF value from bit 18 of the boot
scratch register during initialization, the DDR data rate is
able to be configured accurately.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: Define the usage of boot scratch cold reg 8
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:40 +0000 (18:24 -0700)] 
arm: socfpga: Define the usage of boot scratch cold reg 8

The boot scratch cold reg 8 is shared between DBE, DDR init progress
update and Linux EDAC. This patch defines how the bits are used by
respective features above and their macro names used in U-Boot.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: agilex: Remove code redundancy
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:39 +0000 (18:24 -0700)] 
ddr: altera: agilex: Remove code redundancy

Remove redundant code for MPFE CSR firewall disabled as this was
already set in DTreg dts.

Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoddr: altera: soc64: Add secure region support for ATF flow
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:38 +0000 (18:24 -0700)] 
ddr: altera: soc64: Add secure region support for ATF flow

Setting up firewall regions based on SDRAM memory banks configuration
(up to CONFIG_NR_DRAM_BANKS banks) instead of using whole address space.

First 1 MiB (0 to 0xfffff) of SDRAM is configured as secure region,
other address spaces are non-secure regions. The ARM Trusted Firmware (ATF)
image is located in this first 1 MiB memory region. So, this can prevent
software executing at non-secure state EL0-EL2 and non-secure masters
access to secure region.

Add common function for firewall setup and reuse for all SoC64 devices.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: agilex: Enable system manager driver for Agilex
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:37 +0000 (18:24 -0700)] 
arm: socfpga: agilex: Enable system manager driver for Agilex

The base address of system manager can be retrieved
using DT framework through the system manager driver.

Enable system manager support for Agilex by probing the
system manager driver to initialize during SPL boot up.

Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: agilex5: Refactor system manager driver initialization
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:36 +0000 (18:24 -0700)] 
arm: socfpga: agilex5: Refactor system manager driver initialization

Refactor system manager initialization by searching for system manager
alias in Agilex5 device tree instead of manually passing node name to
the device model calling function

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agodrivers: clk: agilex: Replace status polling with wait_for_bit_le32()
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:35 +0000 (18:24 -0700)] 
drivers: clk: agilex: Replace status polling with wait_for_bit_le32()

Replace cm_wait_for_fsm() function with wait_for_bit_le32() function
which supports accurate timeout.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agodrivers: watchdog: Enable watchdog support in SPL for Agilex
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:34 +0000 (18:24 -0700)] 
drivers: watchdog: Enable watchdog support in SPL for Agilex

Enable watchdog as early as possible after clock initialization
which is set at 10 seconds.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarm: socfpga: Enable ASYNC interrupts in Agilex SPL
Tien Fong Chee [Fri, 8 Aug 2025 14:20:42 +0000 (22:20 +0800)] 
arm: socfpga: Enable ASYNC interrupts in Agilex SPL

Asynchronous aborts were previously masked at SPL
entry.

To ensure early detection of system errors
such as ECC faults or bus errors, asynchronous aborts
should be explicitly unmasked by clearing the A-bit in
the DAIF register during Agilex SPL initialization.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
# Conflicts:
# arch/arm/mach-socfpga/spl_agilex.c

2 months agoarm: socfpga: Update Agilex SPL data save and restore implementation
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:32 +0000 (18:24 -0700)] 
arm: socfpga: Update Agilex SPL data save and restore implementation

Enable backup for data section to support warm reset in Agilex SPL as
no SPL image would be reloaded in warm reset.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoboard: phytec: phycore-imx93: Add VOLT_LOW_DRIVE frequency fixup
Primoz Fiser [Thu, 7 Aug 2025 13:13:54 +0000 (15:13 +0200)] 
board: phytec: phycore-imx93: Add VOLT_LOW_DRIVE frequency fixup

For phyCORE-i.MX93 SoMs with i.MX93 parts running in VOLT_LOW_DRIVE mode
(SoCs with speed grade fuse set to 900 MHz) reduce usdhc clocks from 400
MHz to 266 MHz. Do this in board code since global imx9 board_fix_fdt()
is not used in case of phycore-imx93 board since commit d3b9b7996889
("board: phytec: imx93: Add eeprom-based hardware introspection").

While at it, add a note to ft_board_setup() function to inform that
fixup for Linux device-tree is taken care by ft_system_setup() in imx9
global arch/arm/mach-imx/imx9/soc.c implementation.

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2 months agoimx9: soc: Reuse and export low_drive_freq_update()
Primoz Fiser [Thu, 7 Aug 2025 13:13:53 +0000 (15:13 +0200)] 
imx9: soc: Reuse and export low_drive_freq_update()

Reuse and export low_drive_freq_update() function. This way global imx9
board_fix_fdt() doesn't duplicate code. While low_drive_freq_update()
can be reused on boards such as phyCORE-i.MX93 (TARGET_PHYCORE_IMX93)
which is not using the global imx9 board_fix_fdt() implementation.

While at it, make printout logic less verbose by only outputting on the
error condition and not on each successful clock fixup. Also drop now
invalid comment (low_drive_freq_update() now does fixup for internal and
kernel device-tree).

Signed-off-by: Primoz Fiser <primoz.fiser@norik.com>
2 months agoarm: socfpga: agilex: Probe DT for firewall setup
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:31 +0000 (18:24 -0700)] 
arm: socfpga: agilex: Probe DT for firewall setup

Update Agilex SPL code to implement device tree model
for firewall registers setup by using DTreg driver to
probe from device tree for the firewall settings instead
of calling firewall driver function.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoarch: arm: dts: agilex: Update Agilex device tree
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:30 +0000 (18:24 -0700)] 
arch: arm: dts: agilex: Update Agilex device tree

Update exisitng Agilex device tree to support multiple flashes boot
- MMC, QSPI and NAND.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agoconfigs: agilex: Combine defconfig for all boot flashes
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:29 +0000 (18:24 -0700)] 
configs: agilex: Combine defconfig for all boot flashes

Combine all MMC, NAND and QSPI configs into single defconfig which is named
as "socfpga_agilex_defconfig". This will be the default defconfig to use.
It supports booting from all three flashes using ARM Trusted Firmware (ATF)
as the secure runtime monitor.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agodrivers: clk: agilex: Use real clock source frequency
Alif Zakuan Yuslaimi [Mon, 4 Aug 2025 01:24:28 +0000 (18:24 -0700)] 
drivers: clk: agilex: Use real clock source frequency

Update the ARMv8 generic timer frequency register (cntfrq_el0)
with the actual hardware timer frequency (COUNTER_FREQUENCY_REAL).

The generic timer frequency was set to 0x200000000 during boot clk
which needs to be set to 0x400000000 when transition from boot clk
to PLL clk.

This will ensure that subsequent timer operations are based on the
correct frequency, ensuring accurate timekeeping.

Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agonet: dwc_eth_xgmac_socfpga: Remove always true test
Andrew Goodbody [Mon, 4 Aug 2025 15:11:38 +0000 (16:11 +0100)] 
net: dwc_eth_xgmac_socfpga: Remove always true test

In dwxgmac_of_get_mac_mode there is a test for mac_mode which will
return if false. After this point mac_mode is guaranteed to be true so
there is no need to test for this. Remove that test.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agonet: dwc_eth_xgmac: Use unwind goto on error
Andrew Goodbody [Mon, 4 Aug 2025 15:11:37 +0000 (16:11 +0100)] 
net: dwc_eth_xgmac: Use unwind goto on error

In xgmac_probe there is a direct return after the point where unwind
gotos start to be used to undo actions performed by earlier code. Use
the appropriate unwind goto instead.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
2 months agodoc: spl: fix typo 'TPL' to 'VPL'
Leo Yu-Chi Liang [Wed, 6 Aug 2025 11:39:12 +0000 (19:39 +0800)] 
doc: spl: fix typo 'TPL' to 'VPL'

Fix typo: change 'TPL' to 'VPL'.

Signed-off-by: Leo Yu-Chi Liang <ycliang@andestech.com>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 months agoefi_loader: Support loading a ramdisk with bootefi
Simon Glass [Tue, 5 Aug 2025 05:46:14 +0000 (07:46 +0200)] 
efi_loader: Support loading a ramdisk with bootefi

It is sometimes useful to be able to boot via EFI using a Linux initrd.
Add support for this.

Fix a 'specifiy' typo while here.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Mark Kettenis <kettenis@openbsd.org>
Reviewed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
2 months agodoc: qemu-riscv: describe running as flash image
Heinrich Schuchardt [Tue, 29 Jul 2025 07:47:26 +0000 (09:47 +0200)] 
doc: qemu-riscv: describe running as flash image

Describe how to build U-Boot to be run by QEMU as an emulated flash image.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 months agotools: mkeficapsule: resource leak in read_bin_file()
Heinrich Schuchardt [Sat, 26 Jul 2025 06:31:23 +0000 (08:31 +0200)] 
tools: mkeficapsule: resource leak in read_bin_file()

Free the allocated buffer in case of an error.

Fixes: 9e63786e2b4b ("tools: mkeficapsule: rework the code a little bit")
Addresses-Coverity-ID: 345917 Resource leak
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 months agopylibfdt: setup.py: Drop license_files
Tom Rini [Fri, 25 Jul 2025 15:18:21 +0000 (09:18 -0600)] 
pylibfdt: setup.py: Drop license_files

On more recent versions of setuptools the warning about not being able
to find the files specified in license_files has re-appeared. This is
because as best I can tell, it can't and won't look in $(srctree) but
rather only subdirectories of scripts/dtc/pylibfdt. Since we already
provide both SPDX tags and a license field with the SPDX contents, let
us just drop license_files as it's not mandatory.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 months agovirtio: fix freeing of virtio ring buffer
Heinrich Schuchardt [Sat, 26 Jul 2025 06:17:58 +0000 (08:17 +0200)] 
virtio: fix freeing of virtio ring buffer

If the allocation if the bounce buffer fails, virtio_free_pages is called
with a random value from the stack.

Ensure that vring.size is initialized.

Fixes: 37e53db38bdb ("virtio: Allocate bounce buffers for devices with VIRTIO_F_IOMMU_PLATFORM")
Addresses-Coverity-ID: 453314 Uninitialized scalar variable
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
2 months agomeminfo: correct "free" memory region size
Shiji Yang [Sun, 27 Jul 2025 07:42:01 +0000 (15:42 +0800)] 
meminfo: correct "free" memory region size

The size of free memory should be $lmb_base - $ram_base.

Signed-off-by: Shiji Yang <yangshiji66@outlook.com>
2 months agomtd: spi-nor: Fix return value of s25_s28_mdp_ready()
Takahiro Kuwano [Mon, 28 Jul 2025 01:13:58 +0000 (10:13 +0900)] 
mtd: spi-nor: Fix return value of s25_s28_mdp_ready()

s25_s28_mdp_ready() returns 1 when spansion_sr_ready() returns negative
value (error code). Fix this problem by following Linux implementation.

Fixes: 1c3dd193b5b ("mtd: spi-nor-core: Add fixups for Cypress s25hl-t/s25hs-t")
Reported-by: Hiroyuki Saito <Hiroyuki.Saito2@infineon.com>
Signed-off-by: Takahiro Kuwano <Takahiro.Kuwano@infineon.com>
Reviewed-by: Tudor Ambarus <tudor.ambarus@linaro.org>
2 months agodrivers: scsi: fix inaccurate block count reporting in scsi operations
Balaji Selvanathan [Mon, 28 Jul 2025 16:21:05 +0000 (21:51 +0530)] 
drivers: scsi: fix inaccurate block count reporting in scsi operations

The 'blks' variable in scsi_read/write/erase functions is updated
regardless of pass/fail of the scsi operation . If the scsi operation
fails, 'blkcnt' is updated using an incorrect value of 'blks'. This
wrong 'blkcnt' is returned to the caller and it assumes all blocks were
processed correctly.

Fix this by updating the 'blks' variable only if the scsi operation
succeeds.

Signed-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
2 months agoMerge patch series "arm: dts: k3-am62a: remove GP security variant for AM62A"
Tom Rini [Thu, 7 Aug 2025 17:14:07 +0000 (11:14 -0600)] 
Merge patch series "arm: dts: k3-am62a: remove GP security variant for AM62A"

Bryan Brattlof <bb@ti.com> says:

The AM62Ax was created right when TI was shifting to their high security
(HS-FS and HS-SE) processes. During this transition a small subset of
AM62A parts where configured to use the old "GP" security for internal
and for select groups of partners but never sold for the wider public.

To help simplify the build and to avoid any confusion of which security
configurations are supported going forward remove the GP builds for the
AM62A SoCs.

Link: https://lore.kernel.org/r/20250729-no-62a-gp-v1-0-1dbdb4469ad3@ti.com
2 months agoarm: dts: k3-am62a-phycore: remove GP tiboot3 builds
Bryan Brattlof [Tue, 29 Jul 2025 18:36:57 +0000 (13:36 -0500)] 
arm: dts: k3-am62a-phycore: remove GP tiboot3 builds

The AM62Ax SoC family was the last part from TI to support the GP
security variant, however this security variant was used mostly
internally and with select early partners and never sold publicly.

To simplify things and to avoid any confusion on which parts are
supported in the future, remove the GP tiboo3.bin builds from binman.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
Acked-by: Wadim Egorov <w.egorov@phytec.de>
2 months agoarm: dts: k3-am62a-sk: remove GP tiboot3 builds
Bryan Brattlof [Tue, 29 Jul 2025 18:36:56 +0000 (13:36 -0500)] 
arm: dts: k3-am62a-sk: remove GP tiboot3 builds

The AM62Ax SoC family was the last part from TI to support the GP
security variant, however this security variant was used mostly
internally and with select early partners and never sold publicly.

To simplify things and to avoid any confusion of which parts are
supported in the future, remove the GP tiboot3.bin builds from binman.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Reviewed-by: Neha Malcom Francis <n-francis@ti.com>
2 months agodts: imx8m{m,n,p,q}: Make optee packaging optional
Yannic Moog [Wed, 6 Aug 2025 12:45:19 +0000 (14:45 +0200)] 
dts: imx8m{m,n,p,q}: Make optee packaging optional

binman can omit packaging an optional blob when it is missing.
This allows us to not bother with config options.
The core challenge is the interaction between tf-a and OP-TEE where
U-Boot/binman does not know whether tf-a was built with SPD=opteed or
without. This is important because tf-a might jump into the void when no
optee_os is present, leading to boot failure. Thus by marking it
optional, user is prompted to recheck (due to the warning message)
whether they really have the right combination of tf-a and optee.

Due to a bug in binman, we had to guard binman tee.bin with OPTEE config
as builds would error when tee.bin was not present in path; Even though
optee_os was marked as optional in the binman tree. Since the bug has
been resolved in
commit d4f61eae2ab7 ("Merge patch series "Fix handling of optional blobs in binman"")
we can mark it optional again without getting build errors.

Note that after this commit a warning will be printed when optee is not
present for a binman build.

Image 'image' is missing optional external blobs but is still functional: tee-os

/binman/section/fit/images/tee/tee-os (tee.bin):
   See the documentation for your board. You may need to build Open Portable
   Trusted Execution Environment (OP-TEE) and build with TEE=/path/to/tee.bin

Signed-off-by: Yannic Moog <y.moog@phytec.de>
2 months agonet: fec_mxc: Set error code on error exit
Andrew Goodbody [Tue, 5 Aug 2025 11:23:06 +0000 (12:23 +0100)] 
net: fec_mxc: Set error code on error exit

In fecmxc_probe if a timeout is detected when resetting the chip no
error code is set before taking the error exit. This could lead to a
silent failure. Instead set an error code.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2 months agoARM: imx6: dh-imx6: Enable USB OTG ID pin pull up in SPL
Marek Vasut [Mon, 28 Jul 2025 22:38:34 +0000 (00:38 +0200)] 
ARM: imx6: dh-imx6: Enable USB OTG ID pin pull up in SPL

Enable SoC pull up for USB OTG ID pin in SPL. There is no dedicated pull up
resistor on the SoM itself, and the pull up is mandatory for correct USB OTG
ID pin detection. U-Boot proper already configures the USB OTG ID pin pull
up via DT pinctrl node entry.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Tested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
2 months agoimx: scu_api: Remove unnecessary NULL check
Andrew Goodbody [Mon, 28 Jul 2025 16:42:21 +0000 (17:42 +0100)] 
imx: scu_api: Remove unnecessary NULL check

In sc_seco_secvio_dgo_config there is a check for data being NULL but
this occurs after data has already been dereferenced. All callers of the
function provide a valid pointer for data so no need for the NULL check.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2 months agoimx8m: clock: Correct imx8mm_fracpll_tbl
Peng Fan [Mon, 28 Jul 2025 10:25:29 +0000 (18:25 +0800)] 
imx8m: clock: Correct imx8mm_fracpll_tbl

The minimum frequency of Fref (Fin / p) is 6MHz for the PLL AC
Electrical Characteristics. Setting p with 9 or 8 voilates the Spec.

Update the settings to match Spec.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
2 months agocpu: imx8_cpu: Provide default temperatures
Andrew Goodbody [Thu, 24 Jul 2025 14:46:49 +0000 (15:46 +0100)] 
cpu: imx8_cpu: Provide default temperatures

Add setting default temperatures to the weak version of
get_cpu_temp_grade so these values will not be used uninitialised.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2 months agoimx8ulp_evk: Enable temperature command
David Zang [Thu, 24 Jul 2025 00:25:17 +0000 (19:25 -0500)] 
imx8ulp_evk: Enable temperature command

User can display temperature in the console runtime on i.MX8ULP board.

Signed-off-by: David Zang <davidzangcs@gmail.com>
2 months agoclk: imx: Free pll on error path
Andrew Goodbody [Wed, 23 Jul 2025 16:32:45 +0000 (17:32 +0100)] 
clk: imx: Free pll on error path

For an unknown pll type the error path neglects to free the memory just
allocated. Add the free.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
2 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Wed, 6 Aug 2025 19:42:56 +0000 (13:42 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

Various fixes for smatch warnings, the i2c one might be also coming in
via Heiko / I2C tree, let me know if there is conflict.

There is also W77Q51NW SPI NOR ID support, with the DT portion omitted
for now.

2 months agoarm64: renesas: r8a779g3: Enable Winbond SPI NOR support on Retronix R-Car V4H Sparro...
Marek Vasut [Wed, 6 Aug 2025 14:58:54 +0000 (16:58 +0200)] 
arm64: renesas: r8a779g3: Enable Winbond SPI NOR support on Retronix R-Car V4H Sparrow Hawk board

Enable support for Winbond SPI NOR on Retronix R-Car V4H Sparrow Hawk board,
this is required to support W77Q51NW on new board revision EVTB1 operational.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
2 months agonet: rswitch: Fix error detection
Andrew Goodbody [Wed, 6 Aug 2025 10:19:11 +0000 (11:19 +0100)] 
net: rswitch: Fix error detection

In rswitch_probe the error detection after the call to devm_clk_get is
very wrong. It checks the value of ret which is uninitialised at that
point. Instead it should be using the macros for including errors into
pointers.

This issue was found by Smatch.

Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>