]> git.ipfire.org Git - thirdparty/u-boot.git/log
thirdparty/u-boot.git
11 days agoARM: stm32: Add missing build of ST DFU virt code on DH STM32MP1 DHSOM
Marek Vasut [Fri, 31 Oct 2025 04:16:09 +0000 (05:16 +0100)] 
ARM: stm32: Add missing build of ST DFU virt code on DH STM32MP1 DHSOM

Commit 6d91f0a3a14d ("board: st: common: cleanup dfu support") split
the vendor-specific DFU implementation into two files, but failed to
update other non-ST boards. This did not lead to noticeable breakage
with plain simple dfu-util, but it makes the ST proprietary programmer
CLI tool end in an infinite loop. Update the Makefile accordingly to
allow even that kind of tooling to work.

Fixes: 6d91f0a3a14d ("board: st: common: cleanup dfu support")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 days agoARM: dts: stm32: Introduce DH STM32MP13x target
Marek Vasut [Thu, 23 Oct 2025 21:47:57 +0000 (23:47 +0200)] 
ARM: dts: stm32: Introduce DH STM32MP13x target

Split the DH STM32MP13x based boards from ST STM32MP13x target,
this way the DH board specific code can be reused for STM32MP13x
DHSOM.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 days agoARM: dts: stm32: Keep the reg11 and reg18 regulators always enabled on STM32MP13xx...
Marek Vasut [Thu, 23 Oct 2025 21:47:25 +0000 (23:47 +0200)] 
ARM: dts: stm32: Keep the reg11 and reg18 regulators always enabled on STM32MP13xx DHCOR

Do not disable reg11 and reg18, disabling these regulators causes
the SoC to hang.

Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 days agoARM: dts: stm32: Fix STM32MP15xx DHSOM boot breakage due to ETZPC
Marek Vasut [Thu, 23 Oct 2025 21:46:05 +0000 (23:46 +0200)] 
ARM: dts: stm32: Fix STM32MP15xx DHSOM boot breakage due to ETZPC

Switch etzpc bus to simple-bus to prevent breakage on non-TFA systems.
This fixes boot of every STM32MP15xx DHSOM device.

Fixes: ad3cdc677dda ("ARM: stm32mp: add ETZPC system bus driver for STM32MP1")
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 days agoarm: stm32mp25: add ethernet support for stm32mp255 series
Asadeds [Tue, 28 Oct 2025 05:39:26 +0000 (11:09 +0530)] 
arm: stm32mp25: add ethernet support for stm32mp255 series

Add missing CPU_STM32MP255* cases in get_eth_nb() so that U-Boot
correctly reports 2 Ethernet interfaces on stm32mp255 devices.
This fixes the "ethernet not found" error during boot.

Signed-off-by: Md Asadullah <md.asadullah@eds-india.com>
11 days agoconfigs: stm32mp25: enable LVDS display support
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:11 +0000 (14:53 +0200)] 
configs: stm32mp25: enable LVDS display support

Compile VIDEO_STM32 and VIDEO_STM32_LVDS by default.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
11 days agovideo: stm32: ltdc: properly search the first available panel
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:09 +0000 (14:53 +0200)] 
video: stm32: ltdc: properly search the first available panel

Initially there was only one DSI bridge with one panel attached to this
device. This explained the call to uclass_first_device_err(UCLASS_PANEL,
...) which worked fine at the time.

Now that multiple bridges and panels, with different technologies, can
be plugged onto the board this way to get the panel device is outdated.

The lookup is done is two steps. First we circle through the
UCLASS_VIDEO_BRIDGE, and once we get one, we search through its
endpoints until we get a UCLASS_PANEL device available.

Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
11 days agovideo: stm32: ltdc: support new hardware version for STM32MP25 SoC
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:08 +0000 (14:53 +0200)] 
video: stm32: ltdc: support new hardware version for STM32MP25 SoC

STM32MP2 SoCs feature a new version of the LTDC IP.  This new version
features a bus clock, as well as a 150MHz pad frequency.  Add its
compatible to the list of device to probe and handle quirks.  The new
hardware version features a bus clock.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
11 days agovideo: stm32: STM32 driver support for LVDS
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:07 +0000 (14:53 +0200)] 
video: stm32: STM32 driver support for LVDS

The LVDS Display Interface Transmitter handles the LVDS protocol:
it maps the pixels received from the upstream Pixel-DMA (LTDC)
onto the LVDS PHY.

The LVDS controller driver supports the following high-level features:
        • FDP-Link-I and OpenLDI (v0.95) protocols
        • Single-Link or Dual-Link operation
        • Single-Display or Double-Display (with the same content
          duplicated on both)
        • Flexible Bit-Mapping, including JEIDA and VESA
        • RGB888 or RGB666 output
        • Synchronous design, with one input pixel per clock cycle
        • No resolution limitation.

Acked-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
11 days agovideo: simple_panel: add support for "panel-lvds" display
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:06 +0000 (14:53 +0200)] 
video: simple_panel: add support for "panel-lvds" display

Add the compatible "panel-lvds" for simple-panel driver in U-Boot.  In
Linux this compatible is managed by the driver
drivers/gpu/drm/panel/panel-lvds.c but in U-Boot the specific LVDS
features (bus_format/bus_flags) are not supported.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
11 days agoofnode: support panel-timings in ofnode_decode_display_timing
Raphael Gallais-Pou [Thu, 4 Sep 2025 12:53:05 +0000 (14:53 +0200)] 
ofnode: support panel-timings in ofnode_decode_display_timing

The "Display Timings" in panel-common.yaml can be provided by 2 properties
- panel-timing: when display panels are restricted to a single resolution
                the "panel-timing" node expresses the required timings.
- display-timings: several resolutions with different timings are supported
                   with several timing subnode of "display-timings" node

This patch update the parsing function to handle this 2 possibility
when index = 0.

Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Yannick Fertre <yannick.fertre@foss.st.com>
Signed-off-by: Raphael Gallais-Pou <raphael.gallais-pou@foss.st.com>
11 days agoARM: dts: Add st, adc_usb_pd property for stm32mp135-dk-u-boot
Patrice Chotard [Fri, 14 Nov 2025 16:08:54 +0000 (17:08 +0100)] 
ARM: dts: Add st, adc_usb_pd property for stm32mp135-dk-u-boot

Add st,adc_usb_pd property in /config node for stm32mp135-dk-u-boot.
This needed to check board USB power delivery.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoconfigs: stm32: Enable ADC support for stm32mp13_defconfig
Patrice Chotard [Fri, 14 Nov 2025 16:08:53 +0000 (17:08 +0100)] 
configs: stm32: Enable ADC support for stm32mp13_defconfig

Enable STM_ADC and CM_ADC for stm32mp13_defconfig

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoadc: stm32mp13: add support of adc to stm32mp13
Olivier Moysan [Fri, 14 Nov 2025 16:08:52 +0000 (17:08 +0100)] 
adc: stm32mp13: add support of adc to stm32mp13

Add support of STM32 ADCs to STM32MP13x. This patch introduces
stm32_adc_regspec structure, as this is already done in kernel
driver, to manage smartly the differences in register set
between STMP32MP15 and STM32MP13 ADCs.

Signed-off-by: Olivier Moysan <olivier.moysan@foss.st.com>
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agostm32mp: Add stm32mp23 support for syscon driver
Patrice Chotard [Fri, 17 Oct 2025 12:18:42 +0000 (14:18 +0200)] 
stm32mp: Add stm32mp23 support for syscon driver

Add "st,stm32mp23-syscfg" compatible.

Fixes: fdd30ee308a2 ("ARM: stm32mp: Add STM32MP23 support")
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoARM: dts: Add txbyteclk clock in stm32mp235f-dk-u-boot.dtsi
Patrice Chotard [Fri, 17 Oct 2025 12:18:41 +0000 (14:18 +0200)] 
ARM: dts: Add txbyteclk clock in stm32mp235f-dk-u-boot.dtsi

Add txbyteclk to avoid error during clock registration.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoARM: dts: Fix "arm, smc-id" value for stm32mp25-u-boot.dtsi
Patrice Chotard [Fri, 17 Oct 2025 12:18:40 +0000 (14:18 +0200)] 
ARM: dts: Fix "arm, smc-id" value for stm32mp25-u-boot.dtsi

OP-TEE "arm,smc-id" is equal to 0xbc000000 but kernel DT has been
upstream with an incorrect value.
Fix it temporarily until kernel DT is fixed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoARM: dts: Fix "arm, smc-id" value for stm32mp23-u-boot.dtsi
Patrice Chotard [Fri, 17 Oct 2025 12:18:39 +0000 (14:18 +0200)] 
ARM: dts: Fix "arm, smc-id" value for stm32mp23-u-boot.dtsi

OP-TEE "arm,smc-id" is equal to 0xbc000000 but kernel DT has been
upstream with an incorrect value.
Fix it temporarily until kernel DT is fixed.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
11 days agoARM: dts: Add stm32mp257f-dk-u-boot.dtsi
Patrice Chotard [Fri, 17 Oct 2025 12:18:38 +0000 (14:18 +0200)] 
ARM: dts: Add stm32mp257f-dk-u-boot.dtsi

Add U-Boot support for stm32mp257f-dk board.

Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
2 weeks agoPrepare v2026.01-rc2 v2026.01-rc2
Tom Rini [Mon, 10 Nov 2025 17:12:33 +0000 (11:12 -0600)] 
Prepare v2026.01-rc2

Signed-off-by: Tom Rini <trini@konsulko.com>
2 weeks agodm: Remove pre-schema tag support
Tom Rini [Sun, 2 Nov 2025 20:08:12 +0000 (14:08 -0600)] 
dm: Remove pre-schema tag support

Support for using "u-boot,dm-..." rather than "bootph-..." has been
deprecated since February 2023. Any platforms using this have had a
console message saying to migrate by 2023.07. Go and remove all support
here now, for the v2026.01 release.

The results of this change that aren't clear from the above are that we
still have a checkpatch.pl error message, and document in
doc/develop/spl.rst that they have been migrated since 2023. We also
change the key2dtsi.py tool to use the correct bootph phase rather than
the legacy phase.

Signed-off-by: Tom Rini <trini@konsulko.com>
2 weeks agoconfigs: Resync with savedefconfig
Tom Rini [Sun, 9 Nov 2025 16:53:38 +0000 (10:53 -0600)] 
configs: Resync with savedefconfig

Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
2 weeks agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Sat, 8 Nov 2025 15:03:54 +0000 (09:03 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

Remaining R-Car Gen5 driver patches, MMC, clock. Also a trivial
adjustment for mailbox core to allow operation without .recv callback.

3 weeks agoMerge patch series "Add support for TI AM6254atl SiP"
Tom Rini [Fri, 7 Nov 2025 22:10:49 +0000 (16:10 -0600)] 
Merge patch series "Add support for TI AM6254atl SiP"

Anshul Dalal <anshuld@ti.com> says:

This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.

The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:

AM6254atl
     ||||
     |||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
     ||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
     |+---- Silicon PG Revision (A indicates SR 1.0)
     +----- Core configuration (4 indicates A53's in Quad core config)

AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.

Link: https://lore.kernel.org/r/20251025-62sip_support-v3-0-b4c8314d0055@ti.com
3 weeks agoMerge patch series "Add PCIe Endpoint controller support for TI J784S4 SoC"
Tom Rini [Fri, 7 Nov 2025 22:09:39 +0000 (16:09 -0600)] 
Merge patch series "Add PCIe Endpoint controller support for TI J784S4 SoC"

Hrushikesh Salunke <h-salunke@ti.com> says:

This series enables PCIe Endpoint mode on TI's J784S4 SoC. The J784S4
SoC features two Cadence PCIe controller instances (PCIe0 and PCIe1)
that can operate in endpoint mode. This series adds support for
configuring these controllers with up to 4 lanes.

Key changes include:
- Adding a stabilization delay after power domain reset to prevent
  timing-related initialization issues
- SERDES mux configuration support for proper lane routing, which is
  essential for SoCs where SERDES lanes are shared between multiple
  controllers (PCIe, USB, etc.) with different configurations across
  boot phases
- J784S4 SoC endpoint configuration with 4-lane support
- Disabling unconfigured endpoint functions to prevent enumeration
  issues on the Root Complex side

This series has been tested on J784S4 EVM with PCIe endpoint boot
configuration. Following are the corresponding test logs.

https://gist.github.com/hrushikesh221/331d65f45f43fd138f57e6adb61c4332

Link: https://lore.kernel.org/r/20251023114604.3655625-1-h-salunke@ti.com
3 weeks agoMerge patch series "board: ti: am62x: Add EEPROM support and refactor board detection"
Tom Rini [Fri, 7 Nov 2025 22:08:37 +0000 (16:08 -0600)] 
Merge patch series "board: ti: am62x: Add EEPROM support and refactor board detection"

Guillaume La Roque (TI.com) <glaroque@baylibre.com> says:

This series adds EEPROM board detection support for AM62x and refactors
the board detection code across AM6x family boards to eliminate code
duplication.

The series introduces two new generic functions for AM6x boards:
- do_board_detect_am6(): Reads the on-board EEPROM with fallback logic
  to alternate I2C addresses
- setup_serial_am6(): Sets up the serial number environment variable
  from EEPROM data

Link: https://lore.kernel.org/r/20251103-am62xeeprom-v3-0-e390779c0fc5@baylibre.com
3 weeks agoMerge patch series "arm: airoha: add support for en7523 based boards"
Tom Rini [Fri, 7 Nov 2025 22:04:16 +0000 (16:04 -0600)] 
Merge patch series "arm: airoha: add support for en7523 based boards"

Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> says:

This patch series adds basic support for the boards based on Airoha
EN7523/EN7529/EN7562 SoCs. Due to ATF restrictions these boards are
able to run 32-bit OS only.

This patch series adds support for the following hardware:
 * console UART
 * ethernet controller/switch
 * spinand flash (in non-dma mode)

The following issues may be expected:
 * Extra slow UBI attaching in U-Boot (up to 20 sec with fastmap enabled).
   This is caused by the lack of DMA support in the U-Boot airoha-snfi driver.
 * Linux airoha-snfi driver in some cases might damage you flash data
   (see: https://lore.kernel.org/lkml/20251012121707.2296160-15-mikhail.kshevetskiy@iopsys.eu/)
 * Latest linux kernel is recommended to properly support flashes
   with more than one plane per lun
   (see: https://lore.kernel.org/lkml/20251012121707.2296160-7-mikhail.kshevetskiy@iopsys.eu/)
 * It's NOT recommended to use flashes working in continuous mode because
   U-Boot airoha-snfi driver does not support such flashes properly.

The patches was tested on the board:
 - SoC: Airoha EN7562
 - RAM: 512 MB
 - SPI NAND: 4 Gbit, made by Toshiba
 - Linux boot: was NOT tested

The U-Boot was chain-loaded from the running U-Boot. Airoha ATF-2.3 does
not allow easily chain-loading of U-Boot from U-Boot, so a special FIT
image (mimic linux kernel) was created

1) Create u-boot.its file with the following contents:

=== cut here ===
/dts-v1/;

/ {
description = "ARM OpenWrt FIT (Flattened Image Tree)";
#address-cells = <1>;

images {
u-boot-ram {
description = "OpenWrt U-Boot RAM image";
data = /incbin/("u-boot.bin.lzma");
type = "kernel";
arch = "arm";
os = "linux";
compression = "lzma";
load = <0x81e00000>;
entry = <0x81e00000>;
hash@1 {
algo = "crc32";
};
hash@2 {
algo = "sha1";
};
};

fdt-1 {
description = "OpenWrt device tree blob";

data = /incbin/("dts/upstream/src/arm/airoha/en7523-evb.dtb");
type = "flat_dt";

arch = "arm";
compression = "none";
hash@1 {
algo = "crc32";
};
hash@2 {
algo = "sha1";
};
};
};

configurations {
default = "config-ram-uboot";
config-ram-uboot {
description = "OpenWrt RAM U-Boot";
kernel = "u-boot-ram";
fdt = "fdt-1";
};
};
};
==================

2) Create u-boot.itb image to chain-load new u-boot from the old one

  lzma_alone e u-boot.bin u-boot.bin.lzma
  mkimage -f u-boot.its u-boot.itb

3) Load new u-boot from the old one

  U-Boot> tftpboot u-boot.itb && bootm

Link: https://lore.kernel.org/r/20251101004503.2379529-1-mikhail.kshevetskiy@iopsys.eu
3 weeks agoti: add support for AM6254atl SiP
Anshul Dalal [Sat, 25 Oct 2025 02:48:11 +0000 (08:18 +0530)] 
ti: add support for AM6254atl SiP

TI's AM6254atl (or AM62x SiP for short) provides the existing AM62x SoC
with 512MiB of DDR integrated in a single package.

This patch adds the necessary U-Boot devie tree files, the required
defconfigs along with the documentation for the AM62x SiP EVM.

AM62x SiP differs from the already supported AM62x in following ways:

- OP-TEE for the AM62x resides from 0x9e800000 to 0xa0000000 which needs
  to be moved to 0x80080000 to free up space at end of DDR in AM62x SiP
  with 512MiB of memory. This is required to allow U-Boot to relocate to
  end of DDR before booting to the kernel.

- Changes to the env:
   1. splashimage address updated from 0x80200000 to 0x81a00000
   2. DFU addresses updated to match updated TEXT_BASE for SPL and U-Boot

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoarm64: dts: ti: Add support for AM6254atl SiP SK
Anshul Dalal [Sat, 25 Oct 2025 02:48:10 +0000 (08:18 +0530)] 
arm64: dts: ti: Add support for AM6254atl SiP SK

This patch adds the dt for SK-AM62-SIP, which uses the existing
SK-AM62 board design with the new AM6254atl SiP. This changes the
location of memory node from the board dts to SoC level dtsi
(k3-am6254atl in our case).

Therefore this patch introduces the new 'k3-am625-sk-common.dtsi'
which represents the common hardware used for both 'am625-sk' and
'am6254atl-sk' boards with the inheritance hierarchy modified to:

k3-am625-sk.dts:

     k3-am62    k3-am62x-sk-common
        |            |
    k3-am625    k3-am625-sk-common
        |            |
        +-----+------+
              |
         k3-am625-sk

k3-am6254atl-sk.dts:

     k3-am62
        |
     k3-am625       k3-am62x-sk-common
        |                |
    k3-am6254atl    k3-am625-sk-common
        |                |
        +-------+--------+
                |
         k3-am6254atl-sk

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250814134531.2743874-5-anshuld@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
[ upstream commit: 2517e476b819df986fa1fe53927c099032bb72dc ]

(cherry picked from commit 58cd89aff167661dbae0c9911282ea3f1b8212cc)

3 weeks agoarm64: dts: ti: Introduce base support for AM6254atl SiP
Anshul Dalal [Sat, 25 Oct 2025 02:48:09 +0000 (08:18 +0530)] 
arm64: dts: ti: Introduce base support for AM6254atl SiP

This patch adds the top level dtsi for AM6254atl SiP which integrates
the existing AM625 SoC with 512MiB of DDR in a single package.

More information about the package can be found here:
https://www.ti.com/lit/ds/symlink/am625sip.pdf

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250814134531.2743874-4-anshuld@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
[ upstream commit: 7c1d13a14e61ab33eec330cb6cabbddb37eecaa9 ]

(cherry picked from commit fa5a6a6e784bde78c6ec74eccd92d51fb9fd49e8)

3 weeks agoarm64: dts: ti: k3-am62*: remove SoC dtsi from common dtsi
Anshul Dalal [Sat, 25 Oct 2025 02:48:08 +0000 (08:18 +0530)] 
arm64: dts: ti: k3-am62*: remove SoC dtsi from common dtsi

The k3-am62x-sk-common dtsi represents the common hardware used across
am62x EVMs which can be configured with various DDR sizes or none (with
DDR integrated in the package) based on the specific am62x SoC used.

Therefore this patch moves the memory node and the SoC specific k3-am625
dtsi out of sk-common and into the board dts files. No functional change
is intended from this patch. The device-tree inheritance is changed as
follows:

Before:

               k3-am62
                 ^
               k3-am625
                 ^
         k3-am62x-sk-common
                 ^
  am62x EVMs (k3-am625-sk, k3-am62-lp-sk)

After:

        k3-am62
          ^
        k3-am625    k3-am62x-sk-common
          ^              ^
  am62x EVMs (k3-am625-sk, k3-am62-lp-sk)

Signed-off-by: Anshul Dalal <anshuld@ti.com>
Reviewed-by: Bryan Brattlof <bb@ti.com>
Link: https://patch.msgid.link/20250814134531.2743874-2-anshuld@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
[ upstream commit: e0b9feca7329c495a76891d7766a781dea73787d ]

(cherry picked from commit 0b0edbbdf43bac6b28dd59c88647bd5e0b73ffea)

3 weeks agoarm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node
Beleswar Padhi [Sat, 25 Oct 2025 02:48:07 +0000 (08:18 +0530)] 
arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node

Add the label name 'reserved_memory' to the reserved-memory node in all
K3 AM6* board level dts files. This is done so that the node can be
referenced and extended to add more carveout entries as needed in future
refactoring patches.

Signed-off-by: Beleswar Padhi <b-padhi@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://patch.msgid.link/20250908142826.1828676-13-b-padhi@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
[ upstream commit: 4f1aee4723a796a92f17b23699dc861b582ddfd2 ]

(cherry picked from commit 58c447fe500d78f5adc373b4945d8317e11df072)

3 weeks agoconfigs: j784s4_evm_a72_defconfig: Enable configs for PCI Endpoint mode
Hrushikesh Salunke [Thu, 23 Oct 2025 11:46:04 +0000 (17:16 +0530)] 
configs: j784s4_evm_a72_defconfig: Enable configs for PCI Endpoint mode

TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and
PCIe1 which are Cadence PCIe Controllers. Enable corresponding configs
to support PCIe Endpoint mode of operation on these instances.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
3 weeks agopci_endpoint: pci_cdns_ti_ep: Enable PCIe Endpoint mode in J784S4 SoC
Hrushikesh Salunke [Thu, 23 Oct 2025 11:46:03 +0000 (17:16 +0530)] 
pci_endpoint: pci_cdns_ti_ep: Enable PCIe Endpoint mode in J784S4 SoC

TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and
PCIe1 which are Cadence PCIe Controllers. Add support to configure PCIe
instances in Endpoint mode of operation.

While at it disable all endpoint functions except function 0 during
probe to prevent the Root Complex from enumerating unconfigured
functions. This ensures only  properly configured endpoint functions
are visible to the host and avoids enumeration issues with
multi-function devices.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
3 weeks agopci_endpoint: pci_cdns_ti_ep: Add SERDES mux configuration support
Hrushikesh Salunke [Thu, 23 Oct 2025 11:46:02 +0000 (17:16 +0530)] 
pci_endpoint: pci_cdns_ti_ep: Add SERDES mux configuration support

Probe the mux device early in the SERDES configuration flow to ensure
proper lane routing before PHY initialization. This is required for SoCs
where SERDES lanes can be muxed between different controllers
(PCIe, USB, etc), and different mux configurations are required between
different boot phases.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
3 weeks agopci_endpoint: pci_cdns_ti_ep: Add delay after power domain reset
Hrushikesh Salunke [Thu, 23 Oct 2025 11:46:01 +0000 (17:16 +0530)] 
pci_endpoint: pci_cdns_ti_ep: Add delay after power domain reset

Add a 1ms delay after powering on the PCIe power domain to ensure
the controller stabilizes before subsequent operations. This prevents
potential timing issues during PCIe endpoint initialization.

The delay allows sufficient time for the power domain to fully come
up and the hardware to be in a stable state before configuration
begins.

Signed-off-by: Hrushikesh Salunke <h-salunke@ti.com>
3 weeks agoboard: am65x: Use generic AM6x board detection function
Guillaume La Roque (TI.com) [Mon, 3 Nov 2025 18:40:05 +0000 (19:40 +0100)] 
board: am65x: Use generic AM6x board detection function

Replace the board-specific implementation of do_board_detect()
with a call to the generic do_board_detect_am6() function to
avoid code duplication across AM6x family boards.

The generic function provides the same functionality with
additional fallback logic to try alternate EEPROM addresses.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
3 weeks agoboard: am64x: Use generic AM6x board detection functions
Guillaume La Roque (TI.com) [Mon, 3 Nov 2025 18:40:04 +0000 (19:40 +0100)] 
board: am64x: Use generic AM6x board detection functions

Replace the board-specific implementation of do_board_detect() and
setup_serial() with calls to the generic do_board_detect_am6() and
setup_serial_am6() functions.

The generic function provides the same functionality with
additional fallback logic to try alternate EEPROM addresses.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
3 weeks agoboard: am62x: Add support for reading eeprom data
Guillaume La Roque (TI.com) [Mon, 3 Nov 2025 18:40:03 +0000 (19:40 +0100)] 
board: am62x: Add support for reading eeprom data

I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot

Use the generic do_board_detect_am6() and setup_serial_am6()
functions to avoid code duplication across AM6x family boards.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
3 weeks agoboard: ti: common: Add generic AM6x board detection functions
Guillaume La Roque (TI.com) [Mon, 3 Nov 2025 18:40:02 +0000 (19:40 +0100)] 
board: ti: common: Add generic AM6x board detection functions

Add two new generic functions for AM6x family boards to simplify
board-specific implementations:

- do_board_detect_am6(): Generic board detection function that reads
  the on-board EEPROM. It first attempts to read at the configured
  address, and if that fails, tries the alternate address
  (CONFIG_EEPROM_CHIP_ADDRESS + 1). This provides a common
  implementation that can be used across different AM6x boards.

- setup_serial_am6(): Sets up the serial number environment variable
  from the EEPROM data. The serial number is converted from
  hexadecimal string format to a 16-character hexadecimal
  representation and stored in the "serial#" environment variable.

Both functions are protected by CONFIG_IS_ENABLED(TI_I2C_BOARD_DETECT)
and are designed to be used by AM62x, AM64x, AM65x, and other AM6x
family boards.

Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
3 weeks agoconfigs: airoha: en7523: enable spinand flashes support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:45:03 +0000 (03:45 +0300)] 
configs: airoha: en7523: enable spinand flashes support

This patch enable spinand flashes support for en7523 based boards

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agodts: airoha: en7523: add spinand flash support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:45:02 +0000 (03:45 +0300)] 
dts: airoha: en7523: add spinand flash support

This patch adds spinand flashes support to en7523 dts

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoconfigs: airoha: en7523: enable ethernet controller support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:45:01 +0000 (03:45 +0300)] 
configs: airoha: en7523: enable ethernet controller support

This patch activates ethernet controller support for en7523 based boards

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agodts: airoha: en7523: add ethernet controller support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:45:00 +0000 (03:45 +0300)] 
dts: airoha: en7523: add ethernet controller support

This patch adds integrated ethernet controller support to en7523 dts

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agonet: airoha: add support for airoha en7523 SoC family
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:59 +0000 (03:44 +0300)] 
net: airoha: add support for airoha en7523 SoC family

Add support for Ethernet controller present in Airoha en7523/en7529/en7562.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agonet: airoha: unify code using SCU regmap helper
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:58 +0000 (03:44 +0300)] 
net: airoha: unify code using SCU regmap helper

This allow us remove some an7581/an7583 specific code and use a common
code instead.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoconfigs: airoha: en7523: enable reset controller support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:57 +0000 (03:44 +0300)] 
configs: airoha: en7523: enable reset controller support

This patch activates reset controller support for en7523 based boards

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agodts: airoha: en7523: add reset controller support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:56 +0000 (03:44 +0300)] 
dts: airoha: en7523: add reset controller support

This patch adds reset controller support to en7523 dts

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoreset: airoha: add support for airoha en7523 SoC family
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:55 +0000 (03:44 +0300)] 
reset: airoha: add support for airoha en7523 SoC family

This adds reset controller support for airoha en7523/en7529/en7562 SoCs.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agodt-bindings: reset: Add reset support for Airoha EN7523
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:54 +0000 (03:44 +0300)] 
dt-bindings: reset: Add reset support for Airoha EN7523

Introduce reset capability for EN7523 device-tree binding

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoreset: airoha: unify code using SCU regmap helper
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:53 +0000 (03:44 +0300)] 
reset: airoha: unify code using SCU regmap helper

This patch unify probing code using airoha SCU regmap helper, thus a
common function can be used instead of an7581/an7583 specific ones.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoreset: airoha: convert to regmap API
Christian Marangi [Sat, 1 Nov 2025 00:44:52 +0000 (03:44 +0300)] 
reset: airoha: convert to regmap API

In preparation for support for Airoha AN7583, convert the driver to
regmap API. This is needed as Airoha AN7583 will use syscon to access
reset registers.

Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
3 weeks agoconfigs: airoha: en7523: enable clk support
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:51 +0000 (03:44 +0300)] 
configs: airoha: en7523: enable clk support

This patch activates clk support for en7523 based boards

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoclk: airoha: add support for airoha en7523 SoC family
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:50 +0000 (03:44 +0300)] 
clk: airoha: add support for airoha en7523 SoC family

This adds clock driver for airoha en7523/en7529/en7562 SoCs. The code
is based on corresponding linux driver.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoclk: airoha: use CHIP_SCU regmap helper
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:49 +0000 (03:44 +0300)] 
clk: airoha: use CHIP_SCU regmap helper

Use common helper to get CHIP_SCU registers.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoarm: airoha: introduce EN7523 helpers to get SCU and CHIP_SCU regmaps
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:48 +0000 (03:44 +0300)] 
arm: airoha: introduce EN7523 helpers to get SCU and CHIP_SCU regmaps

We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.

To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha EN7523 SoC.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoarm: airoha: introduce AN7581 helpers to get SCU and CHIP_SCU regmaps
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:47 +0000 (03:44 +0300)] 
arm: airoha: introduce AN7581 helpers to get SCU and CHIP_SCU regmaps

We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.

To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha AN7581 SoC.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoarm/airoha: add support for airoha en7523 SoC family
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:46 +0000 (03:44 +0300)] 
arm/airoha: add support for airoha en7523 SoC family

Basic support for en7523/en7529/en7562 SoCs. Within a patch
only serial console will be supported.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoairoha/an7581: add CONFIG_TARGET_AN7581=y to the defconfig
Mikhail Kshevetskiy [Sat, 1 Nov 2025 00:44:45 +0000 (03:44 +0300)] 
airoha/an7581: add CONFIG_TARGET_AN7581=y to the defconfig

This is required because airoha/en7523 will be added with the following
patches. Without this line config for en7523 will be created instead of
an7581.

Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu>
3 weeks agoblock: typo 'to be write'
Heinrich Schuchardt [Wed, 5 Nov 2025 01:26:49 +0000 (02:26 +0100)] 
block: typo 'to be write'

%s/to be write/to write/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 weeks agovirtio: typo 'private date'
Heinrich Schuchardt [Tue, 4 Nov 2025 23:42:31 +0000 (00:42 +0100)] 
virtio: typo 'private date'

%s/private date/private data/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 weeks agovirtio: typo complaint
Heinrich Schuchardt [Tue, 4 Nov 2025 23:39:15 +0000 (00:39 +0100)] 
virtio: typo complaint

%s/v1.0 complaint/v1.0 compliant/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
3 weeks agosound: typos 'to be write', 'writen'
Heinrich Schuchardt [Tue, 4 Nov 2025 23:02:03 +0000 (00:02 +0100)] 
sound: typos 'to be write', 'writen'

%s/to be write/to be written/
%s/writen/written/

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
3 weeks agosound: all sound devices must depend on CONFIG_SOUND
Heinrich Schuchardt [Fri, 31 Oct 2025 21:07:00 +0000 (22:07 +0100)] 
sound: all sound devices must depend on CONFIG_SOUND

Clean up the sound Kconfig options to let all sound devices depend on
CONFIG_SOUND.

Before this patch it was possible to select CONFIG_SOUND_MAX98357A even
with CONFIG_SOUND=n.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 weeks agotoradex: verdin-am62: sync rm-cfg with SDK 11.01.05.03 baseline
Vitor Soares [Tue, 28 Oct 2025 15:10:11 +0000 (15:10 +0000)] 
toradex: verdin-am62: sync rm-cfg with SDK 11.01.05.03 baseline

Update the resource management configuration (rm-cfg.yaml) to align
with the default configuration provided in TI's AM62xx Processor SDK
Linux version 11.01.05.03, generated using the K3 Resource Partitioning
Tool.

This matches the configuration from board/ti/am62x/rm-cfg.yaml and the
notable change is the sharing of MCU GPIO interrupts between DM R5 and
A53 cores, and reservation of an additional virtual interrupt and event
for TIFS usage.

Signed-off-by: Vitor Soares <vitor.soares@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
Reviewed-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoext4: include missing blk.h
Quentin Schulz [Tue, 28 Oct 2025 14:02:19 +0000 (15:02 +0100)] 
ext4: include missing blk.h

If missing, lbaint_t typedef will not be found in some cases.

[The proper fix for the commit above at the time would have been to
 include ide.h as only since commit 1a73661bc7a7 ("dm: Add a new header
 for block devices") is the typedef in blk.h]

Fixes: 04735e9c5578 ("Fix ext2/ext4 filesystem accesses beyond 2TiB")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agotest/py: multiplexed_log.py: Clean up and correct RunAndLog()
Tom Rini [Fri, 24 Oct 2025 17:26:42 +0000 (11:26 -0600)] 
test/py: multiplexed_log.py: Clean up and correct RunAndLog()

The general python documentation for the subprocess class recommends
that run() be used in all cases that it can handle. What we do in
RunAndLog is simple enough that run() is easy to switch to. In fact,
looking at this exposed a problem we have today, which is that we had
combined stdout and stderr but then looked at both stdout and stderr as
if they were separate. Stop combining them.

Signed-off-by: Tom Rini <trini@konsulko.com>
3 weeks agoMerge patch series "pwm: put symbols into a menu + use if DM_PWM block instead of...
Tom Rini [Fri, 7 Nov 2025 19:02:07 +0000 (13:02 -0600)] 
Merge patch series "pwm: put symbols into a menu + use if DM_PWM block instead of depends on"

Quentin Schulz <foss+uboot@0leil.net> says:

This improves readability in menuconfig by putting PWM symbols under a
Kconfig menu.

It also groups PWM symbols that depend on DM_PWM together under an if
DM_PWM block so that we don't need to always list the dependency in the
depends on of the symbol.

No intended change in behavior except how it shows in menuconfig.

Link: https://lore.kernel.org/r/20251030-pwm-kconfig-v2-0-d151a42784ce@cherry.de
3 weeks agopwm: fix typo in PWM_MESON help text
Quentin Schulz [Thu, 30 Oct 2025 10:03:58 +0000 (11:03 +0100)] 
pwm: fix typo in PWM_MESON help text

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agopwm: put all PWM DM drivers under an if condition on DM_PWM
Quentin Schulz [Thu, 30 Oct 2025 10:03:57 +0000 (11:03 +0100)] 
pwm: put all PWM DM drivers under an if condition on DM_PWM

This simplifies the "depends on" since we don't need DM_PWM listed
explicitly there as it already is made explicit via the surrounding
"if". No intended change in behavior.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agopwm: make sandbox depend on DM_PWM
Quentin Schulz [Thu, 30 Oct 2025 10:03:56 +0000 (11:03 +0100)] 
pwm: make sandbox depend on DM_PWM

Since it is registered as a U_CLASS_DRIVER, Sandbox PWM driver is a
Driver Model Driver and thus to be usable depends on DM_PWM to be
selected.

Let's make sure of that via the appropriate Kconfig option.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agopwm: move all PWM related topics inside a Kconfig menu
Quentin Schulz [Thu, 30 Oct 2025 10:03:55 +0000 (11:03 +0100)] 
pwm: move all PWM related topics inside a Kconfig menu

So it's visually better split from the other subsystems when using
menuconfig.

Reviewed-by: Tom Rini <trini@konsulko.com>
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agommc: renesas-sdhi: Add R-Car Gen5 support
Hai Pham [Mon, 27 Oct 2025 16:40:01 +0000 (17:40 +0100)] 
mmc: renesas-sdhi: Add R-Car Gen5 support

Add support for R-Car Gen5 SoCs into the driver.
The default quirk is identical to previous generation.

Signed-off-by: Hai Pham <hai.pham.ud@renesas.com>
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> # Tweak commit message
3 weeks agomailbox: Allow operation without .recv callback
Marek Vasut [Mon, 27 Oct 2025 16:38:38 +0000 (17:38 +0100)] 
mailbox: Allow operation without .recv callback

Some shared memory mailboxes may have empty receive operation,
because the data are polled by upper layers directly from the
shared memory region, and there is no completion interrupt or
bit of any sort. Allow empty .recv callback, and if the .recv
callback is empty, exit from mbox_recv() right away, because
any polling for completion here would be meaningless.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Alice Guo <alice.guo@nxp.com>
3 weeks agoclk: renesas: Isolate R-Car Gen3 driver to Gen3, Gen4 and RZ/G2L
Marek Vasut [Mon, 27 Oct 2025 16:33:29 +0000 (17:33 +0100)] 
clk: renesas: Isolate R-Car Gen3 driver to Gen3, Gen4 and RZ/G2L

Isolate Renesas R-Car Gen3 clock driver to R-Car Gen3 and Gen4 and RZ/G2L.
The Renesas R-Car Gen5 uses SCMI clock protocol driver instead. This is
a preparatory change for R-Car Gen5. No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
3 weeks agoconfigs: Resync with savedefconfig
Tom Rini [Fri, 7 Nov 2025 15:15:38 +0000 (09:15 -0600)] 
configs: Resync with savedefconfig

Resync all defconfig files using qconfig.py

Signed-off-by: Tom Rini <trini@konsulko.com>
3 weeks agoMerge tag 'u-boot-dfu-20251107' of https://source.denx.de/u-boot/custodians/u-boot-dfu
Tom Rini [Fri, 7 Nov 2025 14:56:22 +0000 (08:56 -0600)] 
Merge tag 'u-boot-dfu-20251107' of https://source.denx.de/u-boot/custodians/u-boot-dfu

u-boot-dfu-20251107:

CI: https://source.denx.de/u-boot/custodians/u-boot-dfu/-/pipelines/28223

Android:
* Add bootargs environment to kernel commandline

DFU:
* Support DFU over PCIe in SPL

3 weeks agoMerge tag 'efi-2026-01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Fri, 7 Nov 2025 14:26:59 +0000 (08:26 -0600)] 
Merge tag 'efi-2026-01-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2026-01-rc2

CI: https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/28208

Documentation:

* bootstd: Describe environment variable extension_overlay_addr
  environment and remove extension support from TODO list

EFI:

* Correct the detection of the video mode in the EFI payload app:
  - Use struct efi_gop_mode_info in the definition of struct
    efi_entry_gopmode.
  - In function get_mode_from_entry() use the correct type for the video
    mode structure.
* Use a valid error code as return value in efi_store_memory_map().
* Avoid a memory leak for the variable name in efi_bl_create_block_device().
* Correct the code indentation in efi_uc_stop().
* Correct the description of struct efi_priv.
* Fix typos in code comments.

Other:

* qfw: Add more fields and a heading to qfw list
* Fix the support for ACPI pass-through on ARM and RISC-V:
  Avoid zeroing out the XSDT address
* test: provide unit test for 'acpi list' command

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# gpg: Signature made Fri 07 Nov 2025 12:21:45 AM CST
# gpg:                using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg:                 aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg:          There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7  6D33 C481 DBBC 2C05 1AC4

3 weeks agoMerge tag 'mmc-master-2025-11-07' of https://source.denx.de/u-boot/custodians/u-boot-mmc
Tom Rini [Fri, 7 Nov 2025 14:26:10 +0000 (08:26 -0600)] 
Merge tag 'mmc-master-2025-11-07' of https://source.denx.de/u-boot/custodians/u-boot-mmc

CI: https://source.denx.de/u-boot/custodians/u-boot-mmc/-/pipelines/28218

- Disabling FMP on Exynos850 to make eMMC functional when U-Boot is
  executed during USB boot
- Drop extra included errno.h

3 weeks agospl: mmc: avoid including errno.h twice
Heinrich Schuchardt [Wed, 5 Nov 2025 00:13:51 +0000 (01:13 +0100)] 
spl: mmc: avoid including errno.h twice

Each include should only be included once.

Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: exynos_dw_mmc: Disable FMP for Exynos850 chip
Sam Protsenko [Sun, 26 Oct 2025 01:06:58 +0000 (20:06 -0500)] 
mmc: exynos_dw_mmc: Disable FMP for Exynos850 chip

Add DWMCI_QUIRK_DISABLE_FMP flag to Exynos850 driver data to make the
driver disable FMP in case of Exynos850 chip. That makes eMMC on
Exynos850 functional when U-Boot is executed during USB boot.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: exynos_dw_mmc: Add exynos850 compatible
Sam Protsenko [Sun, 26 Oct 2025 01:06:57 +0000 (20:06 -0500)] 
mmc: exynos_dw_mmc: Add exynos850 compatible

Up until now "samsung,exynos7-dw-mshc-smu" compatible was used for
Exynos850 SoC, as it's present in its device tree. But Exynos850 device
tree also supports "samsung,exynos850-dw-mshc-smu" compatible string.
Add it in compatible ID list in the driver so that it can be matched
against this string for Exynos850 device tree.

No functional change, as the driver data is just a copy of
"samsung,exynos7-dw-mshc-smu" data for now.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: exynos_dw_mmc: Add quirk for disabling FMP
Sam Protsenko [Sun, 26 Oct 2025 01:06:56 +0000 (20:06 -0500)] 
mmc: exynos_dw_mmc: Add quirk for disabling FMP

Add DWMCI_QUIRK_DISABLE_FMP which disables Flash Memory Protector (FMP)
during driver's init. It's usually done by early bootloaders, but in
some cases (like USB boot) the FMP may be left unconfigured. The issue
was observed on Exynos850 SoC (the E850-96 board). Enabling this quirk
makes eMMC functional even in such cases.

No functional change, as this feature is only added here but not enabled
for any chips yet.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: exynos_dw_mmc: Improve coding style
Sam Protsenko [Sun, 26 Oct 2025 01:06:55 +0000 (20:06 -0500)] 
mmc: exynos_dw_mmc: Improve coding style

Exynos DW MMC glue layer driver have seen a lot of changes recently.
Stabilize the coding style.

No functional change.

Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: dw_mmc: Do not export dwmci_send_cmd() and dwmci_set_ios()
Sam Protsenko [Sun, 26 Oct 2025 01:06:54 +0000 (20:06 -0500)] 
mmc: dw_mmc: Do not export dwmci_send_cmd() and dwmci_set_ios()

Do not over-expose the private dw_mmc API. The glue layer drivers at
this point shouldn't be aware and shouldn't use the generic
dwmci_send_cmd() and dwmci_set_ios() functions. Making those functions
public causes a "leaky abstraction" issue. It clutters the public
interface of generic dw_mmc driver and possibly leads to improper usage
of those functions, so it's a bad design.

If struct dm_dwmci_ops has to be extended, do so by copying it first
(like it's done for example in snps_dw_mmc driver). That also makes sure
the future changes to struct dm_dwmci_ops in dw_mmc driver will be
automatically reflected in all extended copies, and avoid code
duplication.

This effectively reverts commit ef3b16bb8e73 ("mmc: dw_mmc: export
dwmci_send_cmd() and dwmci_set_ios()").

No functional change.

Fixes: ef3b16bb8e73 ("mmc: dw_mmc: export dwmci_send_cmd() and dwmci_set_ios()")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agommc: exynos_dw_mmc: Extend dm_dwmci_ops without code duplication
Sam Protsenko [Sun, 26 Oct 2025 01:06:53 +0000 (20:06 -0500)] 
mmc: exynos_dw_mmc: Extend dm_dwmci_ops without code duplication

Instead of extending dm_dwmci_ops by copy-pasting the structure code
first, copy the actual structure data with memcpy() and then set the
.execute_tuning field. Now if struct dm_dwmci_ops gets modified in
future, these changes will be automatically reflected in struct
exynos_dwmmc_ops, which prevents possible issues in future. It also
avoids code duplication.

No functional change, but it can prevent possible isssues in future.

Fixes: eda4bd29929c ("mmc: exynos_dw_mmc: add support for MMC HS200 and HS400 modes")
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org>
Reviewed-by: Anand Moon <linux.amoon@gmail.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
3 weeks agospl: remove redundant prints in boot_from_devices
Anshul Dalal [Fri, 31 Oct 2025 07:46:26 +0000 (13:16 +0530)] 
spl: remove redundant prints in boot_from_devices

The null check for loader in boot_from_devices was moved earlier in the
code path by the commit ae409a84e7bff ("spl: NULL check variable before
dereference"), therefore the subsequent null checks for loader are not
necessary.

This patch removes those checks and refactors the prints to be more
useful in case of errors.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoMerge patch series "Allow falcon boot from R5 SPL on TI's AM62 devices"
Tom Rini [Thu, 6 Nov 2025 23:41:28 +0000 (17:41 -0600)] 
Merge patch series "Allow falcon boot from R5 SPL on TI's AM62 devices"

Anshul Dalal <anshuld@ti.com> says:

This patch set adds support for falcon boot on AM62a, 62p and 62x by bypassing
A53 SPL and U-boot.

Existing Boot flow:
R5 SPL -> ATF -> A53 SPL -> U-Boot -> Linux Kernel

Updated flow:
R5 SPL -> ATF -> Linux Kernel

U-Boot's falcon mode expects the jump from SPL to kernel to happen on the same
core which is not directly applicable for our heterogeneous platforms since
ATF, OPTEE and other non SPL binaries from tispl.bin should be loaded before the
kernel by the R5 SPL.

So we have to use a different flow to bypass A53 SPL and U-Boot, we first load
the newly added tispl_falcon.bin instead of tispl.bin which lacks u-boot-spl.bin
(A53's SPL) and the corresponding fdt. This sets up dm, tifs, optee and
atf. Once loaded, we load the kernel and the dtb (with fixups) at ATF's
PRELOADED_BL33_BASE and K3_HW_CONFIG_BASE.

NOTE:

Since we're now using the SPL to load the kernel and kernel expects a 2MiB
aligned load address, the existing PRELOADED_BL33_BASE has to be changed for ATF
to 0x82000000 with K3_HW_CONFIG_BASE set to 0x88000000 for the DTB.

Link: https://lore.kernel.org/r/20251031073800.344500-1-anshuld@ti.com
3 weeks agodoc: ti: document R5 falcon mode for AM62 platforms
Anshul Dalal [Fri, 31 Oct 2025 07:37:57 +0000 (13:07 +0530)] 
doc: ti: document R5 falcon mode for AM62 platforms

This patch adds user documentation for R5 falcon mode for AM62
platforms. The main section is added to am62x_sk.rst and other documents
just include the relevant sections. Steps to build falcon support, usage
and the modified R5 memory map have been documented.

Two svg images have also been added for reference, one for the modified
tifalcon.bin and other for the fitImage format specific to R5 falcon
mode.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agomach-k3: r5: common: add bootargs to kernel's dtb
Anshul Dalal [Fri, 31 Oct 2025 07:37:56 +0000 (13:07 +0530)] 
mach-k3: r5: common: add bootargs to kernel's dtb

The bootargs are passed to the kernel in the chosen node, this patch
adds support for populating bootargs in the dtb if missing.

The values for kernel boot params is taken from the env, with 'boot' and
'bootpart' specifying the rootfs for the kernel similar to the
non-falcon boot flow.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agomach-k3: r5: common: add fdt fixups for falcon mode
Anshul Dalal [Fri, 31 Oct 2025 07:37:55 +0000 (13:07 +0530)] 
mach-k3: r5: common: add fdt fixups for falcon mode

This patch adds fdt fixups to the kernel device-tree in R5 falcon mode,
these fixups include fixing up the core-count, reserved-memory etc.

The users can opt out by disabling the respective CONFIG_OF_*_SETUP
config options.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agomach-k3: common: support only MMC in R5 falcon mode
Anshul Dalal [Fri, 31 Oct 2025 07:37:54 +0000 (13:07 +0530)] 
mach-k3: common: support only MMC in R5 falcon mode

To simplify the boot process and prevent the R5 SPL size from growing,
this patch restricts the boot media to load the next stage payload
(tifalcon.bin and kernel FIT) to MMC only.

We select between eMMC/SD by checking "mmcdev" in env to conform with
how U-Boot proper handles loading binaries from MMC1 or MMC2.

Note that tiboot3.bin (the initial bootloader) can be loaded from any
boot mode supported by the ROM since the restriction only applies to
tifalcon.bin and fitImage.

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agomach-k3: common: enable falcon mode from R5 SPL
Anshul Dalal [Fri, 31 Oct 2025 07:37:53 +0000 (13:07 +0530)] 
mach-k3: common: enable falcon mode from R5 SPL

We use the spl_board_prepare_for_boot hook to call k3_r5_falcon_prep
which is ran after tispl is loaded but before jump_to_image.

In k3_r5_falcon_prep, we find the boot media and load the kernel FIT
just as standard secure falcon mode (since spl_start_uboot returns 0
now). Once the kernel and args are loaded.

Now when the flow goes to jump_to_image, we do the regular pre-jump
procedure and jump to TFA which jumps to the kernel directly since we
have already loaded the kernel and dtb at their respective addresses
(PRELOADED_BL33_BASE and K3_HW_CONFIG_BASE).

Overall execution for the R5 SPL after this patch:

  board_init_r
  |-> boot_from_devices
  |   +-> load_image (we load tifalcon.bin here since spl_start_uboot
  |                   returns 1)
  |
  +-> spl_prepare_for_boot
  |   +-> k3_falcon_prep
  |       +-> load_image (we load fitImage here since spl_start_uboot
  |                       returns 0 now)
  |
  +-> jump_to_image

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoconfigs: add falcon mode fragment for k3 devices
Anshul Dalal [Fri, 31 Oct 2025 07:37:52 +0000 (13:07 +0530)] 
configs: add falcon mode fragment for k3 devices

This fragment enables falcon mode for K3 platforms and modifies the
memory map.

To have enough stack and heap space for loading kernel image as
FIT the memory map was modified by expanding stack + heap size, the
PRELOADED_BL33_BASE in TFA has to also be updated to 0x82000000 since
the kernel needs to be loaded at 2MiB aligned address along with
updating K3_HW_CONFIG_BASE to 0x88000000 for the DT passed to kernel.

Modified memory map for R5 SPL (modified addresses marked with *):

0x80000000 +-------------------------------+ Start of DDR
  512KiB   |   TFA reserved memory space   | CONFIG_K3_ATF_LOAD_ADDR*
0x80080000 +-------------------------------+
 31.5MiB   |            Unused             |
0x82000000 +-------------------------------+ PRELOADED_BL33_BASE* in TFA
           |                               | CONFIG_SYS_LOAD_ADDR*
   57MiB   |   Kernel + initramfs Image    | CONFIG_SPL_LOAD_FIT_ADDRESS*
           |                               |
0x85900000 +-------------------------------+
           |                               |
           |  R5 U-Boot SPL Stack + Heap   |
   39MiB   |       (size defined by        |
           |SPL_STACK_R_MALLOC_SIMPLE_LEN*)|
           |                               |
0x88000000 +-------------------------------+ CONFIG_SPL_STACK_R_ADDR*
           |                               | K3_HW_CONFIG_BASE* in TFA
   16MiB   |          Kernel DTB           | CONFIG_SPL_PAYLOAD_ARGS_ADDR*
           |                               |
0x89000000 +-------------------------------+
  331MiB   | Device Manager (DM) Load Addr |
0x9db00000 +-------------------------------+
   12MiB   |          DM Reserved          |
0x9e700000 +-------------------------------+
    1MiB   |            Unused             |
0x9e800000 +-------------------------------+ BL32_BASE in TFA
   24MiB   |             OPTEE             |
0xa0000000 +-------------------------------+ End of DDR (512MiB)

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoarm: k3-binman: add tifalcon.bin for falcon mode
Anshul Dalal [Fri, 31 Oct 2025 07:37:51 +0000 (13:07 +0530)] 
arm: k3-binman: add tifalcon.bin for falcon mode

This patch adds creation of tifalcon.bin for the AM62a, 62p and 62x.

The contents are the same as the existing tispl.bin but A53's SPL and
the FDT have been removed as they are not needed in R5 falcon mode.

This reduces boot time since the payload size is smaller compared to the
regular tispl.bin.

tispl.bin    = TFA + TEE + TIFS-STUB + A53 SPL + FDT
tifalcon.bin = TFA + TEE + TIFS-STUB

Signed-off-by: Anshul Dalal <anshuld@ti.com>
3 weeks agoboot: fix typo in SYS_BOOTM_LEN description
Quentin Schulz [Wed, 29 Oct 2025 11:19:14 +0000 (12:19 +0100)] 
boot: fix typo in SYS_BOOTM_LEN description

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 weeks agoserial: make VPL_DM_SERIAL depend on VPL_DM
Quentin Schulz [Wed, 29 Oct 2025 11:17:43 +0000 (12:17 +0100)] 
serial: make VPL_DM_SERIAL depend on VPL_DM

I have a hunch VPL_DM_SERIAL should not be selectable if VPL isn't set
as implied by the prefix. Additionally, still based on the prefix, I'm
assuming VPL_DM should be a dependency. Since VPL_DM can only be
selectable when VPL is enabled, only depend on VPL_DM.

This mirrors SPL_DM_SERIAL and TPL_DM_SERIAL so seems right to me.

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
3 weeks agoboot: specify SPL_FIT_FULL_CHECK applies to SPL
Quentin Schulz [Wed, 29 Oct 2025 11:08:58 +0000 (12:08 +0100)] 
boot: specify SPL_FIT_FULL_CHECK applies to SPL

SPL_FIT_FULL_CHECK currently shares its description and help text with
FIT_FULL_CHECK which is quite confusing, so let's specify this applies
to SPL.

Fixes: 6f3c2d8aa5e6 ("image: Add an option to do a full check of the FIT")
Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org>
3 weeks agorsa: fix typo in $(PHASE_)RSA_VERIFY_WITH_PKEY help text
Quentin Schulz [Wed, 29 Oct 2025 11:20:27 +0000 (12:20 +0100)] 
rsa: fix typo in $(PHASE_)RSA_VERIFY_WITH_PKEY help text

Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
3 weeks agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Thu, 6 Nov 2025 23:21:46 +0000 (17:21 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

This is mostly R-Car Gen5 drivers for GPIO, pin control, RSwitch3 and
matching PHYs. There is also a few trivial clean ups for arch headers
and configs. Board code, DT and clock are coming in follow up PR.