Jim Wilson [Wed, 28 Feb 2018 18:03:31 +0000 (10:03 -0800)]
IA-64: Fix linker error with --no-keep-memory.
Import patch from mainline:
2018-02-26 Jim Wilson <jimw@sifive.com>
Stephan Schreiber <info@fs-driver.org>
PR 15904
* elfnn-ia64.c (elfNN_ia64_relax_section): After ia64_elf_relax_brl
call, set changed_contents and changed_relocs. Likewise after
successful ia64_elf_relax_br call.
Tamar Christina [Thu, 15 Feb 2018 17:08:14 +0000 (17:08 +0000)]
Fix AArch32 build attributes for Armv8.4-A.
backported from master.
The build attribute number for Armv8.4-A is currently incorrectly set to that of Armv8-M.
This patch fixes that by setting it as part of the Armv8-A family and adds a test for it.
gas/
2018-02-16 Tamar Christina <tamar.christina@arm.com>
Nick Clifton [Thu, 15 Feb 2018 16:21:02 +0000 (16:21 +0000)]
Import patch from mainline to fix a bug that would place executable and non-executables pages in the same segment.
PR 22758
bfd * elf.c (_bfd_elf_map_sections_to_segments): Don't start a new
segment when demand paged with lma on the same page. Test this
before load/non-load, executable/non-executable,
writable/non-writable tests and simplify. Delete bogus relro
condition in writable/non-writable test. Delete outdated
comment. Formatting.
Eric Botcazou [Thu, 15 Feb 2018 14:55:11 +0000 (15:55 +0100)]
PR ld/22832 on SPARC.
The fix for PR ld/22727 on SPARC passed TRUE as the 'create' argument
in the call to bfd_link_hash_lookup. It turns out this was a bad idea
because, if the symbol is created at this point, the link will abort
later in elf_link_output_extsym. This changes the TRUE into a FALSE
and puts an assertion on the result of the call, making it easier to
debug the issue; that's exactly in keeping with what Gold does.
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_check_relocs) <R_SPARC_TLS_GD_CALL>:
Pass FALSE instead of TRUE as 'create' argument to bfd_link_hash_lookup
and assert that the result of the call is not NULL.
Eric Botcazou [Mon, 29 Jan 2018 23:13:51 +0000 (00:13 +0100)]
Fix PR gas/22738 (.dc.a directive has wrong size on SPARC 64-bit).
The .dc.a directive has wrong size (32 bits) on SPARC 64-bit because
the assembler sets the correct BFD architecture only at the very end
of the processing and it's too late for the directive. It's fixed by
defining TARGET_MACH and making it return a sensible default value.
gas/
* config/tc-sparc.h (sparc_mach): Declare.
(TARGET_MACH): Define to above.
* config/tc-sparc.c (sparc_mach): New function.
(sparc_md_end): Minor tweak.
ld/
* testsuite/ld-elf/pr22450.d: Remove reference to SPARC64.
Eric Botcazou [Sat, 10 Feb 2018 01:30:25 +0000 (02:30 +0100)]
Fix GOT relocation overflow on SPARC.
There are 2 failures left in the linker testsuite on SPARC64/Linux and
they are caused by 2 different issues leading to the same end effect:
the overflow of the relocation section for the GOT, i.e. the linker
generates too many dynamic relocations for the GOT wrt the size of the
relocation section, leading to memory corruption and missing relocations
in the final binary.
The first issue was introduced by:
https://sourceware.org/ml/binutils/2017-06/msg00368.html
which makes the linker generate more R_SPARC_RELATIVE relocations for
the GOT without adjusting the size of the relocation section. This is
fixed by (1) preventively adjusting this size in allocate_dynrelocs and
(2) generating R_SPARC_NONE if needed when R_SPARC_GOTDATA_OP is relaxed.
The second issue is that we generate a GOT relocation for an undefined
weak symbol with non-default visibility in a PIC binary without accounting
for that in the size of the relocation section. Since the address of the
symbol should resolve to 0 at run time, it is fixed by not generating the
relocation at all, i.e. leaving the GOT entry zeroed.
bfd/
* elfxx-sparc.c (UNDEFINED_WEAK_RESOLVED_TO_ZERO): Reorder conditions.
(sparc_elf_append_rela): Assert that there is enough room in section.
(_bfd_sparc_elf_copy_indirect_symbol): Fix formatting.
(_bfd_sparc_elf_adjust_dynamic_symbol): Minor tweak.
(allocate_dynrelocs): Remove outdated comments and reorder conditions.
For a symbol subject to a GOT relocation, reserve a slot in the
relocation section if the symbol isn't dynamic and we are in PIC mode.
(_bfd_sparc_elf_relocate_section) <R_SPARC_GOTDATA_OP>: If relocation
is relaxed and a slot was reserved, generate a R_SPARC_NONE relocation.
<R_SPARC_GOTDATA_OP_HIX22>: Adjust comments.
<R_SPARC_PC10>: Reorder conditions. Remove always-false assertion.
(_bfd_sparc_elf_finish_dynamic_symbol): Rename local_undefweak into
resolved_to_zero. Do not generate a dynamic GOT relocation for an
undefined weak symbol with non-default visibility. Remove superfluous
'else' and fix formatting.
This reverts most of commit d847d5180e.
Left in place are addition of --no-plt-align to some ppc32 ld tests
and the ld.texinfo --no-plt-thread-safe fix.
Renlin Li [Sat, 3 Feb 2018 13:18:17 +0000 (13:18 +0000)]
[PR22764][LD][AARCH64]Allow R_AARCH64_ABS16 and R_AARCH64_ABS32 against absolution symbol or undefine symbol in shared object.
backport from mainline
bfd/
2018-02-05 Renlin Li <renlin.li@arm.com>
PR ld/22764
* elfnn-aarch64.c (elfNN_aarch64_check_relocs): Relax the
R_AARCH64_ABS32 and R_AARCH64_ABS16 for absolute symbol. Apply the
check for writeable section as well.
ld/
2018-02-05 Renlin Li <renlin.li@arm.com>
PR ld/22764
* testsuite/ld-aarch64/emit-relocs-258.s: Define symbol as an address.
* testsuite/ld-aarch64/emit-relocs-259.s: Likewise.
* testsuite/ld-aarch64/aarch64-elf.exp: Run new test.
* testsuite/ld-aarch64/pr22764.s: New.
* testsuite/ld-aarch64/pr22764.d: New.
Nick Clifton [Mon, 5 Feb 2018 09:12:42 +0000 (09:12 +0000)]
Import patch from mainline to remove PROVODE qualifiers around definitions of __CTOR_LIST__ and __DTOR_LIST__ in PE linker scripts.
PR 22762
* scripttempl/pe.sc: Remove PROVIDE()s from __CTOR_LIST__ and
__DTOR_LIST__ symbols. Add a comment explaining why this is
necessary.
* scripttemp/pep.sc: Likewise.
* ld.texinfo (PROVIDE): Add a note about the effect of common
symbols.
Cary Coutant [Sat, 3 Feb 2018 01:44:27 +0000 (17:44 -0800)]
Add support for DWARF-4 line number tables.
Reads the maximum_operations_per_instruction field, added in DWARF-4 to the
line number program header.
gold/
* PR gold/22776
* dwarf_reader.cc (Sized_dwarf_line_info::read_header_prolog): Add
support for DWARF-4 line number tables.
* dwarf_reader.h (Sized_dwarf_line_info::max_ops_per_insn): New field.
Nick Clifton [Sat, 27 Jan 2018 14:53:19 +0000 (14:53 +0000)]
Revert the optimization of the placement of LTO objects as a temporary solution for PR 22751.
PR 22751
Revert this change as a temporary solution for this PR:
2017-09-02 Alan Modra <amodra@gmail.com>
* ldlang.h (lang_input_statement_type): Expand comments.
(LANG_FOR_EACH_INPUT_STATEMENT): Rewrite without casts.
* ldlang.c (lang_for_each_input_file): Likewise.
(load_symbols): Set usrdata for archives.
(find_rescan_insertion): New function.
(lang_process): Trim off and reinsert entries added to file chain
when rescanning archives for LTO.
* ldmain.c (add_archive_element): Set my_archive input_statement
next pointer to last element added.
MIPS/GAS: Correct default ABI selection for `mips64*-ps2-elf*'
Correct an issue with the `mips64*-ps2-elf*' target introduced with
commit e407c74b5b60 ("Support for MIPS R5900 (Sony Playstation 2)"),
<https://sourceware.org/ml/binutils/2012-12/msg00240.html> and make
the n32 ABI the default for GAS, consistently with how BFD and LD
are configured for this target.
gas/
* configure.ac: Also set `mips_default_abi' to N32_ABI for
`mips64*-ps2-elf*'.
* configure: Regenerate.
I haven't analyzed this myself, I'm relying on Nick's excellent
analysis. What I believe is happening is that after some number of
stub sizing iterations, a long-branch stub needs to be converted to a
plt-branch, but either due to stub alignment or other stubs shrinking
in size, the stub group section size doesn't change.
That means we exit from ppc64_elf_size_stubs after sizing with an
incorrect layout, in fact the additional .branch_lt entry overlays
.got! Since .TOC. is normally set to .got + 0x8000 the stub sizing
code decides that entry is within +/-32k of the TOC pointer and so a
three insn stub is sufficient. When we come to build the stubs using
a correct non-overlaying layout, a four insn plt-branch stub is
generated and the stub group size doesn't match that calculated
earlier.
* elf64-ppc.c (ppc64_elf_size_stubs): Iterate sizing when
.branch_lt changes size.
Eric Botcazou [Thu, 25 Jan 2018 11:16:06 +0000 (12:16 +0100)]
Fix PR ld/22727 (TLS breakage in PIC/PIE mode on SPARC).
There are actually 2 different bugs:
1. TLS transition is broken in PIE mode.
2. TLS is broken in PIC/PIE mode when the __tls_get_addr symbol
is versioned (as is the case on Linux and Solaris at least).
The 1st bug is fixed by reverting the problematic change for now
(note that the associated test doesn't pass on SPARC because of another
issue so there is no formal regression in the testsuite). The 2nd bug
is fixed by changing the call to _bfd_generic_link_add_one_symbol
on __tls_get_addr into a mere lookup in _bfd_sparc_elf_check_relocs.
bfd/
* elfxx-sparc.c (_bfd_sparc_elf_check_relocs) <R_SPARC_TLS_GD_CALL>:
Do a mere lookup of the __tls_get_addr symbol instead of adding it.
Revert
2017-10-19 H.J. Lu <hongjiu.lu@intel.com>
PR ld/22263
* elfxx-sparc.c (sparc_elf_tls_transition): Replace
bfd_link_pic with !bfd_link_executable, !bfd_link_pic with
bfd_link_executable for TLS check.
(_bfd_sparc_elf_check_relocs): Likewise.
(allocate_dynrelocs): Likewise.
(_bfd_sparc_elf_relocate_section): Likewise.
ld/
* testsuite/ld-sparc/sparc.exp (32-bit: Helper shared library):
Link with a version script.
(32-bit: TLS -fpie): New test.
(64-bit: Helper shared library): Link with a version script.
(64-bit: TLS -fpie): New test.
(64-bit: GOTDATA relocations): Pass -Av9 to the assembler.
* testsuite/ld-sparc/tlslib.ver: New file.
* testsuite/ld-sparc/tlspie32.dd: Likewise.
* testsuite/ld-sparc/tlspie32.s: Likewise.
* testsuite/ld-sparc/tlspie64.dd: Likewise.
* testsuite/ld-sparc/tlspie64.s: Likewise.
* testsuite/ld-sparc/tlssunbin32.dd: Adjust for versioned symbol.
* testsuite/ld-sparc/tlssunbin32.rd: Likewise.
* testsuite/ld-sparc/tlssunbin32.sd: Likewise.
* testsuite/ld-sparc/tlssunbin64.dd: Likewise.
* testsuite/ld-sparc/tlssunbin64.rd: Likewise.
* testsuite/ld-sparc/tlssunbin64.sd: Likewise.
Franz Sirl [Wed, 24 Jan 2018 13:39:11 +0000 (13:39 +0000)]
Fix printing the size of GOLD's memory areana on Cygwin based systems.
I just stumbled over this with 2.29.1 while building a cross-toolchain, on Cygwin64, but it's still the same for 2.30. m.arena has size_t on Cygwin64 and thus errors out due to -Werror=format.
Alan Modra [Thu, 18 Jan 2018 11:36:40 +0000 (22:06 +1030)]
PowerPC PLT stub alignment fixes
Asking for ppc32 plt call stubs to be aligned at 32 byte boundaries
didn't quite work. For ld.bfd they were spaced 32 bytes apart, but
only started on a 16 byte boundary. ld.gold also didn't get it right.
Finding that bug made me check over the ppc64 plt stub alignment,
where I found that negative values for alignment (meaning align to
minimize boundary crossing) were not accepted. Since no one has
complained about that, I guess I could have removed the feature from
ld.bfd documentation, but I've opted instead to correct the code.
I've also added an optional alignment paramenter for ppc32
--plt-align, for some consistency with gold and ppc64 ld.bfd.
bfd/
* elf32-ppc.c (ppc_elf_create_glink): Correct alignment of .glink.
* elf64-ppc.c (ppc64_elf_size_stubs): Handle negative plt_stub_align.
(ppc64_elf_build_stubs): Likewise.
gold/
* powerpc.cc (param_plt_align): New function supplying default
--plt-align values. Use it..
(Stub_table::plt_call_align): ..here, and..
(Output_data_glink::global_entry_align): ..here.
(Stub_table::stub_align): Correct 32-bit minimum alignment.
ld/
* emultempl/ppc32elf.em: Support optional --plt-align arg.
* emultempl/ppc64elf.em: Support negative --plt-align arg.
Alan Modra [Sat, 13 Jan 2018 08:23:41 +0000 (18:53 +1030)]
PowerPC PLT stub tidy
This is in preparation for the next patch adding Spectre variant 2
mitigation for PowerPC and PowerPC64. Besides tidying code involved
in stub output (to reduce the number of places where bctr is output),
the patch adds some user visible features:
1) PowerPC64 ELFv2 global entry stubs now are aligned under the
control of --plt-align, with a default alignment of 32 bytes.
2) PowerPC64 __glink_PLTresolve is no longer padded out with nops.
3) PowerPC32 PLT stubs are aligned under the control of --plt-align,
with the default alignment being 16 bytes as before.
4) The PowerPC32 branch/nop table emitted before __glink_PLTresolve
is now smaller in many cases. It was sized incorrectly when the
__tls_get_addr_opt stub was used, and unnecessarily included space
for local ifuncs.
bfd/
* elf32-ppc.c (GLINK_ENTRY_SIZE): Add parameters, handle
__tls_get_addr_opt, and alignment sizing.
(TLS_GET_ADDR_GLINK_SIZE): Delete.
(is_nonpic_glink_stub): Don't use GLINK_ENTRY_SIZE.
(ppc_elf_get_synthetic_symtab): Recognize stubs spaced at 4, 6,
or 8 insns.
(ppc_elf_link_hash_table_create): Init new ppc_elf_params field.
(allocate_dynrelocs): Use new GLINK_ENTRY_SIZE.
(ppc_elf_size_dynamic_sections): Likewise. Size branch table
by PLT reloc count.
(write_glink_stub): Handle __tls_get_addr_opt stub.
Pad out to size given by GLINK_ENTRY_SIZE.
(ppc_elf_relocate_section): Adjust write_glink_stub call.
(ppc_elf_finish_dynamic_symbol): Likewise.
(ppc_elf_finish_dynamic_sections): Write PLTresolve without using
insn array since so many need rewriting.
* elf32-ppc.h (struct ppc_elf_params): Add plt_stub_align.
* elf64-ppc.c (GLINK_PLTRESOLVE_SIZE): Rename from
GLINK_CALL_STUB_SIZE. Add htab param and evaluate to size without
nops. Adjust all uses.
(ppc64_elf_get_synthetic_symtab): Don't use GLINK_CALL_STUB_SIZE
in glink_vma calculation.
(struct ppc_link_hash_table): Add global_entry section pointer.
(create_linkage_sections): Create separate section for global
entry stubs.
(PPC_LO, PPC_HI, PPC_HA): Move earlier.
(size_global_entry_stubs): Handle sizing for aligned stubs.
(ppc64_elf_size_dynamic_sections): Handle global_entry alloc,
and don't stash end of glink branch table in rawsize.
(ppc_build_one_stub): Rewrite stub size calculations.
(build_global_entry_stubs): Use new section.
(ppc64_elf_build_stubs): Don't pad __glink_PLTresolve with nops.
Build lazy link stubs out to end of section. Build global entry
stubs in new section.
gold/
* options.h (plt_align): Support for PowerPC32 too.
* powerpc.cc (Stub_table::stub_align): Heed --plt-align for 32-bit.
(Stub_table::plt_call_size, branch_stub_size): Tidy.
(Stub_table::plt_call_align): Implement using stub_align.
(Output_data_glink::global_entry_align): New function.
(Output_data_glink::global_entry_off): New function.
(Output_data_glink::global_entry_address): Use global_entry_off.
(Output_data_glink::pltresolve_size): New function, replacing
pltresolve_size_ constant. Update all uses.
(Output_data_glink::add_global_entry): Align offset.
(Output_data_glink::set_final_data_size): Use global_entry_align.
(Stub_table::do_write): Don't pad __glink_PLTrelsolve with nops.
Tidy stub output. Use global_entry_off.
ld/
* emultempl/ppc32elf.em (params): Init new field.
(enum ppc32_opt): New enum to define OPTION_* values. Add
OPTION_PLT_ALIGN and OPTION_NO_PLT_ALIGN.
(PARSE_AND_LIST_LONGOPTS): Handle new options.
(PARSE_AND_LIST_ARGS_CASES): Likewise.
(PARSE_AND_LIST_OPTIONS): Likewise. Break up help output.
* emultempl/ppc64elf.em (ppc_add_stub_section): Init alignment
correctly for negative --plt-stub-align.
* testsuite/ld-powerpc/elfv2exe.d,
* testsuite/ld-powerpc/elfv2so.d,
* testsuite/ld-powerpc/relbrlt.d,
* testsuite/ld-powerpc/relbrlt.s,
* testsuite/ld-powerpc/tlsexe.d,
* testsuite/ld-powerpc/tlsexe.r,
* testsuite/ld-powerpc/tlsexe32.d,
* testsuite/ld-powerpc/tlsexe32.g,
* testsuite/ld-powerpc/tlsexe32.r,
* testsuite/ld-powerpc/tlsexetoc.d,
* testsuite/ld-powerpc/tlsexetoc.r,
* testsuite/ld-powerpc/tlsopt5_32.d,
* testsuite/ld-powerpc/tlsso.d,
* testsuite/ld-powerpc/tlstocso.d: Update for changed stub order.
Deprecations related to the use of the IT instruction introduced in
Armv8-A do not apply to Armv8-M Baseline and mainline. However the
warning logic do not distinguish between the various profiles and warn
whenever the architecture version is 8.
This patch adds a check to exclude M profile architectures from this
warning. This works as expected when -march is specified on the
command-line or a .arch/.cpu directive exist. However, in autodetection
mode the CPU/architecture targeted is only known once the instructions
have been all processed but this code is run when IT instruction is
processed. It is therefore not possible to distinguish between Armv8-M
and Armv8-A in that mode.
The approach chosen here is not to warn in autodetection mode. The udf.d
testcase that relied on that behavior to test deprecation warning for
Armv8-A is therefore updated to explicitely pass -march=armv8-a.
2018-01-16 Thomas Preud'homme <thomas.preudhomme@arm.com>
Backport from mainline
2018-01-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
gas/
* config/tc-arm.c (it_fsm_post_encode): Do not warn if targeting M
profile architecture or if in autodetection mode. Clarify that
deprecation is for performance reason and concerns Armv8-A and Armv8-R.
* testsuite/gas/arm/armv8-ar-bad.l: Adapt to new IT deprecation warning
message.
* testsuite/gas/arm/armv8-ar-it-bad.l: Likewise.
* testsuite/gas/arm/sp-pc-validations-bad-t-v8a.l: Likewise.
* testsuite/gas/arm/udf.l: Likewise.
* testsuite/gas/arm/udf.d: Assemble for Armv8-A explicitely.
Cary Coutant [Mon, 15 Jan 2018 18:05:54 +0000 (10:05 -0800)]
Fix -fuse-ld option to accept string argument.
PR 22042 complained that garbage text was being printed in the help
for the -fuse-ld option; this was caused by passing an empty string
to the gettext() function, which sometimes returns garbage when passed
an empty string. The quick fix was to replace "" with NULL as the helparg,
but that changed the parsing of the option, as gold uses the helparg to
determine whether an option takes an argument. This patch adds a
non-empty helparg string to fix both problems.
projects / thirdparty / binutils-gdb.git / log
