]> git.ipfire.org Git - thirdparty/qemu.git/log
thirdparty/qemu.git
6 weeks agoscripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field
Thomas Huth [Tue, 29 Apr 2025 15:21:39 +0000 (17:21 +0200)] 
scripts/vmstate-static-checker.py: Allow new name for ghes_addr_le field

ghes_addr_le has been renamed to hw_error_le in commit 652f6d86cbb
("acpi/ghes: better name the offset of the hardware error firmware").
Adjust the checker script to allow that changed field name.

Signed-off-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Link: https://lore.kernel.org/r/20250429152141.294380-3-thuth@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
6 weeks agomigration/rdma: Remove qemu_rdma_broken_ipv6_kernel
Jack Wang [Wed, 2 Apr 2025 05:13:06 +0000 (07:13 +0200)] 
migration/rdma: Remove qemu_rdma_broken_ipv6_kernel

I hit following error which testing migration in pure RoCE env:
"-incoming rdma:[::]:8089: RDMA ERROR: You only have RoCE / iWARP devices in your
systems and your management software has specified '[::]', but IPv6 over RoCE /
iWARP is not supported in Linux.#012'."

In our setup, we use rdma bind on ipv6 on target host, while connect from source
with ipv4, remove the qemu_rdma_broken_ipv6_kernel, migration just work
fine.

Checking the git history, the function was added since introducing of
rdma migration, which is more than 10 years ago. linux-rdma has
improved support on RoCE/iWARP for ipv6 over past years. There are a few fixes
back in 2016 seems related to the issue, eg:
aeb76df46d11 ("IB/core: Set routable RoCE gid type for ipv4/ipv6 networks")

other fixes back in 2018, eg:
052eac6eeb56 RDMA/cma: Update RoCE multicast routines to use net namespace
8d20a1f0ecd5 RDMA/cma: Fix rdma_cm raw IB path setting for RoCE
9327c7afdce3 RDMA/cma: Provide a function to set RoCE path record L2 parameters
5c181bda77f4 RDMA/cma: Set default GID type as RoCE when resolving RoCE route
3c7f67d1880d IB/cma: Fix default RoCE type setting
be1d325a3358 IB/core: Set RoCEv2 MGID according to spec
63a5f483af0e IB/cma: Set default gid type to RoCEv2

So remove the outdated function and it's usage.

Cc: Peter Xu <peterx@redhat.com>
Cc: Li Zhijian <lizhijian@fujitsu.com>
Cc: Yu Zhang <yu.zhang@ionos.com>
Cc: Fabiano Rosas <farosas@suse.de>
Cc: qemu-devel@nongnu.org
Cc: linux-rdma@vger.kernel.org
Cc: michael@flatgalaxy.com
Signed-off-by: Jack Wang <jinpu.wang@ionos.com>
Tested-by: Li zhijian <lizhijian@fujitsu.com>
Reviewed-by: Michael Galaxy <mrgalaxy@nvidia.com>
Link: https://lore.kernel.org/r/20250402051306.6509-1-jinpu.wang@ionos.com
[peterx: some cosmetic changes]
Signed-off-by: Peter Xu <peterx@redhat.com>
6 weeks agomigration/postcopy: Spatial locality page hint for preempt mode
Peter Xu [Thu, 24 Apr 2025 22:07:05 +0000 (18:07 -0400)] 
migration/postcopy: Spatial locality page hint for preempt mode

The preempt mode postcopy has been introduced for a while.  From latency
POV, it should always win the vanilla postcopy.

However there's one thing missing when preempt mode is enabled right now,
which is the spatial locality hint when there're page requests from the
destination side.

In vanilla postcopy, as long as a page request was unqueued, it will update
the PSS of the precopy background stream, so that after a page request the
background thread will move the pages after whatever was requested.  It's
pretty much a natural behavior when there's only one channel anyway, and
one scanner to send the pages.

Preempt mode didn't follow that, because preempt mode has its own channel
and its own PSS (which doesn't linearly scan the guest memory, but
dedicated to resolve page requested from destination).  So the page request
process and the background migration process are completely separate.

This patch adds the hint explicitly for preempt mode.  With that, whenever
the preempt mode receives a page request on the source, it will service the
remote page fault in the return path, then it'll provide a hint to the
background thread so that we'll start sending the pages right after the
requested ones in the background, assuming the follow up pages have a
higher chance to be accessed later.

NOTE: since the background migration thread and return path thread run
completely concurrently, it doesn't always mean the hint will be applied
every single time.  For example, it's possible that the return path thread
receives multiple page requests in a row without the background thread
getting the chance to consume one.  In such case, the preempt thread only
provide the hint if the previous hint has been consumed.  After all,
there's no point queuing hints when we only have one linear scanner.

This could measureably improve the simple sequential memory access pattern
during postcopy (when preempt is on).  For random accesses, I can measure a
slight increase of remote page fault latency from ~500us -> ~600us, that
could be a trade-off to have such hint mechanism, and after all that's
still greatly improved comparing to vanilla postcopy on random (~10ms).

The patch is verified by our QE team in a video streaming test case, to
reduce the pause of the video from ~1min to a few seconds when switching
over to postcopy with preempt mode.

Reported-by: Xiaohui Li <xiaohli@redhat.com>
Tested-by: Xiaohui Li <xiaohli@redhat.com>
Reviewed-by: Juraj Marcin <jmarcin@redhat.com>
Link: https://lore.kernel.org/r/20250424220705.195544-1-peterx@redhat.com
Signed-off-by: Peter Xu <peterx@redhat.com>
6 weeks agotests/qtest/migration: consolidate set capabilities
Prasad Pandit [Fri, 11 Apr 2025 11:45:33 +0000 (17:15 +0530)] 
tests/qtest/migration: consolidate set capabilities

Migration capabilities are set in multiple '.start_hook'
functions for various tests. Instead, consolidate setting
capabilities in 'migrate_start_set_capabilities()' function
which is called from the 'migrate_start()' function.
While simplifying the capabilities setting, it helps
to declutter the qtest sources.

Suggested-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-7-ppandit@redhat.com>
[fix open brace]
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration/ram: Implement save_postcopy_prepare()
Peter Xu [Fri, 11 Apr 2025 11:45:31 +0000 (17:15 +0530)] 
migration/ram: Implement save_postcopy_prepare()

Implement save_postcopy_prepare(), preparing for the enablement
of both multifd and postcopy.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-5-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: Add save_postcopy_prepare() savevm handler
Peter Xu [Fri, 11 Apr 2025 11:45:30 +0000 (17:15 +0530)] 
migration: Add save_postcopy_prepare() savevm handler

Add a savevm handler for a module to opt-in sending extra sections right
before postcopy starts, and before VM is stopped.

RAM will start to use this new savevm handler in the next patch to do flush
and sync for multifd pages.

Note that we choose to do it before VM stopped because the current only
potential user is not sensitive to VM status, so doing it before VM is
stopped is preferred to enlarge any postcopy downtime.

It is still a bit unfortunate that we need to introduce such a new savevm
handler just for the only use case, however it's so far the cleanest.

Signed-off-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-4-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: refactor channel discovery mechanism
Prasad Pandit [Fri, 11 Apr 2025 11:45:29 +0000 (17:15 +0530)] 
migration: refactor channel discovery mechanism

The various logical migration channels don't have a
standardized way of advertising themselves and their
connections may be seen out of order by the migration
destination. When a new connection arrives, the incoming
migration currently make use of heuristics to determine
which channel it belongs to.

The next few patches will need to change how the multifd
and postcopy capabilities interact and that affects the
channel discovery heuristic.

Refactor the channel discovery heuristic to make it less
opaque and simplify the subsequent patches.

Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250411114534.3370816-3-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration/multifd: move macros to multifd header
Prasad Pandit [Fri, 11 Apr 2025 11:45:28 +0000 (17:15 +0530)] 
migration/multifd: move macros to multifd header

Move MULTIFD_ macros to the header file so that
they are accessible from other source files.

Reviewed-by: Fabiano Rosas <farosas@suse.de>
Signed-off-by: Prasad Pandit <pjp@fedoraproject.org>
Reviewed-by: Peter Xu <peterx@redhat.com>
Message-ID: <20250411114534.3370816-2-ppandit@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: Fix latent bug in migrate_params_test_apply()
Markus Armbruster [Mon, 7 Apr 2025 07:28:33 +0000 (09:28 +0200)] 
migration: Fix latent bug in migrate_params_test_apply()

migrate_params_test_apply() neglects to apply tls_authz.  Currently
harmless, because migrate_params_check() doesn't care.  Fix it anyway.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Reviewed-by: Fabiano Rosas <farosas@suse.de>
Message-ID: <20250407072833.2118928-1-armbru@redhat.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: Add qtest for migration over RDMA
Li Zhijian [Tue, 11 Mar 2025 02:42:21 +0000 (10:42 +0800)] 
migration: Add qtest for migration over RDMA

This qtest requires there is a RDMA(RoCE) link in the host.
In order to make the test work smoothly, introduce a
scripts/rdma-migration-helper.sh to detect existing RoCE link before
running the test.

Test will be skipped if there is no available RoCE link.
 # Start of rdma tests
 # Running /x86_64/migration/precopy/rdma/plain
 ok 1 /x86_64/migration/precopy/rdma/plain # SKIP No rdma link available
 # To enable the test:
 # Run 'scripts/rdma-migration-helper.sh setup' with root to setup a new rdma/rxe link and rerun the test
 # Optional: run 'scripts/rdma-migration-helper.sh clean' to revert the 'setup'

 # End of rdma tests

Cc: Philippe Mathieu-Daudé <philmd@linaro.org>
Cc: Stefan Hajnoczi <stefanha@gmail.com>
Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250311024221.363421-1-lizhijian@fujitsu.com>
[add 'head -1' to script, reformat test message]
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: Unfold control_save_page()
Li Zhijian [Wed, 5 Mar 2025 06:28:24 +0000 (14:28 +0800)] 
migration: Unfold control_save_page()

control_save_page() is for RDMA only, unfold it to make the code more
clear.
In addition:
 - Similar to other branches style in ram_save_target_page(), involve RDMA
   only if the condition 'migrate_rdma()' is true.
 - Further simplify the code by removing the RAM_SAVE_CONTROL_NOT_SUPP.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-6-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration/rdma: Remove redundant migration_in_postcopy checks
Li Zhijian [Wed, 5 Mar 2025 06:28:23 +0000 (14:28 +0800)] 
migration/rdma: Remove redundant migration_in_postcopy checks

Since we have disabled RDMA + postcopy, it's safe to remove
the migration_in_postcopy() that follows the migrate_rdma().

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-5-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: disable RDMA + postcopy-ram
Li Zhijian [Wed, 5 Mar 2025 06:28:22 +0000 (14:28 +0800)] 
migration: disable RDMA + postcopy-ram

It's believed that RDMA + postcopy-ram has been broken for a while.
Rather than spending time re-enabling it, let's simply disable it as a
trade-off.

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-4-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agomigration: check RDMA and capabilities are compatible on both sides
Li Zhijian [Wed, 5 Mar 2025 06:28:21 +0000 (14:28 +0800)] 
migration: check RDMA and capabilities are compatible on both sides

Depending on the order of starting RDMA and setting capability,
they can be categorized into the following scenarios:
Source:
 S1: [set capabilities] -> [Start RDMA outgoing]
Destination:
 D1: [set capabilities] -> [Start RDMA incoming]
 D2: [Start RDMA incoming] -> [set capabilities]

Previously, compatibility between RDMA and capabilities was verified only
in scenario D1, potentially causing migration failures in other situations.

For scenarios S1 and D1, we can seamlessly incorporate
migration_transport_compatible() to address compatibility between
channels and capabilities vs transport.

For scenario D2, ensure compatibility within migrate_caps_check().

Reviewed-by: Peter Xu <peterx@redhat.com>
Signed-off-by: Li Zhijian <lizhijian@fujitsu.com>
Message-ID: <20250305062825.772629-3-lizhijian@fujitsu.com>
Signed-off-by: Fabiano Rosas <farosas@suse.de>
6 weeks agoMerge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging
Stefan Hajnoczi [Wed, 30 Apr 2025 17:34:43 +0000 (13:34 -0400)] 
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging

Pull request

Kevin's fix for the divide-by-zero in my recent discard commit, triggered when
a host block device does not support discard.

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# gpg:                using RSA key 8695A8BFD3F97CDAAC35775A9CA4ABB381AB73C8
# gpg: Good signature from "Stefan Hajnoczi <stefanha@redhat.com>" [ultimate]
# gpg:                 aka "Stefan Hajnoczi <stefanha@gmail.com>" [ultimate]
# Primary key fingerprint: 8695 A8BF D3F9 7CDA AC35  775A 9CA4 ABB3 81AB 73C8

* tag 'block-pull-request' of https://gitlab.com/stefanha/qemu:
  file-posix: Fix crash on discard_granularity == 0

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
6 weeks agoMerge tag 'pull-tcg-20250429' of https://gitlab.com/rth7680/qemu into staging
Stefan Hajnoczi [Wed, 30 Apr 2025 17:34:35 +0000 (13:34 -0400)] 
Merge tag 'pull-tcg-20250429' of https://gitlab.com/rth7680/qemu into staging

Convert TCG backend code generators to TCGOutOp structures,
decomposing the monolithic tcg_out_op functions.

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* tag 'pull-tcg-20250429' of https://gitlab.com/rth7680/qemu: (161 commits)
  tcg/sparc64: Implement CTPOP
  tcg/sparc64: Unexport use_vis3_instructions
  tcg: Remove tcg_out_op
  tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}
  tcg: Convert qemu_ld{2} to TCGOutOpLoad{2}
  tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
  tcg: Remove INDEX_op_qemu_st8_*
  tcg: Stash MemOp size in TCGOP_FLAGS
  tcg: Merge INDEX_op_st*_{i32,i64}
  tcg: Convert st to TCGOutOpStore
  tcg: Merge INDEX_op_ld*_{i32,i64}
  tcg: Convert ld to TCGOutOpLoad
  tcg: Formalize tcg_out_goto_ptr
  tcg: Formalize tcg_out_br
  tcg: Formalize tcg_out_mb
  tcg: Remove add2/sub2 opcodes
  tcg/tci: Implement add/sub carry opcodes
  tcg/sparc64: Implement add/sub carry opcodes
  tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc
  tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE
  ...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
6 weeks agofile-posix: Fix crash on discard_granularity == 0
Kevin Wolf [Tue, 29 Apr 2025 15:56:54 +0000 (17:56 +0200)] 
file-posix: Fix crash on discard_granularity == 0

Block devices that don't support discard have a discard_granularity of
0. Currently, this results in a division by zero when we try to make
sure that it's a multiple of request_alignment. Only try to update
bs->bl.pdiscard_alignment when we got a non-zero discard_granularity
from sysfs.

Fixes: f605796aae4 ('file-posix: probe discard alignment on Linux block devices')
Signed-off-by: Kevin Wolf <kwolf@redhat.com>
Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Reviewed-by: Eric Blake <eblake@redhat.com>
Message-ID: <20250429155654.102735-1-kwolf@redhat.com>
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
6 weeks agotcg/sparc64: Implement CTPOP
Richard Henderson [Fri, 25 Apr 2025 19:57:11 +0000 (12:57 -0700)] 
tcg/sparc64: Implement CTPOP

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/sparc64: Unexport use_vis3_instructions
Richard Henderson [Fri, 25 Apr 2025 18:59:58 +0000 (11:59 -0700)] 
tcg/sparc64: Unexport use_vis3_instructions

This variable is no longer used outside tcg-target.c.inc.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Remove tcg_out_op
Richard Henderson [Sun, 16 Feb 2025 22:22:48 +0000 (14:22 -0800)] 
tcg: Remove tcg_out_op

All integer opcodes are now converted to TCGOutOp.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert qemu_st{2} to TCGOutOpLdSt{2}
Richard Henderson [Sun, 16 Feb 2025 22:02:00 +0000 (14:02 -0800)] 
tcg: Convert qemu_st{2} to TCGOutOpLdSt{2}

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert qemu_ld{2} to TCGOutOpLoad{2}
Richard Henderson [Tue, 11 Feb 2025 21:41:42 +0000 (13:41 -0800)] 
tcg: Convert qemu_ld{2} to TCGOutOpLoad{2}

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}
Richard Henderson [Sun, 9 Feb 2025 20:55:15 +0000 (12:55 -0800)] 
tcg: Merge INDEX_op_{ld,st}_{i32,i64,i128}

Merge into INDEX_op_{ld,st,ld2,st2}, where "2" indicates that two
inputs or outputs are required. This simplifies the processing of
i64/i128 depending on host word size.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Remove INDEX_op_qemu_st8_*
Richard Henderson [Mon, 27 Jan 2025 01:34:19 +0000 (17:34 -0800)] 
tcg: Remove INDEX_op_qemu_st8_*

The i386 backend can now check TCGOP_FLAGS to select
the correct set of constraints.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Stash MemOp size in TCGOP_FLAGS
Richard Henderson [Thu, 23 Jan 2025 17:46:57 +0000 (09:46 -0800)] 
tcg: Stash MemOp size in TCGOP_FLAGS

This will enable removing INDEX_op_qemu_st8_*_i32,
by exposing the operand size to constraint selection.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_st*_{i32,i64}
Richard Henderson [Wed, 22 Jan 2025 21:28:55 +0000 (13:28 -0800)] 
tcg: Merge INDEX_op_st*_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert st to TCGOutOpStore
Richard Henderson [Wed, 22 Jan 2025 20:49:41 +0000 (12:49 -0800)] 
tcg: Convert st to TCGOutOpStore

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_ld*_{i32,i64}
Richard Henderson [Wed, 22 Jan 2025 05:47:16 +0000 (21:47 -0800)] 
tcg: Merge INDEX_op_ld*_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert ld to TCGOutOpLoad
Richard Henderson [Wed, 22 Jan 2025 04:44:42 +0000 (20:44 -0800)] 
tcg: Convert ld to TCGOutOpLoad

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Formalize tcg_out_goto_ptr
Richard Henderson [Tue, 21 Jan 2025 05:57:32 +0000 (21:57 -0800)] 
tcg: Formalize tcg_out_goto_ptr

Split these functions out from tcg_out_op.
Define outop_goto_ptr generically.
Call tcg_out_goto_ptr from tcg_reg_alloc_op.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Formalize tcg_out_br
Richard Henderson [Tue, 21 Jan 2025 05:17:07 +0000 (21:17 -0800)] 
tcg: Formalize tcg_out_br

Split these functions out from tcg_out_op.
Call it directly from tcg_gen_code.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Formalize tcg_out_mb
Richard Henderson [Tue, 21 Jan 2025 04:47:42 +0000 (20:47 -0800)] 
tcg: Formalize tcg_out_mb

Most tcg backends already have a function for this;
the rest can split one out from tcg_out_op.
Call it directly from tcg_gen_code.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Remove add2/sub2 opcodes
Richard Henderson [Tue, 21 Jan 2025 04:15:31 +0000 (20:15 -0800)] 
tcg: Remove add2/sub2 opcodes

All uses have been replaced by add/sub carry opcodes.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/tci: Implement add/sub carry opcodes
Richard Henderson [Tue, 21 Jan 2025 03:46:04 +0000 (19:46 -0800)] 
tcg/tci: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/sparc64: Implement add/sub carry opcodes
Richard Henderson [Tue, 21 Jan 2025 02:48:06 +0000 (18:48 -0800)] 
tcg/sparc64: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc
Richard Henderson [Tue, 21 Jan 2025 00:34:47 +0000 (16:34 -0800)] 
tcg/sparc64: Hoist tcg_cond_to_bcond lookup out of tcg_out_movcc

Pass the sparc COND_* value not the tcg TCG_COND_* value.
This makes the usage within add2/sub2 clearer.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE
Richard Henderson [Sun, 19 Jan 2025 18:01:18 +0000 (10:01 -0800)] 
tcg/s390x: Use ADD LOGICAL WITH SIGNED IMMEDIATE

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/s390x: Implement add/sub carry opcodes
Richard Henderson [Sun, 19 Jan 2025 17:31:26 +0000 (09:31 -0800)] 
tcg/s390x: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/s390x: Add TCG_CT_CONST_N32
Richard Henderson [Sat, 18 Jan 2025 22:01:12 +0000 (14:01 -0800)] 
tcg/s390x: Add TCG_CT_CONST_N32

We were using S32 | U32 for add2/sub2.  But the ALGFI and SLGFI
insns that implement this both have uint32_t immediates.
This makes the composite range balanced and
enables use of -0xffffffff ... -0x80000001.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/s390x: Honor carry_live in tcg_out_movi
Richard Henderson [Sat, 18 Jan 2025 21:26:43 +0000 (13:26 -0800)] 
tcg/s390x: Honor carry_live in tcg_out_movi

Do not clobber flags if they're live.  Required in order
to perform register allocation on add/sub carry opcodes.
LA and AGHI are the same size, so use LA unconditionally.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/ppc: Implement add/sub carry opcodes
Richard Henderson [Sat, 18 Jan 2025 00:38:13 +0000 (00:38 +0000)] 
tcg/ppc: Implement add/sub carry opcodes

Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/arm: Implement add/sub carry opcodes
Richard Henderson [Wed, 15 Jan 2025 23:35:53 +0000 (23:35 +0000)] 
tcg/arm: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/aarch64: Implement add/sub carry opcodes
Richard Henderson [Wed, 15 Jan 2025 10:41:58 +0000 (02:41 -0800)] 
tcg/aarch64: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/tricore: Use tcg_gen_addcio_i32 for gen_addc_CC
Richard Henderson [Sat, 18 Jan 2025 10:08:55 +0000 (02:08 -0800)] 
target/tricore: Use tcg_gen_addcio_i32 for gen_addc_CC

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int
Richard Henderson [Sat, 18 Jan 2025 10:05:19 +0000 (02:05 -0800)] 
target/sparc: Use tcg_gen_addcio_tl for gen_op_addcc_int

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/sh4: Use tcg_gen_addcio_i32 for addc
Richard Henderson [Sat, 18 Jan 2025 10:03:03 +0000 (02:03 -0800)] 
target/sh4: Use tcg_gen_addcio_i32 for addc

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/s390x: Use tcg_gen_addcio_i64 for op_addc64
Richard Henderson [Sat, 18 Jan 2025 09:59:12 +0000 (01:59 -0800)] 
target/s390x: Use tcg_gen_addcio_i64 for op_addc64

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/ppc: Use tcg_gen_addcio_tl for ADD and SUBF
Richard Henderson [Sat, 18 Jan 2025 09:55:11 +0000 (01:55 -0800)] 
target/ppc: Use tcg_gen_addcio_tl for ADD and SUBF

Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/openrisc: Use tcg_gen_addcio_* for ADDC
Richard Henderson [Sat, 18 Jan 2025 09:50:50 +0000 (01:50 -0800)] 
target/openrisc: Use tcg_gen_addcio_* for ADDC

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/microblaze: Use tcg_gen_addcio_i32
Richard Henderson [Sat, 18 Jan 2025 09:47:53 +0000 (01:47 -0800)] 
target/microblaze: Use tcg_gen_addcio_i32

Use this in gen_addc and gen_rsubc, both of which need
add with carry-in and carry-out.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/hppa: Use tcg_gen_addcio_i64
Richard Henderson [Sat, 18 Jan 2025 09:35:49 +0000 (01:35 -0800)] 
target/hppa: Use tcg_gen_addcio_i64

Use this in do_add, do_sub, and do_ds, all of which need
add with carry-in and carry-out.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotarget/arm: Use tcg_gen_addcio_* for ADCS
Richard Henderson [Sat, 18 Jan 2025 09:27:41 +0000 (01:27 -0800)] 
target/arm: Use tcg_gen_addcio_* for ADCS

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Add tcg_gen_addcio_{i32,i64,tl}
Richard Henderson [Sat, 18 Jan 2025 09:19:51 +0000 (01:19 -0800)] 
tcg: Add tcg_gen_addcio_{i32,i64,tl}

Create a function for performing an add with carry-in
and producing carry out.  The carry-out result is boolean.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/i386: Special case addci r, 0, 0
Richard Henderson [Sat, 18 Jan 2025 06:39:14 +0000 (22:39 -0800)] 
tcg/i386: Special case addci r, 0, 0

Using addci with two zeros as input in order to capture the value
of the carry-in bit is common.  Special case this with sbb+neg so
that we do not have to load 0 into a register first.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/i386: Implement add/sub carry opcodes
Richard Henderson [Sat, 18 Jan 2025 06:24:56 +0000 (22:24 -0800)] 
tcg/i386: Implement add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/i386: Honor carry_live in tcg_out_movi
Richard Henderson [Sat, 18 Jan 2025 06:05:48 +0000 (22:05 -0800)] 
tcg/i386: Honor carry_live in tcg_out_movi

Do not clobber flags if they're live.  Required in order
to perform register allocation on add/sub carry opcodes.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Use sub carry opcodes to expand sub2
Richard Henderson [Wed, 15 Jan 2025 02:58:05 +0000 (18:58 -0800)] 
tcg: Use sub carry opcodes to expand sub2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Use add carry opcodes to expand add2
Richard Henderson [Tue, 14 Jan 2025 07:29:42 +0000 (23:29 -0800)] 
tcg: Use add carry opcodes to expand add2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/optimize: With two const operands, prefer 0 in arg1
Richard Henderson [Wed, 15 Jan 2025 07:08:24 +0000 (23:08 -0800)] 
tcg/optimize: With two const operands, prefer 0 in arg1

For most binary operands, two const operands fold.
However, the add/sub carry opcodes have a third input.
Prefer "reg, zero, const" since many risc hosts have a
zero register that can fit a "reg, reg, const" insn format.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/optimize: Handle add/sub with carry opcodes
Richard Henderson [Wed, 15 Jan 2025 02:28:15 +0000 (18:28 -0800)] 
tcg/optimize: Handle add/sub with carry opcodes

Propagate known carry when possible, and simplify the opcodes
to not require carry-in when known.  The result will be cleaned
up further by the subsequent liveness analysis pass.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Add TCGOutOp structures for add/sub carry opcodes
Richard Henderson [Wed, 15 Jan 2025 07:27:53 +0000 (23:27 -0800)] 
tcg: Add TCGOutOp structures for add/sub carry opcodes

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Add add/sub with carry opcodes and infrastructure
Richard Henderson [Tue, 14 Jan 2025 21:58:39 +0000 (13:58 -0800)] 
tcg: Add add/sub with carry opcodes and infrastructure

Liveness needs to track carry-live state in order to
determine if the (hidden) output of the opcode is used.
Code generation needs to track carry-live state in order
to avoid clobbering cpu flags when loading constants.

So far, output routines and backends are unchanged.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Sink def, nb_iargs, nb_oargs loads in liveness_pass_1
Richard Henderson [Tue, 14 Jan 2025 21:12:35 +0000 (13:12 -0800)] 
tcg: Sink def, nb_iargs, nb_oargs loads in liveness_pass_1

Sink the sets of the def, nb_iargs, nb_oargs variables to
the default and do_not_remove labels.  They're not really
needed beforehand, and it avoids preceding code from having
to keep them up-to-date.  Note that def had *not* been kept
up-to-date; thankfully only def->flags had been used and
those bits were constant between opcode changes.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Move i into each for loop in liveness_pass_1
Richard Henderson [Tue, 14 Jan 2025 21:04:15 +0000 (13:04 -0800)] 
tcg: Move i into each for loop in liveness_pass_1

Use per-loop variables instead of one 'i' for the function.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/riscv: Drop support for add2/sub2
Richard Henderson [Tue, 14 Jan 2025 05:24:25 +0000 (21:24 -0800)] 
tcg/riscv: Drop support for add2/sub2

We now produce exactly the same code via generic expansion.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/mips: Drop support for add2/sub2
Richard Henderson [Tue, 14 Jan 2025 05:16:40 +0000 (21:16 -0800)] 
tcg/mips: Drop support for add2/sub2

We now produce exactly the same code via generic expansion.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Do not default add2/sub2_i32 for 32-bit hosts
Richard Henderson [Tue, 14 Jan 2025 05:13:54 +0000 (21:13 -0800)] 
tcg: Do not default add2/sub2_i32 for 32-bit hosts

Require TCG_TARGET_HAS_{add2,sub2}_i32 be defined,
one way or another.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Expand fallback sub2 with 32-bit operations
Richard Henderson [Tue, 14 Jan 2025 04:21:09 +0000 (20:21 -0800)] 
tcg: Expand fallback sub2 with 32-bit operations

No need to expand to i64 to perform the subtract.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Expand fallback add2 with 32-bit operations
Richard Henderson [Tue, 14 Jan 2025 04:14:09 +0000 (20:14 -0800)] 
tcg: Expand fallback add2 with 32-bit operations

No need to expand to i64 to perform the add.
This is smaller on a loongarch64 host, e.g.

bstrpick_d  r28, r27, 31, 0
bstrpick_d  r29, r24, 31, 0
add_d       r28, r28, r29
addi_w      r29, r28, 0
srai_d      r28, r28, 32
  ---
add_w       r28, r27, r24
sltu        r29, r28, r24

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_extract2_{i32,i64}
Richard Henderson [Mon, 13 Jan 2025 05:40:43 +0000 (21:40 -0800)] 
tcg: Merge INDEX_op_extract2_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert extract2 to TCGOutOpExtract2
Richard Henderson [Mon, 13 Jan 2025 05:30:10 +0000 (21:30 -0800)] 
tcg: Convert extract2 to TCGOutOpExtract2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_deposit_{i32,i64}
Richard Henderson [Mon, 13 Jan 2025 04:48:57 +0000 (20:48 -0800)] 
tcg: Merge INDEX_op_deposit_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/aarch64: Improve deposit
Richard Henderson [Mon, 13 Jan 2025 04:42:13 +0000 (20:42 -0800)] 
tcg/aarch64: Improve deposit

Use ANDI for deposit 0 into a register.
Use UBFIZ, aka UBFM, for deposit register into 0.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert deposit to TCGOutOpDeposit
Richard Henderson [Mon, 13 Jan 2025 04:29:41 +0000 (20:29 -0800)] 
tcg: Convert deposit to TCGOutOpDeposit

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert extrh_i64_i32 to TCGOutOpUnary
Richard Henderson [Sun, 12 Jan 2025 21:37:28 +0000 (13:37 -0800)] 
tcg: Convert extrh_i64_i32 to TCGOutOpUnary

At the same time, make extrh_i64_i32 mandatory.  This closes a hole
in which move arguments could be cast between TCGv_i32 and TCGv_i64.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert extrl_i64_i32 to TCGOutOpUnary
Richard Henderson [Sun, 12 Jan 2025 20:57:13 +0000 (12:57 -0800)] 
tcg: Convert extrl_i64_i32 to TCGOutOpUnary

Drop the cast from TCGv_i64 to TCGv_i32 in tcg_gen_extrl_i64_i32
an emit extrl_i64_i32 unconditionally.  Move that special case
to tcg_gen_code when we find out if the output is live or dead.
In this way even hosts that canonicalize truncations can make
use of a store directly from the 64-bit host register.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert extu_i32_i64 to TCGOutOpUnary
Richard Henderson [Sun, 12 Jan 2025 20:34:45 +0000 (12:34 -0800)] 
tcg: Convert extu_i32_i64 to TCGOutOpUnary

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert ext_i32_i64 to TCGOutOpUnary
Richard Henderson [Sun, 12 Jan 2025 20:22:45 +0000 (12:22 -0800)] 
tcg: Convert ext_i32_i64 to TCGOutOpUnary

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_sextract_{i32,i64}
Richard Henderson [Sun, 12 Jan 2025 19:50:09 +0000 (11:50 -0800)] 
tcg: Merge INDEX_op_sextract_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert sextract to TCGOutOpExtract
Richard Henderson [Sun, 12 Jan 2025 19:44:30 +0000 (11:44 -0800)] 
tcg: Convert sextract to TCGOutOpExtract

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_extract_{i32,i64}
Richard Henderson [Sat, 11 Jan 2025 17:01:46 +0000 (09:01 -0800)] 
tcg: Merge INDEX_op_extract_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert extract to TCGOutOpExtract
Richard Henderson [Sat, 11 Jan 2025 15:55:47 +0000 (07:55 -0800)] 
tcg: Convert extract to TCGOutOpExtract

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64
Richard Henderson [Sat, 11 Jan 2025 05:54:44 +0000 (21:54 -0800)] 
tcg: Rename INDEX_op_bswap64_i64 to INDEX_op_bswap64

Even though bswap64 can only be used with TCG_TYPE_I64,
rename the opcode to maintain uniformity.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert bswap64 to TCGOutOpUnary
Richard Henderson [Sat, 11 Jan 2025 05:46:38 +0000 (21:46 -0800)] 
tcg: Convert bswap64 to TCGOutOpUnary

Use TCGOutOpUnary instead of TCGOutOpBswap because the
flags are not used with this opcode; they are merely
present for uniformity with the smaller bswaps.

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_bswap32_{i32,i64}
Richard Henderson [Sat, 11 Jan 2025 03:53:51 +0000 (19:53 -0800)] 
tcg: Merge INDEX_op_bswap32_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert bswap32 to TCGOutOpBswap
Richard Henderson [Sat, 11 Jan 2025 03:49:20 +0000 (19:49 -0800)] 
tcg: Convert bswap32 to TCGOutOpBswap

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_bswap16_{i32,i64}
Richard Henderson [Sat, 11 Jan 2025 02:51:16 +0000 (18:51 -0800)] 
tcg: Merge INDEX_op_bswap16_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert bswap16 to TCGOutOpBswap
Richard Henderson [Sat, 11 Jan 2025 02:32:08 +0000 (18:32 -0800)] 
tcg: Convert bswap16 to TCGOutOpBswap

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert setcond2_i32 to TCGOutOpSetcond2
Richard Henderson [Sat, 11 Jan 2025 00:57:07 +0000 (16:57 -0800)] 
tcg: Convert setcond2_i32 to TCGOutOpSetcond2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert brcond2_i32 to TCGOutOpBrcond2
Richard Henderson [Fri, 10 Jan 2025 23:51:26 +0000 (15:51 -0800)] 
tcg: Convert brcond2_i32 to TCGOutOpBrcond2

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/ppc: Expand arguments to tcg_out_cmp2
Richard Henderson [Sat, 11 Jan 2025 00:41:26 +0000 (16:41 -0800)] 
tcg/ppc: Expand arguments to tcg_out_cmp2

Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/arm: Expand arguments to tcg_out_cmp2
Richard Henderson [Fri, 10 Jan 2025 22:52:41 +0000 (14:52 -0800)] 
tcg/arm: Expand arguments to tcg_out_cmp2

Pass explicit arguments instead of arrays.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg/ppc: Drop fallback constant loading in tcg_out_cmp
Richard Henderson [Fri, 10 Jan 2025 21:52:49 +0000 (13:52 -0800)] 
tcg/ppc: Drop fallback constant loading in tcg_out_cmp

Use U and C constraints for brcond2 and setcond2, so that tcg_out_cmp2
automatically passes in-range constants to tcg_out_cmp.

Tested-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Nicholas Piggin <npiggin@gmail.com>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_movcond_{i32,i64}
Richard Henderson [Fri, 10 Jan 2025 21:41:25 +0000 (13:41 -0800)] 
tcg: Merge INDEX_op_movcond_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert movcond to TCGOutOpMovcond
Richard Henderson [Fri, 10 Jan 2025 21:29:39 +0000 (13:29 -0800)] 
tcg: Convert movcond to TCGOutOpMovcond

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_brcond_{i32,i64}
Richard Henderson [Fri, 10 Jan 2025 19:49:22 +0000 (11:49 -0800)] 
tcg: Merge INDEX_op_brcond_{i32,i64}

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert brcond to TCGOutOpBrcond
Richard Henderson [Fri, 10 Jan 2025 19:40:06 +0000 (11:40 -0800)] 
tcg: Convert brcond to TCGOutOpBrcond

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Merge INDEX_op_{neg}setcond_{i32,i64}`
Richard Henderson [Fri, 10 Jan 2025 17:26:44 +0000 (09:26 -0800)] 
tcg: Merge INDEX_op_{neg}setcond_{i32,i64}`

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Convert setcond, negsetcond to TCGOutOpSetcond
Richard Henderson [Fri, 10 Jan 2025 17:12:06 +0000 (09:12 -0800)] 
tcg: Convert setcond, negsetcond to TCGOutOpSetcond

Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
6 weeks agotcg: Remove TCG_TARGET_HAS_negsetcond_{i32,i64}
Richard Henderson [Thu, 9 Jan 2025 20:48:21 +0000 (12:48 -0800)] 
tcg: Remove TCG_TARGET_HAS_negsetcond_{i32,i64}

All targets now provide negsetcond, so remove the conditional.

Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>