rearnsha [Fri, 16 Jun 2017 21:06:14 +0000 (21:06 +0000)]
[arm] Rework multilib support
It looks like the fuchsia port relied on inheriting the multilib rules from
the bare-metal port (the t-arm-elf makefile fragment), but that has now been
rewritten on the assuption that the base architecture is ARMv4t; fuchsia
has a base architecture of ARMv7-a.
To account for this, I've cloned the original t-arm-elf rules into a
new makefile fragment t-fuchsia and arranged for that to be used when
targetting this system.
* config/arm/t-fuchsia: New file.
* config.gcc (arm*-*-fuchsia*): Use it.
rearnsha [Fri, 16 Jun 2017 21:06:07 +0000 (21:06 +0000)]
[arm] Rework multlib builds for symbianelf
Symbianelf used to build multilib for armv5t with softfp, but that
architecture doesn't really support floating point instructions. This
patch reworks the multilib configuration to use armv5te as the base
when building for floating point.
I'm not sure just how useful the symbian port is these days, so this
has only been very lightly tested (checks that libgcc builds for all
multilib variants). Perhaps we should consider deprecating this
config?
* config/arm/t-symbian: Rewrite for new option infrastructure.
rearnsha [Fri, 16 Jun 2017 21:06:01 +0000 (21:06 +0000)]
[arm] reset all multilib variables
NB. This configuration does not build in GCC-7 and doesn't build now either.
This patch resets a couple of multlib variables which previously were
not cleared.
It almost certainly needs further work to make it use the new option
framework correctly, but since the library configurations are already
clearly wrong, it's not clear what the changes need to be. In
particular it tries to build a hard-float library for ARM7TDMI in both
ARM and thumb modes, but ARMv4t does not support any floating-point
instructions; furthermore, GCC has never supported a hard-float thumb1
library.
rearnsha [Fri, 16 Jun 2017 21:05:46 +0000 (21:05 +0000)]
[arm] Update t-rtems for new option framework
[This patch has only been fairly lightly tested (I've built a compiler
with all the relevant multilibs and smoke-tested a few combinations to
check that the tools still produce a sensible object file).]
This patch updates the RTEMS build to use the new option framework.
It tries as far as possible to keep the existing supported options,
but there are two necessary changes and one cleanup. I've also
restructed the file slightly to make it slightly easier (IMO) to
understand.
Necessary changes:
1: ARMv4t does not support a hard-float ABI, the earliest supported
architecture with floating-point support is ARMv5te, so I've rebased
the original fpu/hard libraries to that revision of the architecture.
2: Similarly, the earliest version of the -m profile to support
hardware floating-point is armv7e-m (not armv7-m), so the base
architecture for m-profile with FP has been correspondingly updated.
Clean-up:
1: For greater consistency I've changed the
-mcpu=cortex-m7/-mfpu=fpv5-d16/-mhard-float to
-march=armv7e-m+fp.dp/-mhard-float. The built-in -mcpu rewrite rules
take care of mapping the existing option sets onto the architecture
string to ensure compatibility.
Since the existing rule set does not contain any MULTILIB_REUSE rules,
I have not added any here this time around, but it would be worth the
maintainers of this file considering whether adding some rules would
make their toolchain more friendly to users.
Finally, I've added lines to reset all the multilib variables at the
head of the file. I found during testing that some definitions from
t-arm-elf were leaking through and causing unexpected behviour.
* config/arm/t-rtems: Rewrite for new option framework.
rearnsha [Fri, 16 Jun 2017 21:05:35 +0000 (21:05 +0000)]
[arm] Rewrite t-rmprofile multilib specification
This is the R- & M-profile equivalent of the previous A-profile
multilib rewrite. Additionally this patch adds some top-level rules
to help find suitable multilibs for general cases when certain
libraries are not built, or when building for legacy cores.
gcc:
* config/arm/t-aprofile (v7_a_nosimd_variants, v7_a_simd_variants)
(v7ve_nosimd_variatns, v7ve_vfpv3_simd_variants)
(v7ve_vfpv4_simd_variants, v8_a_nosimd_variants, v8_a_simd_variants)
(v8_1_a_simd_variants, v8_2_a_simd_variants): Move to ...
* config/arm/t-multilib: ... here.
(MULTILIB_OPTIONS): Add armv7 and armv7+fp architectures.
(MULTILIB_MATCHES): Use armv7 libraries for armv7-r. Also use for
armv7-a and armv8*-a when A-profile libraries have not been built.
* config/arm/t-rmprofile: Rewrite.
gcc/testsuite:
* gcc.target/arm/multilib.exp (rmprofile): New tests when rm-profile
multilibs have been built.
rearnsha [Fri, 16 Jun 2017 21:05:26 +0000 (21:05 +0000)]
[arm] Use -march=armv7-a+fp when testing hard-float
Some tests explicitly test with -march=armv7-a and -mfloat-abi=hard.
However, with the new -mfpu=auto code, this architectural specifiction
lacks any floating-point capabilities. To rectify this, change the
architecture to armv7-a+fp.
gcc/testsuite:
* gcc.dg/pr59418.c: On ARM, change architecture to armv7-a+fp.
* gcc.target/arm/pr51915.c: Likewise.
* gcc.target/arm/pr52006.c: Likewise.
* gcc.target/arm/pr53187.c: Likewise.
rearnsha [Fri, 16 Jun 2017 21:05:08 +0000 (21:05 +0000)]
[arm] Allow explicit periods to be escaped in
The MULTILIB_REUSE mapping rules are built up using periods to
represent the placement of '=' signs in the command line syntax. This
presents a problem if the option contains an explicit period because
that is translated unconditionally. The result is that it is not
currently possible to write a reuse rule that would match the
ARMv8-M mainline architecture:
-march=armv8-m.main
To fix this, this patch allows an explicit period to be escaped by writing
\. and by then preserving the period into the generated multilib header.
* genmultilib (multilib_reuse): Allow an explicit period to be escaped
with a backslash. Remove the backslash after substituting unescaped
periods.
* doc/fragments.texi (MULTILIB_REUSE): Document it.
rearnsha [Fri, 16 Jun 2017 21:04:52 +0000 (21:04 +0000)]
[arm] Explicitly set .fpu in cmse_nonsecure_call.S
This file is missing a .fpu directive and was relying on the compiler
driver passing through a -mfpu= command line option. When the FPU is
auto, that will not be passed through correctly, so set something
suitable within the file itself.
libgcc:
* config/arm/cmse_nonsecure_call.S: Explicitly set the FPU.
rearnsha [Fri, 16 Jun 2017 21:04:41 +0000 (21:04 +0000)]
[arm] Rewrite t-aprofile using new selector methodology
Now that the default FPU is 'auto' we can finally rewrite (and
simplify) the rules for mapping compiler options to multilibs. We
no-longer need to know the specific CPU, since the driver will
construct a suitable -march flag for us; this greatly simplifies the
overall logic. This patch rewrites the library list for A-profile
cores. We use various Make extention rules to simplify the logic even
further.
A couple of minor tweaks to the configure script and to the main
driver ensures that we always know the setting of -mfloat-abi and
-marm/-mthumb. Again, this helps simplify the logic further. The
change to arm_target_thumb_only relies on the fact that this routine
is only called if neither -marm nor -mthumb has been previously
selected or specified by the user.
A new testsuite module is added to check the libraries generated. The
new tests are only run if the compiler is configured with the relevant
multilibs enabled.
gcc:
* config.gcc: (arm*-*-*): When building a-profile libraries, force
the driver to pass through the default setting of -mfloat-abi.
* common/config/arm/arm-common.c (arm_target_thumb_only): Return -marm
rather than NULL.
* config/arm/t-multilib (MULTILIB_REUSE): Initialize to empty.
(all_feat_combs): New rule.
(MULTILIB_OPTIONS): Use explicit ARM and Thumb directories. Rework
default libraries.
* config/arm/t-aprofile: Rewrite.
gcc/testsuite:
* gcc.target/arm/multilibs.exp: New file.
rearnsha [Fri, 16 Jun 2017 21:04:23 +0000 (21:04 +0000)]
[arm] Make 'auto' the default FPU selection option.
Finally, we can make 'auto' the default choice for the FPU option. It's
still possible to override this during configure, but we will eventually
deprecate that, moving to the new cpu/architecture selection mechanism.
* config/arm/arm.h (FPUTYPE_AUTO): Define.
* config/arm/arm.c (arm_option_override): Use FPUTYPE_AUTO if the
fpu is not specified by the user/command-line.
* config/arm/bpabi.h (FPUTYPE_DEFAULT): Delete.
* config/arm/netbsd-elf.h (FPUTYPE_DEFAULT): Delete.
* config/arm/linux-elf.h (FPUTYPE_DEFAULT): Delete.
* config/arm/vxworks.h (FPUTYPE_DEFAULT): Delete.
* common/config/arm/arm-common.c (arm_canon_arch_option): Use
FPUTYPE_AUTO insted of FPUTYPE_DEFAULT.
rearnsha [Fri, 16 Jun 2017 21:04:14 +0000 (21:04 +0000)]
[genmultilib] Update basic multilib configuration
The standard arm-eabi configuration comes with a basic set of multilibs that
are suitable mostly for simple testing of the compiler in various
configurations. We try to keep the number of libraries build small so
that build times do not become too onerous.
Using the new auto-fp selection code we can now cover all supported
architectures except for those with single-precision only FP units with
just 4 multilibs. This is done with the rewrite of t-arm-elf. Now that we
canonicalize -mcpu into suitable -march definitions we don't need to match
CPU names to architectures any more; the driver will do this for us.
I also noticed whilst writing this patch that the existing MULTILIB_DEFAULTS
setting in the compiler was causing more problems than it was worth; and
furthermore was simply wrong if the compiler is ever configured with
--with-mode, --with-float or --with-endian. The remaining options also
pertained to pre-eabi builds and aren't interesting today either. It
seemed best to just delete the definition entirely.
rearnsha [Fri, 16 Jun 2017 21:04:07 +0000 (21:04 +0000)]
[arm] Make -mfloat-abi=softfp work when there are no
Before this patch series it wasn't really possible to not have an FPU;
it was always there, even if the hardware didn't really support it.
Now that we have -mfpu=auto, the concept of not having an FPU becomes
real. Consequently, when the -mfloat-abi switch is set to softfp
doing the Right Thing is much more important. In this case we have a
soft-float ABI, but can use FP instructions if they are available.
To support this we have to separate out TARGET_HARD_FLOAT into two
use cases: one where the instructions exist and one when they don't.
We preserve the original meaning of TARGET_HARD_FLOAT (but add an extra
check) of meaning that we are generating HW FP instructions, and add a
new macro for the special case when use of FP instructions is permitted,
but might not be available at this time (the distinction is important
because they might be enabled by an attribute during the compilation).
TARGET_SOFT_FLOAT continues to be the exact inverse of TARGET_HARD_FLOAT,
but we now define it as such.
* config/arm/arm.h (TARGET_HARD_FLOAT): Also check that we
have some floating-point instructions.
(TARGET_SOFT_FLOAT): Define as inverse of TARGET_HARD_FLOAT.
(TARGET_MAYBE_HARD_FLOAT): New macro.
* config/arm/arm-builtins.c (arm_init_builtins): Use
TARGET_MAYBE_HARD_FLOAT.
* config/arm/arm.c (arm_option_override): Use TARGET_HARD_FLOAT_ABI.
rearnsha [Fri, 16 Jun 2017 21:04:02 +0000 (21:04 +0000)]
[arm] Generate a canonical form for -march
This patch uses the driver and some spec rewrite rules to generate a
canonicalized form of the -march= option. We want to do this for
several reasons, all relating to making multi-lib selection sane.
1) It can remove redundant extension options to produce a minimal
list.
2) The general syntax of the option permits a plethora of features,
these are permitted in any order. Canonicalization ensures that there
is a single ordering of the options that are needed.
3) It can use additional options to remove extensions that aren't
relevant, such as removing all features that relate to the FPU when
use of that is disabled.
Once we have this information in a sensible form the multilib rules
can be vastly simplified making for much more understandable Makefile
fragments.
* common/config/arm/arm-common.c: Define INCLUDE_LIST.
(configargs.h): Include it.
(arm_print_hint_for_fpu_option): New function.
(arm_parse_fpu_option): New function.
(candidate_extension): New class.
(arm_canon_for_multilib): New function.
* config/arm/arm.h (CANON_ARCH_SPEC_FUNCTION): New macro.
(EXTRA_SPEC_FUNCTIONS): Add CANON_ARCH_SPEC_FUNCTION.
(ARCH_CANONICAL_SPECS): New macro.
(DRIVER_SELF_SPECS): Add ARCH_CANONICAL_SPECS.
rearnsha [Fri, 16 Jun 2017 21:03:55 +0000 (21:03 +0000)]
[arm] Force a CPU default in the config args defaults
Currently if the user does not specify a default CPU or architecture
the compiler provieds no default values in the spec defaults. We can
try to work from TARGET_CPU_DEFAULT but pulling that into the driver
is a bit crufty and doesn't really work well with the general
spec-processing model. A better way is to ensure that with_cpu is
always set appropirately during configure. To avoid problems with the
multilib fragment processing we defer this until after we have
processed any required fragments before selecting the default.
* config.gcc (arm*-*-*): Ensure both target_cpu_cname and with_cpu
are set after handling multilib fragments. Set target_cpu_default2
from with_cpu.
rearnsha [Fri, 16 Jun 2017 21:03:46 +0000 (21:03 +0000)]
[arm] Allow new extended syntax CPU and architecture
This patch extends support for the new extended-style architecture
strings to configure and the target default options. We validate any
options passed by the user to configure against the permitted
extensions for that CPU or architecture.
* config.gcc (arm*-*-fucshia*): Set target_cpu_cname to the real
cpu name.
(arm*-*-*): Set target_cpu_default2 to a quoted string.
* config/arm/parsecpu.awk (check_cpu): Validate any extension
options.
(check_arch): Likewise.
* config/arm/arm.c (arm_configure_build_target): Handle
TARGET_CPU_DEFAULT being a string constant. Scan any feature
options in the default.
rearnsha [Fri, 16 Jun 2017 21:03:39 +0000 (21:03 +0000)]
[arm] Allow CPU and architecture extensions to be
A follow up patch to this one will start to canonicalize options to
simplify generating multilib fragments. This patch is enabling work
for that. If we have extension options that duplicate other options
(done principally for back-wards compatibility purposes) we need to
ensure that just one of them will be used consistently when generating
a canonical form of the user-specified options. We do this by
explicitly noting when an option is defined as an alias of another.
Another aspect of canonicalization is to enforce a strict order in
which the options are inspected, we do this by ensuring that no later
option examined can be a subset of an earlier option (add and remove
options are treated separtely).
It's practically impossible to check all this in parsecpu.awk since
that premits use of C macros in the ISA features list, so instead we
enforce the ordering with a selftest function in the compiler, which
is only run when self tests are enabled (it's not something that will
change every day, so this should be sufficient).
* config/arm/arm-protos.h (cpu_arch_extension): Add field to record
when an option is an alias of another.
* config/arm/parsecpu.awk (optalias): New parser token.
(gen_comm_data): Mark non-alias options as such. Emit entries
for extension aliases.
* config/arm/arm-cpus.in (armv5e): Make vfpv2 an alias.
(armv5te, armv5tej, armv6, armv6j, armv6k, armv6z): Likewise.
(armv6kz, armv6zk, armv6t2): Likewise.
(armv7): Make vfpv3-d16 an alias.
(armv7-a): Make vfpv3-d16, neon and neon-vfpv3 aliases. Sort in
canonical order.
(armv7ve): Make vfpv4-d16, neon-vfpv3 and neon-vfpv4 aliases.
Sort in canonical order.
(armv8-a): Sort in canonical order.
(armv8.1-a, armv8.2-a): Likewise.
(generic-armv7-a): Make neon and neon-vfpv3 aliases. Sort in
canonical order.
(cortex-a9): Sort in canonical order.
* config/arm/arm.c (selftests.h): Include it.
(arm_test_cpu_arch_data): New function.
(arm_run_self_tests): New function.
(TARGET_RUN_TARGET_SELFTESTS): Redefine.
(targetm): Move declaration to the end of the file.
* arm-cpu-cdata.h: Regenerated.
rearnsha [Fri, 16 Jun 2017 21:03:30 +0000 (21:03 +0000)]
[arm] Use standard option parsing code for detecting
Now that the standard CPU and architecture option parsing code is
available in the driver we can use the main CPU and architecture data
tables for driving the automatic enabling of Thumb code.
Doing this requires that the driver script tell the parser whether or
not the target string is a CPU name or an architecture, but beyond
that it is just standard use of the new capabilities.
We do, however, now get some error checking if the target isn't
recognized, when previously we just ignored unknown targets and hoped
that a later pass would pick up on this.
* config/arm/arm.h (TARGET_MODE_SPECS): Add additional parameter to
call to target_mode_check describing the type of option passed.
* common/config/arm/arm-common.c (arm_arch_core_flag): Delete.
(arm_target_thumb_only): Use arm_parse_arch_option_name or
arm_parse_cpu_option_name to match parameters against list of
available targets.
* config/arm/parsecpu.awk (gen_comm_data): Don't generate
arm_arch_core_flags data structure.
* config/arm/arm-cpu_cdata.h: Regenerated.
rearnsha [Fri, 16 Jun 2017 21:03:17 +0000 (21:03 +0000)]
[arm] Move cpu and architecture option name parsing
This patch has no functional change. The code used for parsing -mcpu,
-mtune and -march options is simply moved from arm.c arm-common.c.
The list of FPU options is also moved. Subsequent patches will make
use of this within the driver.
Some small adjustments are needed as a consequence of moving the
definitions of the data objects to another object file, in that we
no-longer have direct access to the size of the object.
* common/config/arm/arm-common.c (arm_initialize_isa): Moved here from
config/arm/arm.c.
(arm_print_hint_for_cpu_option): Likewise.
(arm_print_hint_for_arch_option): Likewise.
(arm_parse_cpu_option_name): Likewise.
(arm_parse_arch_option_name): Likewise.
* config/arm/arm.c (arm_identify_fpu_from_isa): Use the computed number
of entries in the all_fpus list.
* config/arm/arm-protos.h (all_architectures, all_cores): Declare.
(arm_parse_cpu_option_name): Declare.
(arm_parse_arch_option_name): Declare.
(arm_parse_option_features): Declare.
(arm_intialize_isa): Declare.
* config/arm/parsecpu.awk (gen_data): Move CPU and architecture
data tables to ...
(gen_comm_data): ... here. Make definitions non-static.
* config/arm/arm-cpu-data.h: Regenerated.
* config/arm/arm-cpu-cdata.h: Regenerated.
rearnsha [Fri, 16 Jun 2017 21:03:08 +0000 (21:03 +0000)]
[arm] Split CPU, architecture and tuning data tables.
The driver really needs to handle some canonicalization of the new
-mcpu and -march options in order to make multilib selection
tractable. This will require moving much of the logic to parse the
new options into the common code file. However, the tuning data
definitely does not want to be there as it is very specific to the
compiler passes. To facilitate this we need to split up the generated
configuration data into architectural and tuning related tables.
This patch starts that process, but does not yet move any code out of
the compiler backend. Since I'm reworking all that code I took the
opportunity to also separate out the CPU data tables from the
architecture data tables. Although they are related, there is a lot
of redundancy in the CPU options that is best handled by simply
indirecting to the architecture entry.
* config/arm/arm-protos.h (arm_build_target): Remove arch_core.
(cpu_arch_extension): New structure.
(cpu_arch_option, arch_option, cpu_option): New structures.
* config/arm/parsecpu.awk (gen_headers): Build an enumeration of
architecture types.
(gen_data): Generate new format data tables.
* config/arm/arm.c (cpu_tune): New structure.
(cpu_option, processors): Delete.
(arm_print_hint_for_core_or_arch): Delete. Replace with ...
(arm_print_hint_for_cpu_option): ... this and ...
(arm_print_hint_for_arch_option): ... this.
(arm_parse_arch_cpu_name): Delete. Replace with ...
(arm_parse_cpu_option_name): ... this and ...
(arm_parse_arch_option_name): ... this.
(arm_unrecognized_feature): Change type of target parameter to
cpu_arch_option.
(arm_parse_arch_cpu_features): Delete. Replace with ...
(arm_parse_option_features): ... this.
(arm_configure_build_target): Rework to use new configuration data
tables.
(arm_print_tune_info): Rework for new configuration data tables.
* config/arm/arm-cpu-data.h: Regenerated.
* config/arm/arm-cpu.h: Regenerated.
rearnsha [Fri, 16 Jun 2017 21:02:59 +0000 (21:02 +0000)]
[build] Make sbitmap code available to the driver
The ARM option parsing code uses sbitmap data structures to manage
features and upcoming patches will shortly need to use these bitmaps
within the driver. This patch moves sbitmap.o from OBJS to
OBJS-libcommon to facilitate this.
The patch has no impact on targets that don't need this functionality,
since the object is part of an archive and will only be extracted if
needed.
* Makefile.in (OBJS): Move sbitmap.o from here ...
(OBJS-libcommon): ... to here.
rearnsha [Fri, 16 Jun 2017 21:02:52 +0000 (21:02 +0000)]
[arm] Add default FPUs for CPUs.
This patch adds the default CPUs for each cpu and provides options for
changing the FPU variant when appropriate.
It turns out to be easier to describe removal options using general
mask operations that disable a concept rather than specific bits.
Sometimes the helper definitions for enabling a feature are not excat
duals when it comes to disabling them - for example, +simd forcibly
turns on double-precision capabilities in the FPU, but disabling just
simd (+nosimd) should not forcibly disable that.
* config/arm/arm-isa.h (ISA_ALL_FPU_INTERNAL): Renamed from ISA_ALL_FPU.
(ISA_ALL_CRYPTO): New macro.
(ISA_ALL_SIMD): New macro
(ISA_ALL_FP): New macro.
* config/arm/arm.c (fpu_bitlist): Update initializer.
* config/arm/arm-cpus.in: Use new ISA_ALL macros to disable crypto,
simd or fp.
(arm9e): Add fpu. Add option for nofp
(arm946e-s, arm966e-s, arm968e-s, arm10e, arm1020e, arm1022e): Likewise.
(arm926ej-s, arm1026ej-s): Likewise.
(generic-armv7-a): Add fpu. Add options for simd, vfpv3, vfpv3-d16,
vfpv3-fp16, vfpv3-d16-fp16, vfpv4, vfpv4-d16, neon, neon-vfp3,
neon-fp16, neon-vfpv4, nofp and nosimd.
(cortex-a5, cortex-a7): Add fpu. Add options for nosimd and nofp.
(cortex-a8): Add fpu. Add option for nofp.
(cortex-a9): Add fpu. Add options for nosimd and nofp.
(cortex-a12, cortex-a15, cortex-a17): Add fpu. Add option for nofp.
(cortex-r4f): Add fpu.
(cortex-r5): Add fpu. Add options for nofp.dp and nofp.
(cortex-r7): Use idiv option from architecture. Add fpu. Add option
for nofp.
(cortex-r8): Likewise.
(cortex-m4): Add fpu. Add option for nofp.
(cortex-a15.cortex-a7): Add fpu. Add option for nofp.
(cortex-a17.cortex-a7): Likewise.
(cortex-a32): Add fpu. Add options for crypto and nofp.
(cortex-a35, cortex-a53): Likewise.
(cortex-a57): Add fpu. Add option for crypto.
(cortex-a72, cortex-a73): Likewise.
(exynos-m1): Likewise.
(cortex-a57.cortex-a53, cortex-a72.cortex-a53): Likewise.
(cortex-a73.cortex-a35, cortex-a73.cortex-a53): Likewise.
(cortex-m33): Add fpu. Add option for nofp.
* config/arm/arm-cpu-cdata.h: Regenerated
* config/arm/arm-cpu-data.h: Regenerated.
rearnsha [Fri, 16 Jun 2017 21:02:19 +0000 (21:02 +0000)]
[arm] Add architectural options
This patch adds the currently supported architecture options to the
individual architectures. For floating point and SIMD we only permit
variants that the relevant versions of the architecture permit. We also
add short-hand versions (+fp, +simd, etc) that allows the user to
describe using floating point without having to know the precise version
of the floating point sub-architecture that that architecture requires.
In a small number of cases we need to provide more precise versions of the
floating point architecture. In those cases we permit traditional -mfpu
style names in the architecture description.
rearnsha [Fri, 16 Jun 2017 21:02:10 +0000 (21:02 +0000)]
[arm] Allow +opt on arbitrary cpu and architecture
This is the main patch to provide the infrastructure for adding
feature extensions to CPU and architecture specifications. It does not,
however, add all the extensions that we intend to support (just a small
number to permit some basic testing). Now, instead of having specific
entries in the architecture table for variants such as armv8-a+crc, the
crc extension is specified as an optional component of the armv8-a
architecture entry. Similar control can be added to CPU option names.
In both cases the list of permitted options is controlled by the main
architecture or CPU name to prevent arbitrary cross-products of options.
* config/arm/arm-cpus.in (armv8-a): Add options crc, simd crypto and
nofp.
(armv8-a+crc): Delete.
(armv8.1-a): Add options simd, crypto and nofp.
(armv8.2-a): Add options fp16, simd, crypto and nofp.
(armv8.2-a+fp16): Delete.
(armv8-m.main): Add option dsp.
(armv8-m.main+dsp): Delete.
(cortex-a8): Add fpu. Add nofp option.
(cortex-a9): Add fpu. Add nofp and nosimd options.
* config/arm/parsecpu.awk (gen_data): Generate option tables and
link to main cpu and architecture data structures.
(gen_comm_data): Only put isa attributes from the main architecture
in common tables.
(option): New statement for architecture and CPU entries.
* arm.c (struct cpu_option): New structure.
(struct processors): Add entry for options.
(arm_unrecognized_feature): New function.
(arm_parse_arch_cpu_name): Ignore any characters after the first
'+' character.
(arm_parse_arch_cpu_feature): New function.
(arm_configure_build_target): Separate out any CPU and architecture
features and parse separately. Don't error out if -mfpu=auto is
used with only an architecture string.
(arm_print_asm_arch_directives): New function.
(arm_file_start): Call it.
* config/arm/arm-cpu-cdata.h: Regenerated.
* config/arm/arm-cpu-data.h: Likewise.
* config/arm/arm-tables.opt: Likewise.
rearnsha [Fri, 16 Jun 2017 21:01:51 +0000 (21:01 +0000)]
[arm] Don't pass -mfpu=auto through to the assembler.
The assembler doesn't understand -mfpu=auto. The easiest way to handle this
is to surpress this value from being passed through, while still passing
through legacy values.
* config/arm/elf.h (ASM_SPEC): Only pass -mfpu through to the
assembler when it is not -mfpu=auto.
rearnsha [Fri, 16 Jun 2017 21:01:29 +0000 (21:01 +0000)]
[arm] Rewrite -march and -mcpu options for passing to
The assembler does not understand all the '+' options accepted by the
compiler. The best solution to this is to simply strip the extensions
and just pass the raw architecture or cpu name through to the
assembler. We will use .arch and .arch_extension directives anyway to
turn on or off individual features. We already do something similar
for big.little combinations and this just extends this principle a bit
further. This patch also fixes a possible bug by ensuring that the
limited string copy is correctly NUL-terminated.
While messing with this code I've also taken the opportunity to clean up
the duplicate definitions of EXTRA_SPEC_FUNCTIONS by moving it outside of
the ifdef wrapper.
* config/arm/arm.h (BIG_LITTLE_SPEC): Delete macro.
(ASM_REWRITE_SPEC_FUNCTIONS): New macro.
(BIG_LITTLE_CPU_SPEC_FUNCTIONS): Delete macro.
(ASM_CPU_SPEC): Rewrite.
(MCPU_MTUNE_NATIVE_FUNCTIONS): New macro.
(EXTRA_SPEC_FUNCTIONS): Move outside of ifdef. Use
MCPU_MTUNE_NATIVE_FUNCTIONS and ASM_REWRITE_SPEC_FUNCTIONS. Remove
reference to BIG_LITTLE_CPU_SPEC_FUNCTIONS.
* common/config/arm/arm-common.c (arm_rewrite_selected_cpu): Ensure
copied string is NUL-terminated. Also strip any characters prefixed
by '+'.
(arm_rewrite_selected_arch): New function.
(arm_rewrite_march): New function.
rearnsha [Fri, 16 Jun 2017 21:01:22 +0000 (21:01 +0000)]
[arm] Use strings for -march, -mcpu and -mtune options
In order to support more complex specifications for cpus and architectures
we need to move away from using enumerations to represent the set of
permitted options. This basic change just moves the option parsing
infrastructure over to that, but changes nothing more beyond generating
a hint when the specified option does not match a known target (previously
the help option was able to print out all the permitted values, but we
can no-longer do that.
* config/arm/arm.opt (x_arm_arch_string): New TargetSave option.
(x_arm_cpu_string, x_arm_tune_string): Likewise.
(march, mcpu, mtune): Convert to string-based options.
* config/arm/arm.c (arm_print_hint_for_core_or_arch): New function.
(arm_parse_arch_cpu_name): New function.
(arm_configure_build_target): Use arm_parse_arch_cpu_name to
identify selected architecture or CPU.
(arm_option_save): New function.
(TARGET_OPTION_SAVE): Redefine.
(arm_option_restore): Restore string options.
(arm_option_print): Print string options.
msebor [Fri, 16 Jun 2017 20:52:03 +0000 (20:52 +0000)]
PR tree-optimization/80934 - bzero should be assumed not to escape pointer argument
PR tree-optimization/80933 - redundant bzero/bcopy calls not eliminated
gcc/ChangeLog:
PR tree-optimization/80933
PR tree-optimization/80934
* builtins.c (fold_builtin_3): Do not handle bcmp here.
* gimple-fold.c (gimple_fold_builtin_bcmp): New function.
(gimple_fold_builtin_bcopy, gimple_fold_builtin_bzero): Likewise.
(gimple_fold_builtin): Call them.
jgreenhalgh [Fri, 16 Jun 2017 17:29:56 +0000 (17:29 +0000)]
[Patch ARM] Fix PR71778
gcc/
PR target/71778
* config/arm/arm-builtins.c (arm_expand_builtin_args): Return TARGET
if given a non-constant argument for an intrinsic which requires a
constant.
libcc1/
* libcp1plugin.cc (plugin_build_decl): Adjust parm building.
(--This line, and those below, will be ignored--
M gcc/cp/parser.c
M gcc/cp/ChangeLog
M gcc/cp/decl.c
M gcc/cp/lambda.c
M gcc/cp/cp-tree.h
M gcc/cp/method.c
M gcc/cp/decl2.c
M libcc1/libcp1plugin.cc
M libcc1/ChangeLog
nathan [Fri, 16 Jun 2017 14:16:20 +0000 (14:16 +0000)]
Make rtti lazier
* rtti.c (enum tinfo_kind): Add TK_DERIVED_TYPES,
TK_VMI_CLASS_TYPES, TK_MAX. Delete TK_FIXED.
(tinfo_names): New.
(typeid_ok_p): Add quotes to error messages. Use get_tinfo_desc.
(get_tinfo_decl): Use get_tinfo_desc.
(get_pseudo_ti_init): Likewise. Adjust VMI construction.
(create_pseudo_type_info): Delete.
(get_pseudo_ti_index): Just determine the index.
(get_tinfo_desc): New. Create all types lazily.
(create_tinfo_types): Just allocate the descriptor array.
(emit_support_tinfos): Use non-inserting type lookup. Set builtin
location.
redi [Fri, 16 Jun 2017 11:54:59 +0000 (11:54 +0000)]
PR libstdc++/81092 add std::wstring symbols and bump library version
PR libstdc++/81092
* acinclude.m4: Bump libtool_VERSION.
* config/abi/post/i386-linux-gnu/baseline_symbols.txt: Update.
* config/abi/post/x86_64-linux-gnu/32/baseline_symbols.txt: Update.
* config/abi/pre/gnu.ver: Add wstring constructor symbols to
GLIBCXX_3.4.24 version and move random_device::_M_get_entropy() symbol
to new GLIBCXX_3.4.25 version.
* doc/xml/manual/abi.xml: Document new versions.
* doc/html/*: Regenerate.
* testsuite/21_strings/basic_string/cons/char/8.cc: Use base object
constructors to ensure required symbols are exported.
* testsuite/21_strings/basic_string/cons/wchar_t/8.cc: Likewise.
* testsuite/util/testsuite_abi.cc: Add new version.
mkuvyrkov [Fri, 16 Jun 2017 09:30:43 +0000 (09:30 +0000)]
Add prefetch configuration to aarch64 backend.
* config/aarch64/aarch64-protos.h (struct cpu_prefetch_tune):
New tune structure.
(struct tune_params): Use cpu_prefetch_tune instead of cache_line_size.
[Unrelated to main purpose of the patch] Place the pointer field last
to enable type checking errors when tune structure are wrongly merged.
* config/aarch64/aarch64.c (generic_prefetch_tune,)
(exynosm1_prefetch_tune, qdf24xx_prefetch_tune,)
(thunderx2t99_prefetch_tune): New tune constants.
(tune_params *_tunings): Update all tunings (no functional change).
(aarch64_override_options_internal): Set PARAM_SIMULTANEOUS_PREFETCHES,
PARAM_L1_CACHE_SIZE, PARAM_L1_CACHE_LINE_SIZE, and PARAM_L2_CACHE_SIZE
from tunings structures.
jakub [Fri, 16 Jun 2017 09:13:28 +0000 (09:13 +0000)]
PR sanitizer/81094
* ubsan.c (instrument_null): Add T argument, use it instead
of computing it based on IS_LHS.
(instrument_object_size): Likewise.
(pass_ubsan::execute): Adjust instrument_null and
instrument_object_size callers to pass gimple_get_lhs or
gimple_assign_rhs1 result to it. Use instrument_null instead of
calling get_base_address and instrument_mem_ref. Handle
aggregate call arguments for object-size sanitization.
PR c++/80560
* dumpfile.c (dump_register): Avoid calling memset to initialize
a class with a default ctor.
* gcc.c (struct compiler): Remove const qualification.
* genattrtab.c (gen_insn_reserv): Replace memset with initialization.
* hash-table.h: Ditto.
* ipa-cp.c (allocate_and_init_ipcp_value): Replace memset with
assignment.
* ipa-prop.c (ipa_free_edge_args_substructures): Ditto.
* omp-low.c (lower_omp_ordered_clauses): Replace memset with
default ctor.
* params.h (struct param_info): Make struct members non-const.
* tree-switch-conversion.c (emit_case_bit_tests): Replace memset
with default initialization.
* vec.h (vec_copy_construct, vec_default_construct): New helper
functions.
(vec<T>::copy, vec<T>::splice, vec<T>::reserve): Replace memcpy
with vec_copy_construct.
(vect<T>::quick_grow_cleared): Replace memset with default ctor.
(vect<T>::vec_safe_grow_cleared, vec_safe_grow_cleared): Same.
* doc/invoke.texi (-Wclass-memaccess): Document.
libcpp/ChangeLog:
PR c++/80560
* line-map.c (line_maps::~line_maps): Avoid calling htab_delete
with a null pointer.
(linemap_init): Avoid calling memset on an object of a non-trivial
type.
libitm/ChangeLog:
PR c++/80560
* beginend.cc (GTM::gtm_thread::rollback): Avoid calling memset
on an object of a non-trivial type.
(GTM::gtm_transaction_cp::commit): Use assignment instead of memcpy
to copy an object.
* method-ml.cc (orec_iterator::reinit): Avoid -Wclass-memaccess.
gcc/testsuite/ChangeLog:
PR c++/80560
* g++.dg/Wclass-memaccess.C: New test.
ramana [Thu, 15 Jun 2017 14:17:04 +0000 (14:17 +0000)]
Update comment about is_leaf
crtl->is_leaf has a comment above it referring to "Local Register
Allocation". However this is set by IRA and not LRA since the meaning
of Local Register Allocator in GCC has changed quite drastically since
1999 when this comment was introduced above the variable
current_function_is_leaf. From memory gcc in those days had "local"
and "global" register allocation - however all of this has changed
quite a bit drastically since.
This patch merely updates the comment as I did some head scratching
this morning about how this could be set before Local Register
Allocator especially given the comment in ira.c as below.
/* Determine if the current function is a leaf before running IRA
since this can impact optimizations done by the prologue and
epilogue thus changing register elimination offsets. */
crtl->is_leaf = leaf_function_p ();
nickc [Thu, 15 Jun 2017 13:38:52 +0000 (13:38 +0000)]
Fix problems with the MSP430 port's handling of persistent data.
PR target/78818
gcc * config/msp430/msp430.c (msp430_data_attr): Check that it's possible
for a variable to have a section before checking if the section has a
name.
Set section to.persistent if persistent attribute is set.
Warn if .persistent attribute is used on an automatic variable.
tests * gcc.target/msp430/pr78818-real.c: New template for tests.
* gcc.target/msp430/pr78818-auto.c: New test.
* gcc.target/msp430/pr78818-data-region.c: New test.
* gcc.target/msp430/pr78818-data-sec.c: New test.
* gcc.target/msp430/pr78818-auto-warn.c: New test.
thopre01 [Thu, 15 Jun 2017 09:31:04 +0000 (09:31 +0000)]
[ARM] Make gcc.target/arm/its.c more robust
2017-06-15 Thomas Preud'homme <thomas.preudhomme@arm.com>
gcc/testsuite/
* gcc.target/arm/its.c: Check that no IT blocks has more than 2
instructions in it rather than the number of IT blocks being 2.
Transfer scan directive arm_thumb2 restriction to the whole
testcase and restrict further to Thumb-only targets.
ian [Wed, 14 Jun 2017 23:42:53 +0000 (23:42 +0000)]
compiler: avoid crash on erroneous type
If there is an error constructing the backend type, the GCC backend
will report that the size is 1. That will then cause construction of
the ptrmask to crash. Avoid that case by just generating an empty
ptrmask.
Noticed while compiling a broken package. The policy I've been
following is to not commit a test case for a compiler crash on invalid
code, so no test case.
gcc/testsuite/
* gcc.target/mips/data-sym-jump.c: Adjust for whitespace changes.
* gcc.target/mips/pr51513-1.c: New test.
* gcc.target/mips/pr51513-2.c: New test.
jcmvbkbc [Wed, 14 Jun 2017 17:19:44 +0000 (17:19 +0000)]
gcc: xtensa: allow XCHAL_* macros to be non-constant
XCHAL_* macros from the xtensa-config.h are used in a number of places
that require them to be preprocessor constants. Rewrite these places so
that non-constant XCHAL_* definitions could be used there.
2017-06-14 Max Filippov <jcmvbkbc@gmail.com>
gcc/
* config/xtensa/xtensa.c (xtensa_option_override): Append
MASK_CONST16 to target_flags in the absence of TARGET_L32R.
(hwloop_optimize, hwloop_fail, hwloop_pattern_reg,
xtensa_doloop_hooks): Define unconditionally.
(xtensa_reorg_loops): Only call reorg_loops in the presence of
TARGET_LOOPS.
* config/xtensa/xtensa.h (TARGET_L32R): New definition.
(TARGET_DEFAULT): Remove XCHAL_HAVE_L32R condition and account
for it in xtensa_option_override.
(HARD_FRAME_POINTER_IS_FRAME_POINTER,
HARD_FRAME_POINTER_IS_ARG_POINTER): New definitions.
jsm28 [Wed, 14 Jun 2017 16:05:57 +0000 (16:05 +0000)]
Recognize '-' as special -MF argument (write to stdout)
Sometimes it is useful to generate pre-processed output to a file and
the dependency information to stdout for further analysis/processing.
For example:
g++ -E -MD -fdirectives-only -o test.ii test.cxx
This will generate the dependency information to test.d (as per the
documentation). While changing this behavior is probably unwise, one
traditional (e.g., supported by -o) way to handle this is to recognize
the special '-' file name as an instruction to write to stdout:
wilco [Wed, 14 Jun 2017 14:51:46 +0000 (14:51 +0000)]
Improve Cortex-A53 FP scheduler
The Cortex-A53 scheduler model of FMAC bypass is not quite right
for FMAC to FMAC forwarding. Experiments also show the latencies of
FP operations are too high as well. Rather than adding more bypasses,
adjust the latencies of FP instructions to get a better schedule on
average. As a result SPECFP2006 is 1.1% faster.
ian [Wed, 14 Jun 2017 13:59:02 +0000 (13:59 +0000)]
cmd/cgo: make _cgo_flags consistent across runs
The go tool will pass -I objdir as one of the flags, where objdir is
the temporary build directory. Remove that from _cgo_flags: we don't
need it, and it will be different each time.
Sort the flags to avoid the unpredictable map iteration order.
This matters for gccgo because for a package that uses cgo, the go
tool when building for gccgo will store the _cgo_flags file in the
archive. That means that we want to generate identical _cgo_flags for
every run.
The test for this is the cmd/go testsuite, to follow in a future CL.
ian [Wed, 14 Jun 2017 13:47:28 +0000 (13:47 +0000)]
internal/testenv: support testing gccgo
If GO_TESTING_GOTOOLS is set in the environment, permit tests using
gccgo to run the go tool. Like GO_BUILDER_NAME, this should not be set
normally. But it is needed when testing the go tool itself, and will
be set by the gotools Makefile in a future CL.
rguenth [Wed, 14 Jun 2017 11:40:20 +0000 (11:40 +0000)]
2017-06-14 Richard Biener <rguenther@suse.de>
PR middle-end/81088
* fold-const.c (split_tree): Drop TREE_OVERFLOW flag from
literal constants.
(fold_binary_loc): When associating do not treat pre-existing
TREE_OVERFLOW on literal constants as a reason to allow
TREE_OVERFLOW on associated literal constants.
ebotcazou [Wed, 14 Jun 2017 11:22:19 +0000 (11:22 +0000)]
* config/sparc/sparc.h (MASK_ISA): Add MASK_LEON and MASK_LEON3.
(MASK_FEATURES): New macro.
* config/sparc/sparc.c (sparc_option_override): Remove the special
handling of -mfpu and generalize it to all MASK_FEATURES switches.
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