board: samsung: add support for Samsung Exynos mobile device boards
Add support for a generic platform which intends to support multiple
boards powered by ARMv8 Samsung Exynos SoCs. Some important features
include:
* Fastboot: This is present to provide an open alternative to Samsung's
proprietary Odin protocol. The board file configures certain features
for fastboot, such as a dynamically allocated fastboot buffer, and
standardized (lowercase) partition aliases.
* EFI: Kernel image can be loaded from an EFI partition. This
adopts a standard booting process, which multiple OS distributions
can rely on.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Wed, 19 Nov 2025 14:55:35 +0000 (08:55 -0600)]
s5p4418_nanopi2: Stop disabling device tree relocation
Remove setting of fdt_high to ~0, which disables device tree relocation,
from the default environment. Doing so prevents U-Boot from correcting
problems such as having an unaligned device tree and leads to various
failure modes in the OS.
Signed-off-by: Tom Rini <trini@konsulko.com> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:19 +0000 (17:21 -0600)]
board: samsung: e850-96: Enter DFU automatically on USB boot
Doing USB boot on E850-96 is most useful in two cases:
1. For unbricking the board
2. During the bootloader development
In both cases a U-Boot binary is being re-flashed to eMMC. The most
convenient way to update U-Boot in eMMC is by using DFU. Implement
entering DFU flashing mode automatically when U-Boot is executed on USB
boot. That makes it easier for users to re-flash U-Boot without even
having serial console running, e.g.:
$ ./smdk-usbdl
$ dfu-util -D u-boot.bin -a bootloader
See [1,2] for details.
Entering DFU mode is implemented by setting corresponding environment
variables:
bootcmd="dfu 0 mmc 0"
bootdelay=0
Do not save the U-Boot environment though, to avoid falling through to
DFU mode on a regular eMMC boot.
Sam Protsenko [Tue, 18 Nov 2025 23:21:18 +0000 (17:21 -0600)]
board: samsung: e850-96: Load firmwares over USB on USB boot
During USB boot it's expected that the bootloader (U-Boot) should
download LDFW and TZSW firmware binaries over USB, using corresponding
SMC call. Once it's done, the Boot ROM code can release the USB block,
so that it can be used in U-Boot (e.g. for flashing images to eMMC using
DFU or fastboot). Otherwise USB wouldn't be accessible in U-Boot, and
any attempt to access USB PHY or DWC3 registers will lead to abort.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:17 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routine for loading images over USB
During USB boot U-Boot is supposed to download some firmware over USB.
It's done by EL3 software, so it has to be requested via corresponding
SMC call. Implement a routine for doing that.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:16 +0000 (17:21 -0600)]
board: samsung: e850-96: Split LDFW loading and init
The LDFW firmware loading is done in two steps:
1. Read the firmware binary from some block device
2. Provide it to EL3 monitor software via an SMC call, so it can copy
it to a Secure World memory and start using it
Let's split the load_ldfw() function by two functions correspondingly,
to reflect that process better:
- load_ldfw_from_blk()
- init_ldfw()
It can be useful in case when the LDFW binary should be obtained from
some different media, e.g. downloaded over USB during USB boot.
No functional change.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Sam Protsenko [Tue, 18 Nov 2025 23:21:15 +0000 (17:21 -0600)]
board: samsung: e850-96: Add routines for checking boot dev
Implement functionality to check the current boot device (a device where
the SoC ROM code is loading the bootloaders from). The boot device order
can be changed using the SW1 DIP switch on the E850-96 board (which
controls XOM SoC lines), as stated in [1].
The boot device information is requested from EL3 software using the
corresponding SMC call, which in turn reads it from iRAM memory, which
was written by the ROM code. New routines decode that data and allow the
user to check the current boot device, boot order, etc. That API can be
used further to implement different code flows depending on the current
boot device, e.g.:
- on eMMC boot: obtain the firmware binaries from eMMC
- on USB boot: download the firmware over USB instead
No functional change; this patch only adds new functionality but it's
not used yet.
[1] doc/board/samsung/e850-96.rst
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
gpio: s5p: increment bank base address only if bank is initialized
There is a condition guard which ensures that the GPIO node, indeed
describes a GPIO controller.
if (!fdtdec_get_bool(blob, node, "gpio-controller"))
continue;
Since the bank base is being incremented in the loop, it is done so
irrespective of whether the node is a GPIO controller or not. This leads
to the incorrect resolution of bank base addresses.
Move it out of the loop, and instead increment the bank base address
only if the driver successfully binds a GPIO controller.
Reviewed-by: Henrik Grimler <henrik@grimler.se> Fixes: b8809e60cdb5 ("dm: exynos: gpio: Convert to driver model") Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add the compatible string of Exynos7's PMU as defined in upstream
dt-schema. This also supports derivative PMUs as defined in schema.
There's no additional setup required here, so pmu_init is skipped.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Add the compatible for Exynos8895 UART as described in upstream
devicetree bindings. This enables support for Exynos8895 and other
similar UART devices, such as Exynos7870. Other than that, the driver
works as-is.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Henrik Grimler <henrik@grimler.se> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
pinctrl: exynos78x0: add proper support for exynos7870 pinctrl
The pinctrl blocks for Exynos7870 and Exynos7880 are similar, however in
Exynos7870, the CCORE block is actually referred to as MIF. Since
ordering happens lexically, it isn't directly compatible with
samsung,exynos78x0-pinctrl.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
pinctrl: exynos: bind GPIO driver along with pinctrl
The devicetree of Samsung devices typically have the pin controller and
GPIO bank descriptors under the same pinctrl node. In U-Boot, these are
handled by two separate drivers. It is not possible to invoke both
drivers from a single node compatible.
Bind the GPIO driver on pinctrl driver bind, with the same OF node as
the pinctrl driver. This solution is already being used in other pinctrl
drivers. The hierarchy, as represented in `dm tree`, is as follows:
There may be cases where the flags set for a clock is not available.
This is usually the case with clocks which have been retrieved using
clk_request(). However, clock flags are found in their respective
private clock struct, so use that instead.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Introduce a simple clock driver for Exynos7870's CMU blocks, more
specifically, CMU_MIF, CMU_FSYS, and CMU_PERI banks. This should be
enough to serve U-Boot's minimal requirements.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
clk: exynos: add function for Samsung CMU ops->request
The request function performs a simple check if the clock with the
provided ID is present or not. This is done with a simple call to
clk_get_by_id(). A non-zero return value indicates that the requested
clock is not available.
In some cases, clk->dev points to the clock bank device instead of
the clock device. This pointer is therefore overwritten in order to
reference to the correct device instance.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
PLL1417X seem to be compatible with PLL0822X, as also seen in the
respective Linux kernel driver. Add an enum entry for the type, while
merely being an alias for PLL0822X.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
clk: exynos: add support for fixed rate and fixed factor clocks
Add register functions for fixed rate and fixed factor clock drivers.
The vendor-specific structs defined are borrowed from the CCF driver
found in the Linux kernel.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
clk: exynos: provide device pointer to clk_register_* functions
The device pointer set as NULL causes problems when clock banks depend
on clocks from another clock bank. In such case, the appropriate clock
needs to be resolved from OF phandle arguments, which is not possible if
the associated device is not provided. Make necessary changes to make
the correct device pointer available.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Thu, 6 Nov 2025 23:28:35 +0000 (17:28 -0600)]
Gitlab: Optimize the job dependency list more
In general, we want to fail the whole pipeline as soon as we can if we
spot an error while also letting bigger jobs get started as soon as
possible. Currently we use the "Run binman, buildman, dtoc, Kconfig and
patman testsuites" job from the testsuite stage to unblock the next
stage as this test is complex enough that if it passes, likely the whole
stager will pass. Using this same logic, unblock the world build (and
sjg-lab) stages if "sandbox test.py" has completed as if there's no
failures here, there's likely not failures in the rest of the test.py
stages.
Bin Meng [Wed, 5 Nov 2025 11:07:24 +0000 (19:07 +0800)]
scsi: Fix the name string memory leak during scsi scan
There is a memory leak during the scsi scan process due to the
strdup'ed name string is never freed. Actually it is unnecessary
to pass a strdup'ed name string to blk_create_devicef() as we can
use the name string on the stack directly.
Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
qfw: Fix segfault from uninitialized variables in sandbox
There are cases where qfw_read_entry() does not set the output parameter
passed by address. This occurs with qfw_sandbox_read_entry_dma, which
leaves the size variables uninitialized and causes a segfault when running
bootflow scan in U-Boot sandbox.
$ ./u-boot
...
U-Boot 2026.01-rc1-00199-gc2637036b8f0 (Nov 04 2025 - 10:32:21 +0100)
...
Hit any key to stop autoboot: 0
=> bootflow scan
efi_var_to_file() Cannot persist EFI variables without system partition
efi_tcg2_register() Missing TPMv2 device for EFI_TCG_PROTOCOL
efi_rng_register() Missing RNG device for EFI_RNG_PROTOCOL
scanning bus for devices...
[3] 1015761 segmentation fault (core dumped) ./u-boot
Initalize all these variables to 0 to fix this issue.
- Support scmi v3.2 CONFIG_SET for clock protocol
- A patchset from Marek to optimize the scmi clk booting time
- Fix scmi clk set_parent in non-CCF case
- Drop mmu_set_region_dcache_behaviour in firmware scmi
Tom Rini [Sun, 2 Nov 2025 20:08:12 +0000 (14:08 -0600)]
dm: Remove pre-schema tag support
Support for using "u-boot,dm-..." rather than "bootph-..." has been
deprecated since February 2023. Any platforms using this have had a
console message saying to migrate by 2023.07. Go and remove all support
here now, for the v2026.01 release.
The results of this change that aren't clear from the above are that we
still have a checkpatch.pl error message, and document in
doc/develop/spl.rst that they have been migrated since 2023. We also
change the key2dtsi.py tool to use the correct bootph phase rather than
the legacy phase.
Marek Vasut [Sun, 9 Nov 2025 01:35:09 +0000 (02:35 +0100)]
clk: scmi: Defer issue of SCMI_CLOCK_ATTRIBUTES
Instead of resolving clock control flags using SCMI_CLOCK_ATTRIBUTES
during probe for each and every clock, resolve the clock control
flags using SCMI_CLOCK_ATTRIBUTES when the clock control flags are
first used. Because most clock are never used by U-Boot, this allows
reducing the amount of SCMI_CLOCK_ATTRIBUTES considerably, and this
improve probe time of the scmi clock driver and U-Boot start up time.
On Renesas X5H, with 1700+ SCMI clock, the boot time improved by 1.7s .
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sun, 9 Nov 2025 01:35:08 +0000 (02:35 +0100)]
clk: scmi: Postpone clock name resolution
The clock names are retrived via SCMI_CLOCK_ATTRIBUTES, called for each
clock ID. This may take a lot of time to complete and is not strictly
necessary. Register each clock as "scmi-%zu" instead, and let the first
call of SCMI_CLOCK_ATTRIBUTES fill in the actual clock name.
This has a side effect, which can be considered both an upside and also
a downside. Unused clock are never renamed and retain their placeholder
"scmi-%zu" name, which avoids empty clock names for nameless SCMI clock,
and avoids the name resolution and improves boot time. But for those
SCMI clock which do have name, that name is not listed until the clock
are used.
This is a preparatory patch for deferred issue of SCMI_CLOCK_ATTRIBUTES.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sun, 9 Nov 2025 01:35:06 +0000 (02:35 +0100)]
clk: scmi: Bulk allocate all sub-driver instance data
Allocate all sub-driver instance data at once. The amount of data that
have to be allocated is known up front, so is the size of the data, so
there is no need to call malloc() in a loop, mallocate all data at once.
The upside is, less heap fragmentation and fewer malloc() calls overall,
and a faster boot time.
The downside is, if some of the clock fail to register, then the clock
driver cannot free parts of the bulk allocated sub-driver instance data.
Such a failure can only occur if clk_register() were to fail, and if that
happens, the system has more significant problems. Worse, if a core clock
driver fails to probe, the system has even bigger problem.
Reviewed-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Vinh Nguyen [Wed, 5 Nov 2025 03:42:26 +0000 (04:42 +0100)]
firmware: scmi: Add clock v3.2 CONFIG_SET support
SCMI v3.2 introduces a new clock CONFIG_SET message format that can
optionally carry also OEM specific configuration values beside the usual
clock enable/disable requests. Add support to use such new format when
talking to a v3.2 compliant SCMI platform.
Support existing enable/disable operations across different clock protocol
versions: this patch still does not add protocol operations to support the
new OEM specific optional configuration capabilities.
No functional change for the SCMI drivers users of the related enable and
disable clock operations.
[Marek: Remodel after Linux e49e314a2cf7 ("firmware: arm_scmi: Add clock v3.2 CONFIG_SET support")
Support both old < 2.1 and new >= 2.1 protocol versions.
Update commit message based on Linux one]
Signed-off-by: Vinh Nguyen <vinh.nguyen.xz@renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Alice Guo <alice.guo@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sat, 25 Oct 2025 21:35:09 +0000 (23:35 +0200)]
firmware: scmi: Drop mmu_set_region_dcache_behaviour() misuse
MMU region cache behavior configuration for SCMI/SMT mailboxes is
platform specific. Even on ARM systems, the mailbox memory may not
even be located in any cacheable MMU region and may instead reside
in some SRAM. Remove this non-generic cache behavior configuration
code from generic code path.
It is unlikely that any platform is affected by this change if it
did configure its MMU regions correctly on start up. Platforms
which might be affected are i.MX94/95 and STM32MP.
Fixes: 240720e9052f ("firmware: scmi: mailbox/smt agent device") Fixes: 2a3f161c8b16 ("scmi: correctly configure MMU for SCMI buffer") Fixes: b2ae10970d40 ("firmware: scmi: use PAGE_SIZE alignment for ARM64") Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Tested-by: Alice Guo <alice.guo@nxp.com> Tested-by: Patrice Chotard <patrice.chotard@foss.st.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Tom Rini [Fri, 7 Nov 2025 22:10:49 +0000 (16:10 -0600)]
Merge patch series "Add support for TI AM6254atl SiP"
Anshul Dalal <anshuld@ti.com> says:
This patch series adds support for AM6254atl SiP (or AM62x SiP for
short) to U-Boot.
The OPN (Orderable Part Number) 'AM6254atl' expands as follows[1]:
AM6254atl
||||
|||+-- Feature Lookup (L indicates 512MiB of integrated LPDDR4)
||+--- Device Speed Grade (T indicates 1.25GHz on A53 cores)
|+---- Silicon PG Revision (A indicates SR 1.0)
+----- Core configuration (4 indicates A53's in Quad core config)
AM62x SiP provides the existing AM62x SoC with 512MiB of DDR
integrated in a single packages. The first 4 patches in the series
are cherry-picked from the devicetree-rebasing repository at
'v6.18-rc2-dts'.
Tom Rini [Fri, 7 Nov 2025 22:09:39 +0000 (16:09 -0600)]
Merge patch series "Add PCIe Endpoint controller support for TI J784S4 SoC"
Hrushikesh Salunke <h-salunke@ti.com> says:
This series enables PCIe Endpoint mode on TI's J784S4 SoC. The J784S4
SoC features two Cadence PCIe controller instances (PCIe0 and PCIe1)
that can operate in endpoint mode. This series adds support for
configuring these controllers with up to 4 lanes.
Key changes include:
- Adding a stabilization delay after power domain reset to prevent
timing-related initialization issues
- SERDES mux configuration support for proper lane routing, which is
essential for SoCs where SERDES lanes are shared between multiple
controllers (PCIe, USB, etc.) with different configurations across
boot phases
- J784S4 SoC endpoint configuration with 4-lane support
- Disabling unconfigured endpoint functions to prevent enumeration
issues on the Root Complex side
This series has been tested on J784S4 EVM with PCIe endpoint boot
configuration. Following are the corresponding test logs.
Tom Rini [Fri, 7 Nov 2025 22:08:37 +0000 (16:08 -0600)]
Merge patch series "board: ti: am62x: Add EEPROM support and refactor board detection"
Guillaume La Roque (TI.com) <glaroque@baylibre.com> says:
This series adds EEPROM board detection support for AM62x and refactors
the board detection code across AM6x family boards to eliminate code
duplication.
The series introduces two new generic functions for AM6x boards:
- do_board_detect_am6(): Reads the on-board EEPROM with fallback logic
to alternate I2C addresses
- setup_serial_am6(): Sets up the serial number environment variable
from EEPROM data
This patch series adds basic support for the boards based on Airoha
EN7523/EN7529/EN7562 SoCs. Due to ATF restrictions these boards are
able to run 32-bit OS only.
This patch series adds support for the following hardware:
* console UART
* ethernet controller/switch
* spinand flash (in non-dma mode)
The following issues may be expected:
* Extra slow UBI attaching in U-Boot (up to 20 sec with fastmap enabled).
This is caused by the lack of DMA support in the U-Boot airoha-snfi driver.
* Linux airoha-snfi driver in some cases might damage you flash data
(see: https://lore.kernel.org/lkml/20251012121707.2296160-15-mikhail.kshevetskiy@iopsys.eu/)
* Latest linux kernel is recommended to properly support flashes
with more than one plane per lun
(see: https://lore.kernel.org/lkml/20251012121707.2296160-7-mikhail.kshevetskiy@iopsys.eu/)
* It's NOT recommended to use flashes working in continuous mode because
U-Boot airoha-snfi driver does not support such flashes properly.
The patches was tested on the board:
- SoC: Airoha EN7562
- RAM: 512 MB
- SPI NAND: 4 Gbit, made by Toshiba
- Linux boot: was NOT tested
The U-Boot was chain-loaded from the running U-Boot. Airoha ATF-2.3 does
not allow easily chain-loading of U-Boot from U-Boot, so a special FIT
image (mimic linux kernel) was created
1) Create u-boot.its file with the following contents:
Anshul Dalal [Sat, 25 Oct 2025 02:48:11 +0000 (08:18 +0530)]
ti: add support for AM6254atl SiP
TI's AM6254atl (or AM62x SiP for short) provides the existing AM62x SoC
with 512MiB of DDR integrated in a single package.
This patch adds the necessary U-Boot devie tree files, the required
defconfigs along with the documentation for the AM62x SiP EVM.
AM62x SiP differs from the already supported AM62x in following ways:
- OP-TEE for the AM62x resides from 0x9e800000 to 0xa0000000 which needs
to be moved to 0x80080000 to free up space at end of DDR in AM62x SiP
with 512MiB of memory. This is required to allow U-Boot to relocate to
end of DDR before booting to the kernel.
- Changes to the env:
1. splashimage address updated from 0x80200000 to 0x81a00000
2. DFU addresses updated to match updated TEXT_BASE for SPL and U-Boot
Anshul Dalal [Sat, 25 Oct 2025 02:48:10 +0000 (08:18 +0530)]
arm64: dts: ti: Add support for AM6254atl SiP SK
This patch adds the dt for SK-AM62-SIP, which uses the existing
SK-AM62 board design with the new AM6254atl SiP. This changes the
location of memory node from the board dts to SoC level dtsi
(k3-am6254atl in our case).
Therefore this patch introduces the new 'k3-am625-sk-common.dtsi'
which represents the common hardware used for both 'am625-sk' and
'am6254atl-sk' boards with the inheritance hierarchy modified to:
Anshul Dalal [Sat, 25 Oct 2025 02:48:08 +0000 (08:18 +0530)]
arm64: dts: ti: k3-am62*: remove SoC dtsi from common dtsi
The k3-am62x-sk-common dtsi represents the common hardware used across
am62x EVMs which can be configured with various DDR sizes or none (with
DDR integrated in the package) based on the specific am62x SoC used.
Therefore this patch moves the memory node and the SoC specific k3-am625
dtsi out of sk-common and into the board dts files. No functional change
is intended from this patch. The device-tree inheritance is changed as
follows:
Beleswar Padhi [Sat, 25 Oct 2025 02:48:07 +0000 (08:18 +0530)]
arm64: dts: ti: k3-am6*-boards: Add label to reserved-memory node
Add the label name 'reserved_memory' to the reserved-memory node in all
K3 AM6* board level dts files. This is done so that the node can be
referenced and extended to add more carveout entries as needed in future
refactoring patches.
configs: j784s4_evm_a72_defconfig: Enable configs for PCI Endpoint mode
TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and
PCIe1 which are Cadence PCIe Controllers. Enable corresponding configs
to support PCIe Endpoint mode of operation on these instances.
pci_endpoint: pci_cdns_ti_ep: Enable PCIe Endpoint mode in J784S4 SoC
TI's J784S4 SoC has two instances of PCIe Controller namely PCIe0 and
PCIe1 which are Cadence PCIe Controllers. Add support to configure PCIe
instances in Endpoint mode of operation.
While at it disable all endpoint functions except function 0 during
probe to prevent the Root Complex from enumerating unconfigured
functions. This ensures only properly configured endpoint functions
are visible to the host and avoids enumeration issues with
multi-function devices.
pci_endpoint: pci_cdns_ti_ep: Add SERDES mux configuration support
Probe the mux device early in the SERDES configuration flow to ensure
proper lane routing before PHY initialization. This is required for SoCs
where SERDES lanes can be muxed between different controllers
(PCIe, USB, etc), and different mux configurations are required between
different boot phases.
pci_endpoint: pci_cdns_ti_ep: Add delay after power domain reset
Add a 1ms delay after powering on the PCIe power domain to ensure
the controller stabilizes before subsequent operations. This prevents
potential timing issues during PCIe endpoint initialization.
The delay allows sufficient time for the power domain to fully come
up and the hardware to be in a stable state before configuration
begins.
board: am65x: Use generic AM6x board detection function
Replace the board-specific implementation of do_board_detect()
with a call to the generic do_board_detect_am6() function to
avoid code duplication across AM6x family boards.
The generic function provides the same functionality with
additional fallback logic to try alternate EEPROM addresses.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
board: am64x: Use generic AM6x board detection functions
Replace the board-specific implementation of do_board_detect() and
setup_serial() with calls to the generic do_board_detect_am6() and
setup_serial_am6() functions.
The generic function provides the same functionality with
additional fallback logic to try alternate EEPROM addresses.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
I2C EEPROM data contains the board name and its revision.
Add support for:
- Reading EEPROM data and store a copy at end of SRAM
- Updating env variable with relevant board info
- Printing board info during boot
Use the generic do_board_detect_am6() and setup_serial_am6()
functions to avoid code duplication across AM6x family boards.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
Add two new generic functions for AM6x family boards to simplify
board-specific implementations:
- do_board_detect_am6(): Generic board detection function that reads
the on-board EEPROM. It first attempts to read at the configured
address, and if that fails, tries the alternate address
(CONFIG_EEPROM_CHIP_ADDRESS + 1). This provides a common
implementation that can be used across different AM6x boards.
- setup_serial_am6(): Sets up the serial number environment variable
from the EEPROM data. The serial number is converted from
hexadecimal string format to a 16-character hexadecimal
representation and stored in the "serial#" environment variable.
Both functions are protected by CONFIG_IS_ENABLED(TI_I2C_BOARD_DETECT)
and are designed to be used by AM62x, AM64x, AM65x, and other AM6x
family boards.
Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Guillaume La Roque (TI.com) <glaroque@baylibre.com>
In preparation for support for Airoha AN7583, convert the driver to
regmap API. This is needed as Airoha AN7583 will use syscon to access
reset registers.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
arm: airoha: introduce EN7523 helpers to get SCU and CHIP_SCU regmaps
We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.
To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha EN7523 SoC.
arm: airoha: introduce AN7581 helpers to get SCU and CHIP_SCU regmaps
We need access SCU and CHIP_SCU regmaps in several places (clk-airoha,
reset-airoha, airoha_eth). Unfortunately these regmaps can't be easily
retrieved with a common code, because of different Airoha SoCs uses
a different dts structure.
To make life easy we can write a commonly named SoC specific helpers
for these tasks. This patch implements helpers for Airoha AN7581 SoC.
airoha/an7581: add CONFIG_TARGET_AN7581=y to the defconfig
This is required because airoha/en7523 will be added with the following
patches. Without this line config for en7523 will be created instead of
an7581.
Vitor Soares [Tue, 28 Oct 2025 15:10:11 +0000 (15:10 +0000)]
toradex: verdin-am62: sync rm-cfg with SDK 11.01.05.03 baseline
Update the resource management configuration (rm-cfg.yaml) to align
with the default configuration provided in TI's AM62xx Processor SDK
Linux version 11.01.05.03, generated using the K3 Resource Partitioning
Tool.
This matches the configuration from board/ti/am62x/rm-cfg.yaml and the
notable change is the sharing of MCU GPIO interrupts between DM R5 and
A53 cores, and reservation of an additional virtual interrupt and event
for TIFS usage.
Quentin Schulz [Tue, 28 Oct 2025 14:02:19 +0000 (15:02 +0100)]
ext4: include missing blk.h
If missing, lbaint_t typedef will not be found in some cases.
[The proper fix for the commit above at the time would have been to
include ide.h as only since commit 1a73661bc7a7 ("dm: Add a new header
for block devices") is the typedef in blk.h]
Tom Rini [Fri, 24 Oct 2025 17:26:42 +0000 (11:26 -0600)]
test/py: multiplexed_log.py: Clean up and correct RunAndLog()
The general python documentation for the subprocess class recommends
that run() be used in all cases that it can handle. What we do in
RunAndLog is simple enough that run() is easy to switch to. In fact,
looking at this exposed a problem we have today, which is that we had
combined stdout and stderr but then looked at both stdout and stderr as
if they were separate. Stop combining them.
Tom Rini [Fri, 7 Nov 2025 19:02:07 +0000 (13:02 -0600)]
Merge patch series "pwm: put symbols into a menu + use if DM_PWM block instead of depends on"
Quentin Schulz <foss+uboot@0leil.net> says:
This improves readability in menuconfig by putting PWM symbols under a
Kconfig menu.
It also groups PWM symbols that depend on DM_PWM together under an if
DM_PWM block so that we don't need to always list the dependency in the
depends on of the symbol.
No intended change in behavior except how it shows in menuconfig.
Quentin Schulz [Thu, 30 Oct 2025 10:03:57 +0000 (11:03 +0100)]
pwm: put all PWM DM drivers under an if condition on DM_PWM
This simplifies the "depends on" since we don't need DM_PWM listed
explicitly there as it already is made explicit via the surrounding
"if". No intended change in behavior.
Reviewed-by: Tom Rini <trini@konsulko.com> Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de>
Marek Vasut [Mon, 27 Oct 2025 16:38:38 +0000 (17:38 +0100)]
mailbox: Allow operation without .recv callback
Some shared memory mailboxes may have empty receive operation,
because the data are polled by upper layers directly from the
shared memory region, and there is no completion interrupt or
bit of any sort. Allow empty .recv callback, and if the .recv
callback is empty, exit from mbox_recv() right away, because
any polling for completion here would be meaningless.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Alice Guo <alice.guo@nxp.com>
Marek Vasut [Mon, 27 Oct 2025 16:33:29 +0000 (17:33 +0100)]
clk: renesas: Isolate R-Car Gen3 driver to Gen3, Gen4 and RZ/G2L
Isolate Renesas R-Car Gen3 clock driver to R-Car Gen3 and Gen4 and RZ/G2L.
The Renesas R-Car Gen5 uses SCMI clock protocol driver instead. This is
a preparatory change for R-Car Gen5. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
* bootstd: Describe environment variable extension_overlay_addr
environment and remove extension support from TODO list
EFI:
* Correct the detection of the video mode in the EFI payload app:
- Use struct efi_gop_mode_info in the definition of struct
efi_entry_gopmode.
- In function get_mode_from_entry() use the correct type for the video
mode structure.
* Use a valid error code as return value in efi_store_memory_map().
* Avoid a memory leak for the variable name in efi_bl_create_block_device().
* Correct the code indentation in efi_uc_stop().
* Correct the description of struct efi_priv.
* Fix typos in code comments.
Other:
* qfw: Add more fields and a heading to qfw list
* Fix the support for ACPI pass-through on ARM and RISC-V:
Avoid zeroing out the XSDT address
* test: provide unit test for 'acpi list' command
# -----BEGIN PGP SIGNATURE-----
#
# iQIzBAABCAAdFiEEbcT5xx8ppvoGt20zxIHbvCwFGsQFAmkNj/kACgkQxIHbvCwF
# GsS8NQ/6Aj+Z54HJTIEfoXssvElLr5ATactrCxszq42i/yy6dLqa2Ym1afG6w1XS
# 1ZbCeU/bCXFke5Tsz+x89gEfckUm83oTwngwcID0WR1qn8mWjwR7tM5MuORq8NxU
# 7NwLuFs9O/QZihagKdz6hv1/Y+cBwiAYLY16EYVSuUlbLaKQo3QvxwWkqG3jdKWV
# Rm58/PolU+2h04MBwP0SxSduX4OyRF/tMOGjf5RGLyqCyj8kIgdu7PvUAPMM+Gps
# KemL59V0Bdv8hlF4JknmPz+idtZg2nHIDdNrBZvoxwzwGQeRZ1YXAMruRxZXqDYL
# tiuDp6HMv/GfIIGkz14tJtJMdboaAybAnluPWGalx8JQJqJzEPww0R+9s4KKQeWL
# mHgRyl6PxVV9p19f79Qq6q6ETwrFDX0YH3pdrGUk3DBa3lDt0UsEAnuW4FvaJ8tx
# 3PMrjKAxpxocT0hglsMVnptnfvDEigMsjwH/TWrau83mY+juxFQLjm+U4vye+qCa
# 4zXjjLas18+eRcrv2KxU7teakyi1Jp+WbqHq37L26YcQMaLq/RkBc0bTrsreKKLu
# jprYFpvc7EJpH2Fd1XWaZ2EnxXcVSJSvrY/iwRQqb6wbwQ6XGtMvSh3IFY8IzAoh
# N2Pj78oaYqyL1q/TftuZWhEHo3a0M/HfM4D+oMSHzJtWCb0wZHE=
# =OGcS
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 07 Nov 2025 12:21:45 AM CST
# gpg: using RSA key 6DC4F9C71F29A6FA06B76D33C481DBBC2C051AC4
# gpg: Good signature from "Heinrich Schuchardt <xypron.glpk@gmx.de>" [unknown]
# gpg: aka "[jpeg image of size 1389]" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6DC4 F9C7 1F29 A6FA 06B7 6D33 C481 DBBC 2C05 1AC4
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sam Protsenko [Sun, 26 Oct 2025 01:06:58 +0000 (20:06 -0500)]
mmc: exynos_dw_mmc: Disable FMP for Exynos850 chip
Add DWMCI_QUIRK_DISABLE_FMP flag to Exynos850 driver data to make the
driver disable FMP in case of Exynos850 chip. That makes eMMC on
Exynos850 functional when U-Boot is executed during USB boot.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sam Protsenko [Sun, 26 Oct 2025 01:06:57 +0000 (20:06 -0500)]
mmc: exynos_dw_mmc: Add exynos850 compatible
Up until now "samsung,exynos7-dw-mshc-smu" compatible was used for
Exynos850 SoC, as it's present in its device tree. But Exynos850 device
tree also supports "samsung,exynos850-dw-mshc-smu" compatible string.
Add it in compatible ID list in the driver so that it can be matched
against this string for Exynos850 device tree.
No functional change, as the driver data is just a copy of
"samsung,exynos7-dw-mshc-smu" data for now.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Sam Protsenko [Sun, 26 Oct 2025 01:06:56 +0000 (20:06 -0500)]
mmc: exynos_dw_mmc: Add quirk for disabling FMP
Add DWMCI_QUIRK_DISABLE_FMP which disables Flash Memory Protector (FMP)
during driver's init. It's usually done by early bootloaders, but in
some cases (like USB boot) the FMP may be left unconfigured. The issue
was observed on Exynos850 SoC (the E850-96 board). Enabling this quirk
makes eMMC functional even in such cases.
No functional change, as this feature is only added here but not enabled
for any chips yet.
Signed-off-by: Sam Protsenko <semen.protsenko@linaro.org> Reviewed-by: Anand Moon <linux.amoon@gmail.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
projects / thirdparty / u-boot.git / log
