The patch adds benchmark option to the help of mtd command. For the
'mtd write' case the help line exceed 80 characters. Ignore this issue
as modern terminals are capable to handle more characters.
The patch also formats other command to make sure all device names
starts on the same collumn.
This patch implements read-only test of nand flash devices.
Test reads blocks of NAND flash in normal and raw modes and compares
results. The following statuses can be returned for a block:
* non-ecc reading failed,
* ecc reading failed,
* block is bad,
* bitflips is above maximum,
* actual number of biflips above reported one,
* bitflips reached it maximum value,
* bitflips above threshold,
* block is ok.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Some nand flashes (like spi-nand one) are registered with mtd
subsystem only, thus nand command can't be used to work with
such flashes. As result some functionality is missing.
This patch implements 'nand torture' functionality for mtd command.
Some nand flashes (like spi-nand one) are registered with mtd
subsystem only, thus nand command can't be used to work with
such flashes. As result some functionality is missing.
This patch implements 'nand markbad' functionality for mtd command.
mtd: spinand: repeat reading in regular mode if continuous reading fails
Continuous reading may result in multiple flash pages reading in one
operation. Unfortunately, not all spinand controllers support such
large reading. They will read less data. Unfortunately, the operation
can't be continued.
In this case:
* disable continuous reading on this (not good enough) spi controller
* repeat reading in regular mode.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
mtd: spinand: try a regular dirmap if creating a dirmap for continuous reading fails
Continuous reading may result in multiple flash pages reading in one
operation. Typically only one flash page has read/written (a little bit
more than 2-4 Kb), but continuous reading requires the spi controller
to read up to 512 Kb in one operation without toggling CS in beetween.
Roughly speaking spi controllers can be divided on 2 categories:
* spi controllers without dirmap acceleration support
* spi controllers with dirmap acceleration support
Firt of them will have issues with continuous reading if restriction on
the transfer length is implemented in the adjust_op_size() handler.
Second group often supports acceleration of single page only reading.
Thus enabling of continuous reading can break flash reading.
This patch tries to create dirmap for continuous reading first and
fallback to regular reading if spi controller refuses to create it.
Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
mtd: spinand: Sync core code and device support with Linux 6.17-rc1
This makes the U-Boot SPI NAND driver almost the same as in Linux
6.17-rc1. The only major differences are:
* support of ECC engines. The Linux driver supports different ECC
engines while U-Boot uses on-die ECC only.
* per operation maximum SPI bus frequency
There is already a manufacturer hook, which is manufacturer specific but
not chip specific. We no longer have access to the actual NAND identity
at this stage so let's add a per-chip configuration hook to align the
chip configuration (if any) with the core's setting.
This is a port of linux commit da55809ebb45 ("mtd: spinand: Add a ->configure_chip() hook")
Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
mtd: spinand: propagate spinand_wait() errors from spinand_write_page()
Since commit 3d1f08b032dc ("mtd: spinand: Use the external ECC engine
logic") the spinand_write_page() function ignores the errors returned
by spinand_wait(). Change the code to propagate those up to the stack
as it was done before the offending change.
This is a port of linux commit 091d9e35b85b ("mtd: spinand: propagate spinand_wait() errors from spinand_write_page()")
Signed-off-by: Gabor Juhos <j4g8y7@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
mtd: spinand: Enhance the logic when picking a variant
Currently the best variant picked in the first one in the list provided
in the manufacturer driver. This worked well while all operations where
performed at the same speed, but with the introduction of DTR transfers
this no longer works correctly.
Let's continue iterating over all the alternatives, even if we find a
match, keeping a reference over the theoretically fastest
operation. Only at the end we can tell which variant is the best.
This logic happening only once at boot.
The patch is based on linux commit 666c299be696 (mtd: spinand: Enhance the logic when picking a variant)
created by Miquel Raynal <miquel.raynal@bootlin.com>
The code was a bit restricted in the functionality since not all
required functionality is supported in the u-boot.
Cheng Ming Lin [Tue, 30 Sep 2025 00:21:01 +0000 (03:21 +0300)]
mtd: spinand: Add read retry support
When the host ECC fails to correct the data error of NAND device,
there's a special read for data recovery method which can be setup
by the host for the next read. There are several retry levels that
can be attempted until the lost data is recovered or definitely
assumed lost.
This is the port of linux commit f2cb43c98010 (mtd: spinand: Add read retry support)
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
mtd: spinand: add support of continuous reading mode
The code was ported from linux-6.12. The original continuous reading
support was implemented by Miquel Raynal <miquel.raynal@bootlin.com>
in linux commit 631cfdd0520d (mtd: spi-nand: Add continuous read support).
Here is an original patch description:
--------------------------------------
A regular page read consist in:
- Asking one page of content from the NAND array to be loaded in the
chip's SRAM,
- Waiting for the operation to be done,
- Retrieving the data (I/O phase) from the chip's SRAM.
When reading several sequential pages, the above operation is repeated
over and over. There is however a way to optimize these accesses, by
enabling continuous reads. The feature requires the NAND chip to have a
second internal SRAM area plus a bit of additional internal logic to
trigger another internal transfer between the NAND array and the second
SRAM area while the I/O phase is ongoing. Once the first I/O phase is
done, the host can continue reading more data, continuously, as the chip
will automatically switch to the second SRAM content (which has already
been loaded) and in turns trigger the next load into the first SRAM area
again.
From an instruction perspective, the command op-codes are different, but
the same cycles are required. The only difference is that after a
continuous read (which is stopped by a CS deassert), the host must
observe a delay of tRST. However, because there is no guarantee in Linux
regarding the actual state of the CS pin after a transfer (in order to
speed-up the next transfer if targeting the same device), it was
necessary to manually end the continuous read with a configuration
register write operation.
Continuous reads have two main drawbacks:
* They only work on full pages (column address ignored)
* Only the main data area is pulled, out-of-band bytes are not
accessible. Said otherwise, the feature can only be useful with on-die
ECC engines.
Performance wise, measures have been performed on a Zynq platform using
Macronix SPI-NAND controller with a Macronix chip (based on the
flash_speed tool modified for testing sequential reads):
- 1-1-1 mode: performances improved from +3% (2-pages) up to +10% after
a dozen pages.
- 1-1-4 mode: performances improved from +15% (2-pages) up to +40% after
a dozen pages.
This series is based on a previous work from Macronix engineer Jaime
Liao.
--------------------------------------
SkyHigh spinand device has ECC enable bit in configuration register but
it must be always enabled. If ECC is disabled, read and write ops
results in undetermined state. For such devices, a way to avoid raw
access is needed.
Introduce SPINAND_NO_RAW_ACCESS flag to advertise the device does not
support raw access. In such devices, the on-die ECC engine ops returns
error to I/O request in raw mode.
Checking and marking BBM need to be cared as special case, by adding
fallback mechanism that tries read/write OOB with ECC enabled.
This is a port of linux commit 6d9d6ab3a82a (mtd: spinand: Introduce a way to avoid raw access)
Cheng Ming Lin [Tue, 30 Sep 2025 00:20:57 +0000 (03:20 +0300)]
mtd: spinand: Add support for setting plane select bits
Add two flags for inserting the Plane Select bit into the column
address during the write_to_cache and the read_from_cache operation.
Add the SPINAND_HAS_PROG_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the write_to_cache operation.
Add the SPINAND_HAS_READ_PLANE_SELECT_BIT flag for serial NAND flash
that require inserting the Plane Select bit into the column address
during the read_from_cache operation.
This is a port of linux commit ca229bdbef29 (mtd: spinand: Add support for setting plane select bits)
Signed-off-by: Cheng Ming Lin <chengminglin@mxic.com.tw> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20240909092643.2434479-2-linchengming884@gmail.com Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Daniel Golle [Tue, 30 Sep 2025 00:20:56 +0000 (03:20 +0300)]
mtd: spinand: set bitflip_threshold to 75% of ECC strength
Reporting an unclean read from SPI-NAND only when the maximum number
of correctable bitflip errors has been hit seems a bit late.
UBI LEB scrubbing, which depends on the lower MTD device reporting
correctable bitflips, then only kicks in when it's almost too late.
Set bitflip_threshold to 75% of the ECC strength, which is also the
default for raw NAND.
This is a port of linux commit 1824520e7477 (mtd: spinand: set bitflip_threshold to 75% of ECC strength)
mtd: spinand: Sync core code and device support with Linux 6.10
This makes the U-Boot SPI NAND driver almost the same as in Linux 6.10.
The only major difference is support of ECC engines. The Linux driver
supports different ECC engines while U-Boot uses on-die ECC only.
changes:
* Move spinand_check_ecc_status(), spinand_noecc_ooblayout_ecc(),
spinand_noecc_ooblayout_free() and spinand_noecc_ooblayout close
to each other.
* some code formatting
* remove comments not present in linux driver
No functional changes, just some refactoring to better match linux
kernel driver.
changes:
* move spinand configuration reading out from spinand_init_cfg_cache()
to separate function spinand_read_cfg()
* move spinand flash initialization to separate function
spinand_init_flash()
* move direct mapping initialization to the end of spinand_init()
mtd: spinand: Extend spinand_wait() to match Linux kernel implementation
This aligns spinand_wait() with the linux kernel. Instead of calling into
spi_mem_poll_status() which is not implemented in U-Boot, we code the
polling logic and make sure that schedule() is called periodically.
The module misses MODULE_DEVICE_TABLE() for both SPI and OF ID tables
and thus never autoloads on ID matches.
Add the missing declarations.
Present since day-0 of spinand framework introduction.
This is a port of linux commit 25fefc88c71f ("mtd: spinand: core: add missing MODULE_DEVICE_TABLE()")
Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com> Link: https://lore.kernel.org/linux-mtd/20210323173714.317884-1-alobakin@pm.me Signed-off-by: Mikhail Kshevetskiy <mikhail.kshevetskiy@iopsys.eu> # U-Boot port Reviewed-by: Frieder Schrempf <frieder.schrempf@kontron.de> Signed-off-by: Michael Trimarchi <michael@amarulasolutions.com>
Make use of the spi-mem direct mapping API to let advanced controllers
optimize read/write operations when they support direct mapping.
Based on a linux commit 981d1aa0697c ("mtd: spinand: Use the spi-mem dirmap API")
created by Boris Brezillon <bbrezillon@kernel.org> with additional
fixes taken from Linux 6.10.
Commit 9fe2e4b46458 ("fdt: Make sure there is no stale initrd left")
introduces a regression in case when U-Boot transfers control to an EFI
app which acts as a subsequent bootloading program. Such an app might
try to set "linux,initrd-start" and "linux,initrd-end" fdt properties,
but by that time those properties are already removed by the code added
in the mentioned commit.
Particularly, the issue was observed on the E850-96 board where GBL EFI
app [1] can't run Android successfully anymore. More specifically, the
kernel can't see the ramdisk and panics with next messages:
/dev/root: Can't open blockdev
VFS: Cannot open root device "" or unknown-block(0,0): error -6
Please append a correct "root=" boot option; ...
Kernel panic - not syncing: VFS: Unable to mount root fs on
unknown-block(0,0)
fdt_initrd() function (where initrd dts properties are removed) is
called two times:
1. First it's called by EFI boot manager (e.g. as a part of U-Boot
Standard Boot mechanism) when it's installing FDT:
Martin Schwan [Wed, 1 Oct 2025 07:44:37 +0000 (09:44 +0200)]
doc: pytest: Fix inline code and other formatting
Mainly fix inline code and some other formatting mistakes. Inline code
uses double backticks `` in reStructuredText instead of single backticks
as in Markdown.
Also fix some smaller formatting issues, such as excess colons before
literal blocks.
Javier Tia [Tue, 30 Sep 2025 12:53:28 +0000 (06:53 -0600)]
doc: Update coding style to recommend b4 for patch submission
Replace references to patman with b4 as the recommended tool for
preparing and sending patches. b4 is widely adopted in the Linux kernel
community and U-Boot ships with configuration to simplify its use with
the project mailing list.
The updated guidelines describe how to prepare series with b4, handle
cover letters and recipient lists, run style checks, and send patches
safely. Instructions also highlight how to collect and apply review tags
before resending.
This change documents the preferred workflow for contributors and
ensures consistency with common practices across related upstream
communities.
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Javier Tia <javier.tia@linaro.org>
Andrew Goodbody [Wed, 1 Oct 2025 09:28:37 +0000 (10:28 +0100)]
b4-config: Improve b4 config for correct operation
The recent change to .b4-config resulted in some expected recipients not
being added to the address lists. Rework the commands so that all
expected recipients are added while maintaining the ordering from the
first change.
Fixes: 26efc940c86 ("b4-config: configure `b4` for U-Boot") Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
board: mpfs_icicle: fix pointer assignment in board_fdt_blob_setup()
Correct the assignment in board_fdt_blob_setup() to use *fdtp instead of
fdtp, ensuring the caller receives the correct FDT address. This
resolves an issue where the device tree pointer was not properly set due
to assigning to the local parameter rather than the dereferenced
pointer.
Restore support for environment storage in EXT4 filesystem on eMMC boot.
The previous cleanup incorrectly removed this fallback option which is
needed for boards that store their environment in an EXT4 partition.
This configuration is OS-specific rather than board-dependent and should
remain as it is configurable via menuconfig. Even if it is not described
in ST defconfigs people may have enabled it in their defconfig.
Tim Harvey [Mon, 29 Sep 2025 19:21:49 +0000 (12:21 -0700)]
net: lwip: ensure alignment of packet buffers
Network packet buffers should be aligned to PKTALIGN. Add a compiler
attribute to ensure this.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
[jf: use __aligned(x) from <linux/compiler_attributes.h>] Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org>
net: lwip: dhcp: set ntpserverip environment variable
Once the DHCP exchange is complete, if we have an IP address for an NTP
server, set the ntpserverip environment variable accordingly. Although
not necessary to make the sntp command use that server (since it is
known internally to the lwIP stack), this makes the behavior in line
with the legacy NET stack. This is also consistent with exporting the
DNS servers etc.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Suggested-by: Michal Simek <michal.simek@amd.com>
net: lwip: dhcp: make NTP servers usable by the sntp command
When both CMD_DHCP and CMD_SNTP are enabled, one would expect the NTP
servers received by DHCP to be used by the sntp command by default. Fix
dhcp_loop() so that it is indeed the case.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reported-by: Michal Simek <michal.simek@amd.com>
net: lwip: enable debug traces for SNTP when CONFIG_LWIP_DEBUG is set
Now that SNTP is supported, enable SNTP debug traces when LWIP_DEBUG is
enabled. In particular, this allows to see which NTP servers are
received during DHCP.
While it is good that the "Licenses/" directory contains the text
for all licenses that are applicable to u-boot code, it is harder
to determine at a glance what the default and/or preferred license
is. While humans can look at the Licenses/README file, this is not
machine parseable, making it tricky for license detection tools to
automatically determine/report on the overall / aggregate u-boot
license.
The project previously had a top level COPYING file containing a
short blurb, followed by the GPL license text. This was removed
back in commit eca3aeb352c964bdb28b8e191d6326370245e03f when
the "Licenses/" directory was introduced. For the benefit of
automated tools, it is helpful to retain a top level COPYING
file in the repository. Rather than duplicate the license text,
however, a symlink from the Licenses/gpl-2.0.txt file should
suffice.
* Correct encodings for spl memory layout diagrams
* Suggest usage of KDOC_WERROR when building documentation
* Replace references to README.fdt-control
* Clarify precedence of environment locations
* Add documentation for the TI am335x_evm board
* Remove README.commands.itest
* Add a note about asking for feedback in the development process
Michal Simek [Wed, 24 Sep 2025 14:18:18 +0000 (16:18 +0200)]
efi_loader: Cleanup UEFI Variables menu selection
There are 3 options listed between choice/endchoice FILE/TEE/NO_STORE.
There is no reason to add other config with dependencies between
choice/endchoice because they can never be selected because they depends on
only that 3 options which can be selected.
That's why move additional configuration with dependency below choice
section.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Tue, 23 Sep 2025 17:54:29 +0000 (11:54 -0600)]
doc: develop: process: Add note about asking for feedback
It can be unclear to contributors what to do if they haven't gotten any
feedback on patches they have submitted. Add a sentence saying that if
they feel it's been too long without any comment, it's OK to reply
again.
doc: memory: fix encodings for spl layout diagrams
The commit 284ef1bbcefc ("doc: memory: Add documentation for system
RAM") added documentation for U-Boot's memory usage along with diagrams
showcasing the SPL's memory usage. Although the SVGs for the diagrams
were improperly encoded.
Therefore, this patch fixes the older SVGs with one's with better
encoding and reduced size created using inkscape[1].
[1]: https://inkscape.org/
Reported-by: Alexander Dahl <ada@thorsis.com> Fixes: 284ef1bbcefc ("doc: memory: Add documentation for system RAM") Signed-off-by: Anshul Dalal <anshuld@ti.com>
Since commit 5cf6a06a it is possible to have both text-based and
old-style C environment files. But so far the environment documentation
has not reflected this change. This commit fixes that.
Signed-off-by: Ricardo Simoes <ricardo.simoes@pt.bosch.com> Signed-off-by: Mark Jonas <mark.jonas@de.bosch.com>
Tom Rini [Fri, 12 Sep 2025 23:02:52 +0000 (17:02 -0600)]
doc: Remove README.commands.itest
We currently document this command in doc/usage/cmd/itest.rst and this
documentation is more comprehensive than the older README file. Delete
the older file.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
When applying the patch that became commit a2d881f5bcd3 ("doc: memory:
Add documentation for system RAM") one of the diagrams was missed.
Re-add this missing file.
Reported-by: Adriano Carvalho <adrianocarvalho.pt@gmail.com> Fixes: a2d881f5bcd3 doc: memory: Add documentation for system RAM Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
[trini: Take Neha's original svg and re-apply it] Signed-off-by: Tom Rini <trini@konsulko.com>
Peng Fan [Fri, 26 Sep 2025 01:57:47 +0000 (09:57 +0800)]
MAINTAINERS: Update MMC/POWER/FREESCALE QORIQ
- Update MMC entry to match 'mmc' using 'N'
- Add myself as POWER maintainer for regulator and pmic patches. I have
started to handle relevant patches.
- Update QORIQ maintainer. Priyanka has moved to work on other stuff, I
have been handling this for quite some time.
Add myself as a maintainer of the NETWORK subsystem since:
- I have effectively been handling net patches in my patchwork queue and
sending pull requests to Tom,
- I do have push access to the u-boot-net custodian tree.
Also, add u-boot-net as the SCM tree for NETWORK (LWIP) since it is where
lwIP-related patches end up too.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> CC: Ramon Fried <rfried.dev@gmail.com> CC: Joe Hershberger <joe.hershberger@ni.com> CC: Tom Rini <trini@konsulko.com>
Marek Vasut [Wed, 24 Sep 2025 01:47:14 +0000 (03:47 +0200)]
pci: pcie-rcar-gen4: Add missing 1ms delay after PWR reset assertion
R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 585
Figure 9.3.2 Software Reset flow (B) indicates that for peripherals in HSC
domain, after reset has been asserted by writing a matching reset bit into
register SRCR, it is mandatory to wait 1ms.
Because it is the controller driver which can determine whether or not the
controller is in HSC domain based on its compatible string, add the missing
delay into the controller driver.
This 1ms delay is documented on R-Car V4H and V4M, it is currently unclear
whether S4 is affected as well. This patch does apply the extra delay on
R-Car S4 as well.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 24 Sep 2025 01:47:13 +0000 (03:47 +0200)]
pci: pcie-rcar-gen4: Assure reset occurs before DBI access
Assure the reset is latched and the core is ready for DBI access.
On R-Car V4H, the PCIe reset is asynchronized and does not take
effect immediately, but needs a short time to complete. In case
DBI access happens in that short time, that access generates an
SError. Make sure that condition can never happen, read back the
state of the reset which should turn the asynchronized reset into
synchronized one, and wait a little over 1ms to add additional
safety margin.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Wed, 24 Sep 2025 01:47:12 +0000 (03:47 +0200)]
pci: pcie-rcar-gen4: Fix inverted break condition in PHY initialization
R-Car V4H Reference Manual R19UH0186EJ0130 Rev.1.30 Apr. 21, 2025 page 4581
Figure 104.3b Initial Setting of PCIEC(example), third quarter of the figure
indicates that register 0xf8 should be polled until bit 18 becomes set to 1.
Register 0xf8 bit 18 is 0 immediately after write to PCIERSTCTRL1 and is set
to 1 in less than 1 ms afterward. The current readl_poll_timeout() break
condition is inverted and returns when register 0xf8 bit 18 is set to 0,
which in most cases means immediately. In case CONFIG_DEBUG_LOCK_ALLOC=y ,
the timing changes just enough for the first readl_poll_timeout() poll to
already read register 0xf8 bit 18 as 1 and afterward never read register
0xf8 bit 18 as 0, which leads to timeout and failure to start the PCIe
controller.
Fix this by inverting the poll condition to match the reference manual
initialization sequence.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
board: rzg2l: Check the DTB pointer passed by the TF-A.
On the RZG2L platform, the advised
TF-A (https://github.com/renesas-rz/rzg_trusted-firmware-a/tree/v2.5/rzg2l)
does not pass any DTB blob to U-Boot.
On the other hand, the RZG2L part of U-Boot expects a DTB to be passed. It
means that if one flashes the latest TF-A as well as the mainline U-Boot,
it will crash trying to dereference the NULL DTB pointer before outputing
anything.
Check if the DTB pointer is NULL before trying to use it.
Signed-off-by: Mathieu Othacehe <othacehe@gnu.org> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
board: phytec: common: Fix missing newline in error message
The error message in phytec_get_product_name() was missing a newline,
causing log output to be concatenated with subsequent messages. Add
the newline to improve readability.
After switching our boards to standard boot, we observed that the
kernel hangs when booting with the "script" boot method over the
network.
The original scriptaddr value was copied from ti_common.env and
remained unused for some time. On phycore-am62x and phycore-am62ax,
however, this address conflicts with the current location where
ATF is loaded (CONFIG_K3_ATF_LOAD_ADDR).
Move scriptaddr to 0x89100000, directly after fdtoverlay_addr_r.
The phycore-am64x is not affected by this issue, but we update it
as well to keep all phycore-am6xx boards consistent.
- Fix Phycore i.MX93 voltage modes
- Call DM post init function for init_r phase on i.MX8ULP
- Fix ELE FW version print bug on i.MX8UL EVK.
- Fix LPCG number in ccm_reg structure on i.MX93
board: phytec: phycore-imx93: Fix i.MX93 voltage modes
Fix support for i.MX93 voltage modes on phyCORE-i.MX93 SoM boards.
First of all, Kconfig option CONFIG_IMX9_LOW_DRIVE_MODE is gone since
commit c9efcad23741 ("imx93_evk: Remove CONFIG_IMX9_LOW_DRIVE_MODE and
ld defconfig") and was replaced by runtime detection mechanism. Thus
lets use is_voltage_mode() instead of Kconfig to detect CPU type and
select proper voltage mode.
Secondly, 1400MHz ND mode (Nominal Drive) requiring 0.85V BUCK voltage
was not supported with current power_init_board() PMIC settings. Add
check also for this CPU type and set BUCK voltage accordingly.
Last but not least, add printf() printouts about PMIC voltage mode to
the console. This makes it more apparent and verbose about voltage mode
in use. Also our internal tests depend on this printout to catch issues
with i.MX93 CPU types and set PMIC voltage modes.
Ye Li [Fri, 19 Sep 2025 06:58:34 +0000 (14:58 +0800)]
arm: imx9: Fix LPCG number in ccm_reg structure
The LPCG number on iMX93 and iMX91 is 127 not 122. The wrong
value is used in ccm_reg structure and Coverity reports several
issues as out-of-bounds write.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Ye Li [Fri, 19 Sep 2025 06:58:33 +0000 (14:58 +0800)]
imx8ulp_evk: Fix ELE FW version print bug
According to latest ELE Get FW version API, the FW version word is defined
as below. The patch version only has 4 bits and minor version has 12 bits.
However, the codes use 8 bits for patch version and minor version. Add the
patch to fix the issue.
ELE firmware version
[31] - When set indicates a dirty build.
[30] - Reserved
[29:28] - Hotfix version.
[27] - When set, indicate that ELE FW is authenticated and operational.
[26:25] - Reserved
[24] - When set, indicate that an alternative FW is running.
[23:16] - Indicate the major version. This byte is checked against the
version set in the fuses to determine if the FW execution can be authorized
[15:4] - Indicate the minor version.
[3:0] - Indicate the patch version.
Signed-off-by: Ye Li <ye.li@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sun, 7 Sep 2025 01:00:47 +0000 (03:00 +0200)]
board: dhelectronics: Use isascii() before isprint() in dh_read_eeprom_id_page()
The isprint() checks printability across all 256 characters, some of the
upper 128 characters are printable and produce artifacts on UART. Call
isascii() first to only consider the bottom 7bit ASCII characters as
printable, and then check their printability using isprint(). This fixes
a rare misprint in case the ID page content is uninitialized or corrupted.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Marek Vasut [Sun, 7 Sep 2025 01:00:46 +0000 (03:00 +0200)]
board: dhelectronics: Check pointer before access in dh_get_value_from_eeprom_buffer()
The eip pointer in dh_get_value_from_eeprom_buffer() might be NULL.
The current NULL pointer check happens too late, after the eip was
accessed in variable assignment. Reorder the two, so the NULL pointer
check happens first, and any access second, otherwise the access may
trigger a hang or other undefined behavior.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christoph Niedermaier <cniedermaier@dh-electronics.com>
Tom Rini [Wed, 17 Sep 2025 13:52:31 +0000 (07:52 -0600)]
Merge patch series "Hyperflash boot fixes for j721e/j7200"
Anurag Dutta <a-dutta@ti.com> says:
This series introdues a couple of small fixes that involves
enabling hyperflash at R5 SPL and u-boot proper stage and
Kconfig changes that are required for HBMC boot on j721e/j7200
Michal Simek [Wed, 17 Sep 2025 07:22:18 +0000 (09:22 +0200)]
xilinx: Disable SPL_OS_BOOT for Zynq and ZynqMP
The commit 210702ae6ce8 ("spl: spi: fix falcon mode for spi boot") fixed
the logic of spl_start_uboot() where 0 means OS boot and 1 means u-boot.
Zynq/ZynqMP enable OS_BOOT by default but it was never really be used
that's why disable it to boot via U-Boot phase all the time.
Signed-off-by: Michal Simek <michal.simek@amd.com>
board: ti: am57xx: Remove "ti/omap/" from name_fit_config
Commit 649f4a7d3ca7 ("board: ti: am57xx: Set fdtfile from C code
instead of findfdt script") prepends "ti/omap/" to the actual name
of the fdtfile whereas fit image boot needs exact dtb name. So, remove
"ti/omap" from name_fit_config by substituting it with an empty string.
Fixes: 649f4a7d3ca7 ("board: ti: am57xx: Set fdtfile from C code instead of findfdt script") Signed-off-by: Anurag Dutta <a-dutta@ti.com> Reviewed-by: Udit Kumar <u-kumar1@ti.com>
Alice Guo [Fri, 5 Sep 2025 18:22:04 +0000 (02:22 +0800)]
imx95_evk: Restore support for i.MX95 A0 silicon
This patch is used to restore support for i.MX95 A0 silicon. To avoid
duplicating defconfig, imx95.config is added and can be shared between
imx95_a0_19x19_evk_defconfig and imx95_19x19_evk_defconfig.
container.cfg and imximage.cfg are used to created .cfgout files that
are be passed to mkimage with -n to build flash.bin. Now they have been
deleted and replaced by adding their content to properties of node which
type is nxp-imx9image under binman node.
Fixes: 9936724aa9b ("imx95_evk: Add i.MX95 B0 support") Signed-off-by: Alice Guo <alice.guo@nxp.com> Tested-By: Tim Harvey <tharvey@gateworks.com> # imx95-19x19-evk (rA0)
Alice Guo [Fri, 5 Sep 2025 18:22:03 +0000 (02:22 +0800)]
binman: add a new entry type to support .bin file generation for the i.MX95 platform
To support passing specific commands defined in enum imx8image_cmd to
the imx8image_copy_image() function, this patch introduces a new entry
type nxp-imx9image. This entry generates a plain text data file
containing the relevant commands, enabling flexible configuration during
image creation.
Per recent discussion [1] product IDs VF7110A or VF7110B from EEPROM are
sufficient to select for VisionFive 2 1.2a or VisionFive 2 1.3b boards.
There are no VisionFive 2 products with mixed-case product IDs in EERPOM
so factor out the unnecessary select case conditional.
Marek Vasut [Mon, 15 Sep 2025 00:49:05 +0000 (02:49 +0200)]
ARM: stm32: Perform node compatible check for KS8851 early
Check the compatible string of ethernet1 node for KS8851 very early on,
before calling uclass_get_device_by_of_path() which might initialize
the device and possibly attempt to configure MAC address into device
which is not KS8851. Doing the compatibility check early prevent this.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
Marek Vasut [Mon, 15 Sep 2025 00:53:04 +0000 (02:53 +0200)]
net: dwc_eth_qos: Fix support for stm32mp2 platform
The layout of SYSCFG_ETHnCR on STM32MP25xx is slightly different yet again.
Add missing swizzling to program the correct register with the correct content.
Fixes: 20afca89ed53 ("net: dwc_eth_qos: add support of stm32mp2 platform") Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Christophe ROULLIER<christophe.roullier@foss.st.com>
Marek Vasut [Sat, 6 Sep 2025 23:00:01 +0000 (01:00 +0200)]
clk: stm32: Pass udevice pointer to clk_register_composite()
The clk_register_composite() does clk_resolve_parent_clk() look up,
which requires valid udevice pointer. Do not pass NULL, pass a valid
device pointer to prevent hang on registering ck_usbo_48m clock on
STM32MP13xx.
Signed-off-by: Marek Vasut <marek.vasut@mailbox.org> Reviewed-by: Patrice Chotard <patrice.chotard@foss.st.com>
projects / thirdparty / u-boot.git / log
