gas: arm: Change warning message to not reference specific A-class architecture revision
We noticed that a warning message about the use of scalar fp16
instructions being UNPREDICTABLE when conditionalized in an IT
block referenced the specific A-class architecture revision
ARMv8.2-A.
Many of these instructions are now also part of ARMv8.1-M, so
the warning message had become misleading. Here we just change
the message to not specify an architecture revision at all and
update all testing accordingly. This was done with a simple
find-n-replace within the binutils sources. No tests have
regressed for the arm target.
gas: arm: Fix a further IT-predicated vcvt issue in the presense of MVE vcvtn
Previously we had experienced issues with assembling a "VCVTNE" instruction
in the presence of the MVE architecture extension, because it could be
interpreted both as:
* The base instruction VCVT + NE for IT predication when inside an IT block.
* The MVE instruction VCVTN + E in the Else of a VPT block.
Given a C reproducer of:
```
int test_function(float value)
{
int ret_val = 10;
if (value != 0.0)
{
ret_val = (int) value;
}
return ret_val;
}
```
GCC generates a VCVTNE instruction based on the `truncsisf2_vfp`
pattern, which will look like:
`vcvtne.s32.f32 s-reg, s-reg`
This still triggers an error due to being misidentified as "vcvtn+e"
Similar errors were found with other type combinations and instruction
patterns (these have all been added to the testing of this patch).
This class of errors was previously worked around by:
https://sourceware.org/pipermail/binutils/2020-August/112728.html
which addressed this by looking at the operand types, however,
that isn't adequate to cover all the extra cases that have been
found. Instead, we add some special-casing logic earlier when
the instructions are parsed that is conditional on whether we are
in a VPT block or not, when the instruction is parsed.
gas/ChangeLog:
* config/tc-arm.c (opcode_lookup): Add special vcvtn handling.
* testsuite/gas/arm/mve-vcvtne-it-bad.l: Add further testing.
* testsuite/gas/arm/mve-vcvtne-it-bad.s: Likewise.
* testsuite/gas/arm/mve-vcvtne-it.d: Likewise.
* testsuite/gas/arm/mve-vcvtne-it.s: Likewise.
Nick Alcock [Thu, 23 Mar 2023 00:15:17 +0000 (00:15 +0000)]
libctf: get the offsets of fields of unnamed structs/unions right
We were failing to add the offsets of the containing struct/union
in this case, leading to all offsets being relative to the unnamed
struct/union itself.
libctf/
PR libctf/30264
* ctf-types.c (ctf_member_info): Add the offset of the unnamed
member of the current struct as necessary.
* testsuite/libctf-lookup/unnamed-field-info*: New test.
Nick Alcock [Mon, 23 Jan 2023 13:11:32 +0000 (13:11 +0000)]
libctf: fix assertion failure with no system qsort_r
If no suitable qsort_r is found in libc, we fall back to an
implementation in ctf-qsort.c. But this implementation routinely calls
the comparison function with two identical arguments. The comparison
function that ensures that the order of output types is stable is not
ready for this, misinterprets it as a type appearing more that once (a
can-never-happen condition) and fails with an assertion failure.
Fixed, audited for further instances of the same failure (none found)
and added a no-qsort test to my regular testsuite run.
libctf/:
PR libctf/30013
* ctf-dedup.c (sort_output_mapping): Inputs are always equal to
themselves.
Alan Modra [Tue, 21 Mar 2023 23:43:46 +0000 (10:13 +1030)]
coff_get_normalized_symtab bfd_release
We can't free "internal" on errors, since bfd_coff_swap_sym_in may
call bfd_alloc. For example, _bfd_XXi_swap_sym_in may even create new
sections, which use bfd_alloc'd memory. If "internal" is freed, all
more recently bfd_alloc'd memory is also freed.
* coffgen.c (coff_get_normalized_symtab): Don't bfd_release on
error.
Alan Modra [Wed, 15 Mar 2023 07:37:44 +0000 (18:07 +1030)]
PR30217, dynamic relocations using local dynamic symbols
glibc's ld.so ignores local dynamic symbols. It's been that way
forever. We therefore can't use them on dynamic relocations. Fixing
that problem uncovered another problem in sorting of dynamic relocs,
caused no doubt by copying make_iplt_section (where we don't want
reloc sorting by the generic gold function, we want iplt relocs last)
to make_lplt_section (where we do want sorting).
PR 30217
* powerpc.cc (branch_needs_plt_entry): New function.
(Target_powerpc::plt_off): Use it here..
(Target_powerpc::Scan::global): ..and here to correct PLT16 reloc
handling for forced-local global symbols.
(Output_data_plt_powerpc::add_entry): Rename "stash"
parameter "is_local". Emit relative relocs for globals that
are forced local, and don't set_needs_dynsym_entry.
(Target_powerpc::make_lplt_section): Don't create a separate
reloc section, use rela_dyn.
(Target_powerpc::make_brlt_section): Likewise.
Alan Modra [Mon, 6 Mar 2023 00:13:53 +0000 (10:43 +1030)]
PR30198, Assertion and segfault when linking x86_64 elf and coff
PR 30198
* coff-x86_64.c (coff_amd64_reloc): Set *error_message when
returning bfd_reloc_dangerous. Also check that __ImageBase is
defined before accessing h->u.def.
Alan Modra [Thu, 23 Feb 2023 07:53:12 +0000 (18:23 +1030)]
PR30155, ld segfault in _bfd_nearby_section
The segfault was a symptom of messing with the absolute section next
field, confusing bfd_section_removed_from_list in linker.c:fix_syms.
That's not all that was going wrong. The INSERT list of output
sections was being inserted into itself, ie. lost from the main
list of linker statements.
PR 30155
* ldlang.c (process_insert_statements): Handle pathological
case of the insert script being inserted before the first
output section statement in the default script.
(output_prev_sec_find): Don't test section owner here.
(insert_os_after): Change parameter to a list union pointer.
(lang_insert_orphan): Test section owner here and adjust
insert_os_after call.
Alan Modra [Thu, 16 Feb 2023 10:17:44 +0000 (20:47 +1030)]
PR30046, power cmpi leads to unknown architecture
PowerPC ELF always uses bfd_arch_powerpc, so we shouldn't allow the
gas -mpwr, -mpwr2 or -mpwrx options to choose bfd_arch_rs6000.
Given the possible values of ppc_cpu, I think the as_fatal at the end
of ppc_arch will never be reached, so it can be deleted and the code
simplified a little.
PR 30046
* config/tc-ppc.c (ppc_arch): Return bfd_arch_powerpc for ELF.
Delete dead code.
Alan Modra [Mon, 6 Feb 2023 02:16:52 +0000 (12:46 +1030)]
ppc32 and "LOAD segment with RWX permissions"
When using a bss-plt we'll always trigger the RWX warning, which
disturbs gcc test results. On the other hand, there may be reason to
want the warning when gcc is configured with --enable-secureplt.
So turning off the warning entirely for powerpc might not be the best
solution. Instead, we'll turn off the warning whenever a bss-plt is
generated, unless the user explicitly asked for the warning.
bfd/
* elf32-ppc.c (ppc_elf_select_plt_layout): Set
no_warn_rwx_segments on generating a bss plt, unless explicity
enabled by the user. Also show the bss-plt warning when
--warn-rwx-segments is given without --bss-plt.
include/
* bfdlink.h (struct bfd_link_info): Add user_warn_rwx_segments.
ld/
* lexsup.c (parse_args): Set user_warn_rwx_segments.
* testsuite/ld-elf/elf.exp: Pass --secure-plt for powerpc to
the rwx tests.
Jan Beulich [Tue, 14 Feb 2023 07:35:02 +0000 (08:35 +0100)]
gas: correct symbol name comparison in .startof./.sizeof. handling
In 162c6aef1f3a ("gas: fold symbol table entries generated for
.startof.() / .sizeof.()") I screwed up quite badly, inverting the case
sensitive and case insensitive comparison functions.
Clément Chigot [Tue, 3 Jan 2023 13:24:43 +0000 (14:24 +0100)]
configure: remove dependencies on gmp and mpfr when gdb is disabled
Since 991180627851801f1999d1ebbc0e569a17e47c74, the configure checks
about GMP and MPFR for gdb builds have been moved to the toplevel
configure.
However, it doesn't take into account the --disable-gdb option. Meaning
that a build without gdb will require these libraries even if not
needed.
ChangeLog:
* configure.ac: Skip GMP and MPFR when --disable-gdb is
provided.
* configure: Regenerate.
bpf: fix error conversion from long unsigned int to unsigned int [-Werror=overflow]
Regenerating BPF target using the maintainer mode emits:
.../opcodes/bpf-opc.c:57:11: error: conversion from ‘long unsigned int’ to ‘unsigned int’ changes value from ‘18446744073709486335’ to ‘4294902015’ [-Werror=overflow]
57 | 64, 64, 0xffffffffffff00ff, { { F (F_IMM32) }, { F (F_OFFSET16) }, { F (F_SRCLE) }, { F (F_OP_CODE) }, { F (F_DSTLE) }, { F (F_OP_SRC) }, { F (F_OP_CLASS) }, { 0 } }
The use of a narrow size to handle the mask CGEN in instruction format
is causing this error. Additionally eBPF `call' instructions
constructed by expressions using symbols (BPF_PSEUDO_CALL) emits
annotations in `src' field of the instruction, used to identify BPF
target endianness.
cpu/
* bpf.cpu (define-call-insn): Remove `src' field from
instruction mask.
include/
*opcode/cge.h (CGEN_IFMT): Adjust mask bit width.
Jan Beulich [Tue, 31 Jan 2023 08:47:22 +0000 (09:47 +0100)]
RISC-V: make C-extension JAL available again for (32-bit) assembly
Along with the normal JAL alias, the C-extension one should have been
moved as well by 839189bc932e ("RISC-V: re-arrange opcode table for
consistent alias handling"), for the assembler to actually be able to
use it where/when possible.
Since neither this nor any other compressed branch insn was being tested
so far, take the opportunity and introduce a new testcase covering those.