Alan Modra [Thu, 11 Aug 2022 00:21:03 +0000 (09:51 +0930)]
PR29466, APP/NO_APP with .linefile
Commit 53f2b36a54b9 exposed a bug in sb_scrub_and_add_sb that could
result in losing input. If scrubbing results in expansion past the
holding capacity of do_scrub_chars output buffer, then do_scrub_chars
stashes the extra input for the next call. That call never came
because sb_scrub_and_add_sb wrongly decided it was done. Fix that by
allowing sb_scrub_and_add_sb to see whether there is pending input.
Also allow a little extra space so that in most cases we won't need
to resize the output buffer.
sb_scrub_and_add_sb also limited output to the size of the input,
rather than the actual output buffer size. Fixing that resulted in a
fail of gas/testsuite/macros/dot with an extra warning: "end of file
not at end of a line; newline inserted". OK, so the macro in dot.s
really does finish without end-of-line. Apparently the macro
expansion code relied on do_scrub_chars returning early. So fix that
too by adding a newline if needed in macro_expand_body.
PR 29466
* app.c (do_scrub_pending): New function.
* as.h: Declare it.
* input-scrub.c (input_scrub_include_sb): Add extra space for
two .linefile directives.
* sb.c (sb_scrub_and_add_sb): Take into account pending input.
Allow output to max.
* macro.c (macro_expand_body): Add terminating newline.
* testsuite/config/default.exp (SIZE, SIZEFLAGS): Define.
* testsuite/gas/macros/app5.d,
* testsuite/gas/macros/app5.s: New test.
* testsuite/gas/macros/macros.exp: Run it.
Alan Modra [Wed, 10 Aug 2022 01:08:52 +0000 (10:38 +0930)]
PR29462, internal error in relocate, at powerpc.cc:10796
Prior to the inline plt call support (commit 08be322439), the only
local syms with plt entries were local ifunc symbols. There shouldn't
be stubs for other local symbols so don't look for them. The patch
also fixes minor bugs in get_reference_flags; Many relocs are valid
only for ppc64 and a couple only for ppc32.
PR 29462
* powerpc.cc (Target_powerpc::Relocate::relocate): Rename
use_plt_offset to pltcal_to_direct, invert logic. For relocs
not used with inline plt sequences against local symbols, only
look for stubs when the symbol is an ifunc.
(Target_powerpc::Scan::get_reference_flags): Correct reloc
handling for relocs not valid for both 32-bit and 64-bit.
Jan Beulich [Wed, 10 Aug 2022 08:34:22 +0000 (10:34 +0200)]
gas/Dwarf: properly skip zero-size functions
PR gas/29451
While out_debug_abbrev() properly skips such functions, out_debug_info()
mistakenly didn't. It needs to calculate the high_pc expression ahead of
time, in order to skip emitting any data for the function if the value
is zero.
The one case which would still leave a zero-size entry is when
symbol_get_obj(symp)->size ends up evaluating to zero. I hope we can
expect that to not be the case, otherwise we'd need to have a way to
post-process .debug_info contents between resolving expressions and
actually writing the data out to the file. Even then it wouldn't be
entirely obvious in which way to alter the data.
ld: aarch64: Update test linker scripts relocs.ld and relocs-ilp32.ld
The updates are to ensure that the .data section exists. This means
that we always have a data section. That means that we don't create a
RWX segment and avoid the corresponding warning.
We get this warning when testing aarch64-none-elf with -mcmodel=tiny.
N.b. this changes quite a few testcases from fail to pass.
Alan Modra [Sun, 31 Jul 2022 09:55:32 +0000 (19:25 +0930)]
PR29348, BFD_VMA_FMT wrong
There is a problem with my commit 0e3c1eebb2, which replaced
bfd_uint64_t with uint64_t: Some hosts typedef int64_t to long long
even when long is the same size as long long. That confuses the code
choosing one of "l", "ll", or "I64" for BFD_VMA_FMT, and results in
warnings.
Write a direct configure test for the printf int64_t style instead.
This removes the last use of BFD_HOST_64BIT_LONG, so delete that.
Note that the changes to configure.com are pure guesswork.
ld: Extend ac_default_ld_warn_rwx_segments to all SPARC targets [PR29411]
As discussed in PR ld/29411, the ld warning
[...] has a LOAD segment with RWX permissions
needs to be disabled on all SPARC targets, not just Solaris/SPARC: the
.plt section is required to be RWX by the 32-bit SPARC ELF psABI and the
64-bit SPARC Compliance Definition 2.4.1. Given that ld only supports
SPARC ELF targets, this patch implements this.
Tested on sparc64-unknown-linux-gnu and sparc-sun-solaris2.11.
Ruud van der Pas [Fri, 22 Jul 2022 12:59:17 +0000 (05:59 -0700)]
gprofng: fix bug 29392 - Unexpected line format in summary file
gprofng/Changelog:
2022-07-22 Ruud van der Pas <ruud.vanderpas@oracle.com>
PR gprofng/29392
* gp-display-html/gp-display-html.in: modified a regex, plus the
code to handle the results; renamed a variable to improve the
consistency in naming.
Ruud van der Pas [Fri, 22 Jul 2022 13:21:49 +0000 (06:21 -0700)]
gprofng: fix bug 29353 - Fix a lay-out issue in the html disassembly files
gprofng/Changelog:
2022-07-22 Ruud van der Pas <ruud.vanderpas@oracle.com>
PR gprofng/29353
* gp-display-html/gp-display-html.in: fixed a problem in the
generation of html for the disassembly where instructions
without arguments were not handled correctly.
Ruud van der Pas [Fri, 22 Jul 2022 13:32:51 +0000 (06:32 -0700)]
gprofng: fix bug 29351 - Move dynamic loading of modules to a later stage
gprofng/Changelog:
2022-07-22 Ruud van der Pas <ruud.vanderpas@oracle.com>
PR gprofng/29351
* gp-display-html/gp-display-html.in: the dynamic loading of
modules occurred too early, resulting in the generation of the
man page to fail in case a module is missing; the loading part is
now done somewhat later in the execution to avoid this problem.
H.J. Lu [Tue, 19 Jul 2022 01:24:26 +0000 (18:24 -0700)]
x86: Disallow invalid relocations against protected symbols
Since glibc 2.36 will issue warnings for copy relocation against
protected symbols and non-canonical reference to canonical protected
functions, change the linker to always disallow such relocations.
bfd/
* elf32-i386.c (elf_i386_scan_relocs): Remove check for
elf_has_indirect_extern_access.
* elf64-x86-64.c (elf_x86_64_scan_relocs): Likewise.
(elf_x86_64_relocate_section): Remove check for
elf_has_no_copy_on_protected.
* elfxx-x86.c (elf_x86_allocate_dynrelocs): Check for building
executable instead of elf_has_no_copy_on_protected.
(_bfd_x86_elf_adjust_dynamic_symbol): Disallow copy relocation
against non-copyable protected symbol.
* elfxx-x86.h (SYMBOL_NO_COPYRELOC): Remove check for
elf_has_no_copy_on_protected.
ld/
* testsuite/ld-i386/i386.exp: Expect linker error for PR ld/17709
test.
* testsuite/ld-i386/pr17709.rd: Removed.
* testsuite/ld-i386/pr17709.err: New file.
* testsuite/ld-x86-64/pr17709.rd: Removed.
* testsuite/ld-x86-64/pr17709.err: New file.
* testsuite/ld-x86-64/pr28875-func.err: Updated.
* testsuite/ld-x86-64/x86-64.exp: Expect linker error for PR
ld/17709 test. Add tests for function pointer against protected
function.
Fangrui Song [Sat, 25 Jun 2022 17:44:26 +0000 (10:44 -0700)]
x86: Make protected symbols local for -shared
Call _bfd_elf_symbol_refs_local_p with local_protected==true. This has
2 noticeable effects for -shared:
* GOT-generating relocations referencing a protected data symbol no
longer lead to a GLOB_DAT (similar to a hidden symbol).
* Direct access relocations (e.g. R_X86_64_PC32) no longer has the
confusing diagnostic below.
Note: if some code tries to use direct access relocations to take the
address of foo, the pointer equality will break, but the error should be
reported on the executable link, not on the innocent shared object link.
glibc 2.36 will give a warning at relocation resolving time.
With this change, `#define elf_backend_extern_protected_data 1` is no
longer effective. Just remove it.
Remove the test "Run protected-func-1 without PIE" since -fno-pic
address taken operation in the executable doesn't work with protected
symbol in a shared object by default. Similarly, remove
protected-data-1a and protected-data-1b. protected-data-1b can be made
working by removing HAVE_LD_PIE_COPYRELOC from GCC
(https://sourceware.org/pipermail/gcc-patches/2022-June/596678.html).
Alan Modra [Sun, 24 Jul 2022 23:55:49 +0000 (09:25 +0930)]
Re: PowerPC64 .branch_lt address
On seeing PR29369 my suspicion was naturally on a recent powerpc64
change, commit 0ab80031430e. Without a reproducer, I spent time
wondering what could have gone wrong, and while I doubt this patch
would have fixed the PR, there are some improvements that can be made
to cater for user silliness.
I also noticed that when -z relro -z now sections are created out of
order, with .got before .plt in the section headers but .got is laid
out at a higher address. That's due to the address expression for
.branch_lt referencing SIZEOF(.got) and so calling init_os (which
creates a bfd section) for .got before the .plt section is created.
Fix that by ignoring SIZEOF in exp_init_os. Unlike ADDR and LOADADDR
which need to reference section vma and lma respectively, SIZEOF can
and does cope with a missing bfd section by returning zero for its
size, which of course is correct.
PR 29369
* ldlang.c (exp_init_os): Don't create a bfd section for SIZEOF.
* emulparams/elf64ppc.sh (OTHER_RELRO_SECTIONS_2): Revise
.branch_lt address to take into account possible user sections
with alignment larger than 8 bytes.
Peter Bergner [Wed, 20 Jul 2022 23:16:05 +0000 (18:16 -0500)]
PowerPC: Create new MMA instruction masks and use them
The MMA instructions use XX3_MASK|3<<21 as an instruction mask, but that
misses the RC bit/bit 31, so if we disassemble a .long that represents an
MMA instruction except that it also has bit 31 set, we will erroneously
disassemble it to that MMA instruction. We create new masks defines that
contain bit 31 so that doesn't happen anymore.
Jan Beulich [Thu, 21 Jul 2022 10:37:07 +0000 (12:37 +0200)]
x86: replace wrong attributes on VCVTDQ2PH{X,Y}
A standalone (without SAE) StaticRounding attribute is meaningless, and
indeed all other similar insns have ATTSyntax there instead. I can only
assume this was some strange copy-and-paste mistake.
Jan Beulich [Thu, 21 Jul 2022 10:36:44 +0000 (12:36 +0200)]
x86/Intel: correct AVX512F scatter insn element sizes
I clearly screwed up in 6ff00b5e12e7 ("x86/Intel: correct permitted
operand sizes for AVX512 scatter/gather") giving all AVX512F scatter
insns Dword element size. Update testcases (also their gather parts),
utilizing that there previously were two identical lines each (for no
apparent reason).
Alan Modra [Thu, 21 Jul 2022 04:01:51 +0000 (13:31 +0930)]
PowerPC64: fix build error on 32-bit hosts
elf64-ppc.c:11673:33: error: format ‘%lx’ expects argument of type ‘long unsigned int’, but argument 3 has type ‘bfd_vma’ {aka ‘long long unsigned int’} [-Werror=format=]
11673 | fprintf (stderr, "offset = %#lx:", stub_entry->stub_offset);
| ~~~^ ~~~~~~~~~~~~~~~~~~~~~~~
| | |
| | bfd_vma {aka long long unsigned int}
| long unsigned int
| %#llx
H.J. Lu [Mon, 18 Jul 2022 18:44:32 +0000 (11:44 -0700)]
x86: Properly check invalid relocation against protected symbol
Only check invalid relocation against protected symbol defined in shared
object.
bfd/
PR ld/29377
* elf32-i386.c (elf_i386_scan_relocs): Only check invalid
relocation against protected symbol defined in shared object.
* elf64-x86-64.c (elf_x86_64_scan_relocs): Likewise.
ld/
PR ld/29377
* testsuite/ld-elf/linux-x86.exp: Run PR ld/29377 tests.
* testsuite/ld-elf/pr29377a.c: New file.
* testsuite/ld-elf/pr29377b.c: Likewise.
Jan Beulich [Mon, 18 Jul 2022 15:31:57 +0000 (17:31 +0200)]
x86: correct VMOVSH attributes
Both forms were missing VexW0 (thus allowing Evex.W=1 to be encoded by
suitable means, which would cause #UD). The memory operand form further
was using the wrong Masking value, thus allowing zeroing-masking to be
encoded for the store form (which would again cause #UD).
Alan Modra [Tue, 12 Jul 2022 01:21:52 +0000 (10:51 +0930)]
PR29355, ld segfaults with -r/-q and custom-named section .rela*
The bug testcase uses an output section named .rel or .rela which has
input .data sections mapped to it. The input .data section has
relocations. When counting output relocations SHT_REL and SHT_RELA
section reloc_count is ignored, with the justification that reloc
sections themselves can't have relocations and some backends use
reloc_count in reloc sections. However, the test wrongly used the
output section type (which normally would match input section type).
Fix that. Note that it is arguably wrong for ld to leave the output
.rel/.rela section type as SHT_REL/SHT_RELA when non-empty non-reloc
sections are written to it, but I'm not going to change that since it
might be useful to hand-craft relocs in a data section that is then
written to a SHT_REL/SHT_RELA output section.
PR 29355
* elflink.c (bfd_elf_final_link): Use input section type rather
than output section type to determine whether to exclude using
reloc_count from that section.
Alan Modra [Thu, 7 Jul 2022 12:33:15 +0000 (22:03 +0930)]
ppc gas: don't leak ppc_hash memory
* config/tc-ppc.c (insn_obstack): New.
(insn_calloc): New function.
(ppc_setup_opcodes): Use insn_obstack for ppc_hash.
(cherry picked from commit a887be69963c40ced36e319e5fb14b3de4b6658b)
Without ppc_md_end since the infrastructure to call that late isn't
available on the branch, and without the multiply overflow check.
Andrew Burgess [Tue, 5 Jul 2022 13:17:14 +0000 (14:17 +0100)]
libopcodes/s390: add support for disassembler styling
This commit adds disassembler style to the libopcodes s390
disassembler. This conversion was pretty straight forward, I just
converted the fprintf_func calls to fprintf_styled_func calls and
added an appropriate style.
For testing the new styling I just assembled then disassembled the
source files in gas/testsuite/gas/s390 and manually checked that the
styling looked reasonable.
If the user does not request styled output from objdump, then there
should be no change in the disassembler output after this commit.
At this point, waitpid has returned an "exited" status for some pid, so
pid is non-zero. Since inferior_ptid is set to null_ptid on entry, the
pid returned by wait is not equal to `inferior_ptid.pid ()`, so we reset
pid to -1 and go to waiting again. Since there are not more children to
wait for, waitpid then returns -1 so we get here:
if (pid == -1)
{
gdb_printf (gdb_stderr,
_("Child process unexpectedly missing: %s.\n"),
safe_strerror (save_errno));
/* Claim it exited with unknown signal. */
ourstatus->set_signalled (GDB_SIGNAL_UNKNOWN);
return inferior_ptid;
}
We therefore return a "signalled" status with a null_ptid (again,
inferior_ptid is null_ptid). This confuses infrun, because if the
target returns a "signalled" status, it should be coupled with a ptid
for an inferior that exists.
So, the first step is to fix the snippets above to not use
inferior_ptid. In the first snippet, use find_inferior_pid to see if
we know the event process. If there is no inferior with that pid, we
assume it's a detached child process to we ignore the event. That
should be enough to fix the problem, because it should make it so we
won't go into the second snippet. But still, fix the second snippet to
return an "ignore" status. This is copied from inf_ptrace_target::wait,
which is where rs6000_nat_target::wait appears to be copied from in the
first place.
These changes, are not sufficient, as the aix_thread_target, which sits
on top of rs6000_nat_target, also relies on inferior_ptid.
aix_thread_target::wait, by calling pd_update, assumes that
rs6000_nat_target has set inferior_ptid to the appropriate value (the
ptid of the event thread), but that's not the case. pd_update
returns inferior_ptid - null_ptid - and therefore
aix_thread_target::wait returns null_ptid too, and we still hit the
assert shown above.
Fix this by changing pd_activate, pd_update, sync_threadlists and
get_signaled_thread to all avoid using inferior_ptid. Instead, they
accept as a parameter the pid of the process we are working on.
With this patch, I am able to run the program to completion:
Pedro Alves [Thu, 7 Jul 2022 12:05:50 +0000 (13:05 +0100)]
Fix pedantically invalid DWARF in gdb.trace/unavailable-dwarf-piece.exp
The DWARF spec says:
Any debugging information entry representing the declaration of an object,
module, subprogram or type may have DW_AT_decl_file, DW_AT_decl_line and
DW_AT_decl_column attributes, each of whose value is an unsigned integer
^^^^^^^^
constant.
Grepping around the DWARF-assembler-based testcases, I noticed that
gdb.trace/unavailable-dwarf-piece.exp emits decl_line with
DW_FORM_sdata, a signed integer form. This commit tweaks it to use
DW_FORM_udata instead.
Unsurprisingly, this:
$ make check \
TESTS="gdb.trace/unavailable-dwarf-piece.exp" \
RUNTESTFLAGS="--target_board=native-gdbserver"
... still passes cleanly for me after this change.
I've noticed this because current llvm-dwarfdump crashed on an
ROCm-internal DWARF-assembler-based testcase that incorrectly used
signed forms for DW_AT_decl_file/DW_AT_decl_line.
The older llvm-dwarfdump found on Ubuntu 20.04 (LLVM 10) reads the
line numbers with signed forms as "0" instead of crashing. Here's the
before/after fix for gdb.trace/unavailable-dwarf-piece.exp with that
llvm-dwarfdump version:
GDB/testsuite: Add coverage for `print -elements' command
We currently have no coverage for the `print -elements ...' command (or
`p -elements ...' in the shortened form), so add a couple of test cases
mimicking ones using corresponding `set print elements ...' values.
Tiezhu Yang [Thu, 7 Jul 2022 06:33:19 +0000 (14:33 +0800)]
gdb: LoongArch: Implement the push_dummy_call gdbarch method
According to "Procedure Calling Convention" in "LoongArch ELF ABI
specification" [1], implement the push_dummy_call gdbarch method
as clear as possible.
Tsukasa OI [Mon, 27 Jun 2022 02:03:43 +0000 (11:03 +0900)]
RISC-V: Added Zfhmin and Zhinxmin.
This commit adds Zfhmin and Zhinxmin extensions (subsets of Zfh and
Zhinx extensions, respectively). In the process supporting Zfhmin and
Zhinxmin extension, this commit also changes how instructions are
categorized considering Zfhmin, Zhinx and Zhinxmin extensions.
Detailed changes,
* From INSN_CLASS_ZFH to INSN_CLASS_ZFHMIN:
flh, fsh, fmv.x.h and fmv.h.x.
* From INSN_CLASS_ZFH to INSN_CLASS_ZFH_OR_ZHINX:
fmv.h.
* From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFH_OR_ZHINX:
* From INSN_CLASS_ZFH_OR_ZHINX to INSN_CLASS_ZFHMIN_OR_ZHINXMIN:
fcvt.s.h and fcvt.h.s.
* From INSN_CLASS_D_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_D:
fcvt.d.h and fcvt.h.d.
* From INSN_CLASS_Q_AND_ZFH_INX to INSN_CLASS_ZFHMIN_AND_Q:
fcvt.q.h and fcvt.h.q.
bfd/ChangeLog:
* elfxx-riscv.c (riscv_implicit_subsets): Change implicit
subsets. Zfh->Zicsr is not needed and Zfh->F is replaced with
Zfh->Zfhmin and Zfhmin->F. Zhinx->Zicsr is not needed and
Zhinx->Zfinx is replaced with Zhinx->Zhinxmin and
Zhinxmin->Zfinx.
(riscv_supported_std_z_ext): Added zfhmin and zhinxmin.
(riscv_multi_subset_supports): Rewrite handling for new
instruction classes.
(riscv_multi_subset_supports_ext): Updated.
(riscv_parse_check_conflicts): Change error message to include
zfh and zfhmin extensions.
Tsukasa OI [Mon, 27 Jun 2022 02:03:44 +0000 (11:03 +0900)]
RISC-V: Fix disassembling Zfinx with -M numeric
This commit fixes floating point operand register names from ABI ones
to dynamically set ones.
gas/ChangeLog:
* testsuite/gas/riscv/zfinx-dis-numeric.s: Test new behavior of
Zfinx extension and -M numeric disassembler option.
* testsuite/gas/riscv/zfinx-dis-numeric.d: Likewise.
opcodes/ChangeLog:
* riscv-dis.c (riscv_disassemble_insn): Use dynamically set GPR
names to disassemble Zfinx instructions.
Tsukasa OI [Fri, 24 Jun 2022 02:59:04 +0000 (11:59 +0900)]
RISC-V: Fix requirement handling on Zhinx+{D,Q}
This commit fixes how instructions are masked on Zhinx+Z{d,q}inx.
fcvt.h.d and fcvt.d.h require ((D&&Zfh)||(Zdinx&&Zhinx)) and
fcvt.h.q and fcvt.q.h require ((Q&&Zfh)||(Zqinx&&Zhinx)).
bfd/ChangeLog:
* elfxx-riscv.c (riscv_multi_subset_supports): Fix feature gate
on INSN_CLASS_{D,Q}_AND_ZFH_INX.
(riscv_multi_subset_supports_ext): Fix feature gate diagnostics
on INSN_CLASS_{D,Q}_AND_ZFH_INX.
gas/ChangeLog:
* testsuite/gas/riscv/fp-zhinx-insns.d: Add Zqinx to -march
for proper testing.
projects / thirdparty / binutils-gdb.git / log
