* tree-vect-slp.c (vect_slp_analyze_bb_1): Split out core part
of vect_analyze_bb here.
(vect_analyze_bb): Loop over vector sizes calling
vect_analyze_bb_1.
Teach sparc backend about %gsr register and add intrinsics to access it.
* config/sparc/sparc.h (FIRST_PSEUDO_REGISTER): Bump to 103.
(SPARC_GSR_REG): Define.
(FIXED_REGISTERS): Mark GSR as fixed.
(CALL_USED_REGISTERS): Mark GSR as call used.
(HARD_REGNO_NREGS): GSR is always 1 register.
(REG_CLASS_CONTENTS): Add GSR to ALL_REGS.
(REG_ALLOC_ORDER, REG_LEAF_ALLOC_ORDER): Add GSR to the end.
(REGISTER_NAMES): Add "%gsr".
* config/sparc/sparc.md (UNSPEC_ALIGNADDR, UNSPEC_ALIGNADDRL):
Delete.
(UNSPEC_WRGSR): New unspec.
(GSR_REG): New constant.
(type): Add new insn type 'gsr'.
(fpack16_vis, fpackfix_vis, fpack32_vis,
faligndata<V64I:MODE>_vis)): Add use of GSR_REG.
(wrgsr_vis, *wrgsr_sp64, wrgsr_v8plus, rdgsr_vis, *rdgsr_sp64,
rdgsr_v8plus): New expanders and insns.
(alignaddr<P:mode>_vis, alignaddrl<P:mode>_vis): Reimplement
using patterns which show that this is a plus in addition to a
modification of GSR_REG, instead of an unspec.
* config/sparc/ultra1_2.md: Handle 'gsr'.
* config/sparc/ultra3.md: Likewise.
* config/sparc/niagara.md: Likewise.
* config/sparc/niagara2.md: Likewise.
* config/sparc/sparc.c (leaf_reg_remap, sparc_leaf_regs): Fill out
end of table.
(sparc_option_override): Make -mvis imply -mv8plus.
(hard_32bit_mode_classes, hard_64bit_mode_classes): Add entries
for %gsr.
(sparc_vis_init_builtins): Build __builtin_vis_write_gsr and
__builtin_vis_read_gsr.
(sparc_expand_buildin): Handle builtins that take one argument and
return void.
(sparc_fold_builtin): Never fold writes to %gsr.
* config/sparc/visintrin.h (__vis_write_gsr, __vis_read_gsr): New.
* doc/extend.texi: Document new VIS intrinsics.
jason [Sun, 25 Sep 2011 02:26:01 +0000 (02:26 +0000)]
Handle deferred parsing of NSDMIs.
* parser.h (cp_unparsed_functions_entry): Add nsdmis field.
* parser.c (unparsed_nsdmis, cp_parser_save_nsdmi): New.
(cp_parser_late_parse_one_default_arg): Split out from
cp_parser_late_parsing_default_args.
(cp_parser_late_parsing_nsdmi): New.
(push_unparsed_function_queues): Set it.
(cp_parser_parameter_declaration): Save the '=' token.
(cp_parser_template_parameter): Likewise.
(cp_parser_default_argument): Call cp_parser_initializer
rather than cp_parser_initializer_clause.
(cp_parser_class_specifier_1): Parse unparsed_nsdmis.
(cp_parser_member_declaration): Handle nsdmis.
* decl2.c (grokfield): Handle DEFAULT_ARG for a function.
ada, remove flat_namespace library option from darwin port build/defaults :
* gcc-interface/Makefile.in (darwin): Do not issue the
'-flat_namespace' linker flag during Ada build.
* mlib-tgt-specific-darwin.adb: Remove '-flat_namespace' flag from the
default shared library options.
PR 40831
* cp-demangle.c (d_make_comp): Add new component type.
(cplus_demangle_mangled_name): Check for clone suffixes.
(d_parmlist): Don't error out if we see '.'.
(d_clone_suffix): New function.
(d_print_comp): Print info for clone suffixes.
* testsuite/demangle-expected: Add new testcases.
jason [Fri, 23 Sep 2011 21:30:48 +0000 (21:30 +0000)]
Core 234 - allow const objects with no initializer or
user-provided default constructor if the defaulted constructor
initializes all the subobjects.
PR c++/20039
PR c++/42844
* class.c (default_init_uninitialized_part): New.
* cp-tree.h: Declare it.
* decl.c (check_for_uninitialized_const_var): Use it.
* init.c (perform_member_init): Likewise.
(build_new_1): Likewise.
* method.c (walk_field_subobs): Likewise.
* gcc.dg/ipa/inline-1.c: new testcase.
* gcc.dg/ipa/inline-2.c: new testcase.
* gcc.dg/ipa/inline-3.c: new testcase.
* gcc.dg/ipa/inline-4.c: new testcase.
* ipa-inline-transform.c (inline_call): Add comment.
* ipa-inline.h (inline_param_summary): New structure and vector.
(struct inline_edge_summary): Add param field.
* ipa-inline-analysis.c (CHANGED): New constant.
(add_clause): Handle CHANGED and NOT_CONSTANT.
(predicate_probability): New function.
(dump_condition): Dump CHANGED predicate.
(evaluate_conditions_for_known_args): Handle ERROR_MARK as marker
of unknown function wide invariant.
(evaluate_conditions_for_edge): Handle change probabilities.
(inline_edge_duplication_hook): Copy param summaries.
(inline_edge_removal_hook): Free param summaries.
(dump_inline_edge_summary): Fix dumping of indirect edges and callee sizes;
dump param summaries.
(will_be_nonconstant_predicate): Use CHANGED predicate.
(record_modified_bb_info): New structure.
(record_modified): New function.
(param_change_prob): New function.
(estimate_function_body_sizes): Compute param summaries.
(estimate_edge_size_and_time): Add probability argument.
(estimate_node_size_and_time): Add inline_param_summary argument;
handle predicate probabilities.
(remap_predicate): Fix formating.
(remap_edge_change_prob): New function.
(remap_edge_summaries): Rename from ...; use remap_edge_change_prob.
(remap_edge_predicates): ... this one.
(inline_merge_summary): Remap edge summaries; handle predicate probabilities;
remove param summaries after we are done.
(do_estimate_edge_time): Update.
(do_estimate_edge_growth): Update.
(read_inline_edge_summary): Read param info.
(inline_read_summary): Fix formating.
(write_inline_edge_summary): Write param summaries.
jakub [Fri, 23 Sep 2011 17:10:39 +0000 (17:10 +0000)]
* config/i386/i386.c (ix86_print_operand): Handle %~.
(ix86_print_operand_punct_valid_p): Return true also for '~'.
* config/i386/sse.md (i128): New mode_attr.
(vec_extract_hi_<mode>, vec_extract_hi_<mode>,
avx_vbroadcastf128_<mode>, *avx_vperm2f128<mode>_full,
*avx_vperm2f128<mode>_nozero, vec_set_lo_<mode>,
vec_set_hi_<mode>, *vec_concat<mode>_avx): Use <i128> in the
patterns, use "<sseinsnmode>" for "mode" attribute.
(vec_extract_hi_v16hi, vec_extract_hi_v32qi, vec_set_lo_v16hi,
vec_set_hi_v16hi, vec_set_lo_v32qi, vec_set_hi_v32qi): Use
%~128 in the patterns, use "OI" for "mode" attribute.
PR target/50447
* config/avr/avr.md: (adjust_len): Add alternative "out_plus".
(addsi3): Rewrite using QI scratch register. Adjust text
peepholes using plus:SI.
(*addsi3_zero_extend.hi): New insn.
(*subsi3_zero_extend.hi): New insn.
(*subhi3_zero_extend1): Set attribute "cc" to "set_czn".
(*subsi3_zero_extend): Ditto.
(subsi3): Change predicate #2 to register_operand.
* config/avr/avr-protos.h (avr_out_plus): New prototype.
(avr_out_plus_1): New static function.
(avr_out_plus): New function.
(adjust_insn_length): Handle ADJUST_LEN_OUT_PLUS.
* ipa-prop.h (jump_func_type): Updated comments.
(ipa_known_type_data): New type.
(ipa_jump_func): Use it to describe known type jump functions.
* ipa-prop.c (ipa_print_node_jump_functions_for_edge): Updated to
reflect the new known type jump function contents.
(compute_known_type_jump_func): Likewise.
(combine_known_type_and_ancestor_jfs): Likewise.
(try_make_edge_direct_virtual_call): Likewise.
(ipa_write_jump_function): Likewise.
(ipa_read_jump_function): Likewise.
* ipa-cp.c (ipa_value_from_known_type_jfunc): New function.
(ipa_value_from_jfunc): Use ipa_value_from_known_type_jfunc.
(propagate_accross_jump_function): Likewise.
PR target/50446
* config/avr/avr.md (rotlqi3): Support all offsets 0..7.
(rotlqi3_4): Turn insn into expander.
(*rotlqi3): New insn.
(rotlhi3, rotlsi3): Support rotate left/right by 1.
(*rotlhi2.1, *rotlhi2.15): New insns.
(*rotlsi2.1, *rotlsi2.31): New insns.
* config/avr/constraints.md (C03, C05, C06, C07): New constraints.
* config/sparc/sparc.md (G[0-7]_REG, O[0-7]_REG, L[0-7]_REG,
I[0-7]_REG, F[0-62]_REG, FCC[0-3]_REG, CC_REG, SFP_REG): New
constants. Use them everywhere.
PR target/50482
* config/i386/i386.c (ix86_expand_sse_movcc): When generating
blendv, force op_true to register if it doesn't satisfy
nonimmediate_operand predicate.
testsuite/ChangeLog:
PR target/50482
* gcc.target/i386/pr50482.c: New test.
gcc/
PR middle-end/50113
PR middle-end/50061
* calls.c (emit_library_call_value_1): Use BLOCK_REG_PADDING to
get the locate.where_pad value for register-only arguments.
* config/arm/arm.c (arm_pad_arg_upward): Remove HFmode handling.
(arm_pad_reg_upward): Handle null types.
* ipa-inline-transform.c (inline_call): Always update jump functions
after inlining.
* ipa-inline.c (ipa_inline): Likewise; do not call
ipa_create_all_structures_for_iinln.
(ipa_inline): Always free jump functions.
* ipa-inline-analysis.c (evaluate_conditions_for_edge): Remove
hack.
(remap_edge_predicates): Fix pasto.
(inline_merge_summary): Remove nlined edge predicate; remove hack.
(inline_analyze_function): Always initialize jump functions.
(inline_generate_summary): Likewise.
(inline_write_summary): Always write jump functions when ipa-cp
is not doing that.
(inline_read_summary): Always read jump functions when ipa-cp
is not doing that.
* ipa-prop.c (iinlining_processed_edges): Remove.
(update_indirect_edges_after_inlining): Do not use
iinlining_processed_edges; instead set param_index to -1.
(propagate_info_to_inlined_callees): Only try to indirect inlining
when asked to do so; update jump functions of indirect calls, too;
remove jump functions of the inlined edge.
(ipa_edge_duplication_hook): Do not copy iinlining_processed_edges.
(ipa_create_all_structures_for_iinln): Remove.
(ipa_free_all_structures_after_iinln): Do not free
iinlining_processed_edges.
* ipa-prop.h (ipa_create_all_structures_for_iinln): Remove.
PR target/50464
* config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Change
operand 1 predicate to register_operand and operand 2 predicate
to nonimmediate_operand.
* config/i386/i386.c (ix86_expand_sse_movcc): When generating
xop_pcmov, force op_true to register. Also, force op_false to
register if it doesn't satisfy nonimmediate_operand predicate.
testsuite/ChangeLog:
PR target/50464
* g++.dg/other/pr50464.C: New test.
jakub [Wed, 21 Sep 2011 11:39:23 +0000 (11:39 +0000)]
* config/i386/sse.md (<code><mode>3 smaxmin:VI124_128 expander): Use
nonimmediate_operand instead of register_operand predicate for operands
1 and 2, force them into registers if expanding them as comparison.
(<code><mode>3 umaxmin:VI124_128 expander): Similarly. For UMAX
V8HImode force into register just operand 1.
PR target/50449
PR target/50465
* config/avr/avr.md (adjust_len): New insn attribute.
(*reload_insi, *reload_insf): Use it.
(*movsi, *movsf): Use new interface of output_movsisf.
* config/avr/avr-protos.h (output_movsisf): Change prototype.
* config/avr/avr.c (output_movsisf): Ditto.
(adjust_insn_length): Use insn attribute "adjust_len" to adjust
lengths of insns *reload_insi, *reload_insf.
(output_reload_insisf_1): New static function.
(output_reload_insisf): Use it.
* config/sparc/sparc.c (def_builtin): Change from macro into function.
(def_builtin_const): New.
(sparc_vis_init_builtins): Use def_builtin_const for all VIS builtins
other than alignaddr and falignaddr.
* config/sparc/sparc.md (UNSPEC_ALIGNADDRL): New unspec.
(aligneddrl<P:mode>_vis): New pattern.
(edge8_vis, edge8l_vis, edge16_vis, edge16l_vis, edge32_vis,
edge32l_vis): Adjust to take Pmode arguments, and return SImode.
* config/sparc/sparc.c (sparc_vis_init_builtins): Handle new
alignaddrl insn, and adjust edge operations for updated types.
* config/sparc/visintrin.h: Likewise.
* doc/extend.texi: Make typing in VIS documentation match reality.
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