Use vpermil{ps,pd} instead of vperm{d,q} when permutation is in-lane.
gcc/ChangeLog:
* config/i386/i386-expand.cc (expand_vec_perm_vpermil): Extend
to handle V8SImode.
* config/i386/i386.cc (avx_vpermilp_parallel): Extend to
handle vector integer modes with same vector size and same
component size.
* config/i386/sse.md
(<sse2_avx_avx512f>_vpermilp<mode><mask_name>): Ditto.
(V48_AVX): New mode iterator.
(ssefltmodesuffix): Extend for V16SI/V8DI/V16SF/V8DF.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx256_avoid_vec_perm-3.c: New test.
* gcc.target/i386/avx256_avoid_vec_perm-4.c: New test.
* gcc.target/i386/avx512bw-vpalignr-4.c: Adjust testcase.
* gcc.target/i386/avx512vl-vpalignr-4.c: Ditto.
liuhongt [Wed, 20 Aug 2025 05:46:40 +0000 (22:46 -0700)]
Exclude fake cross-lane permutation from avx256_avoid_vec_perm.
SLP may take a broadcast as kind of vec_perm, the patch checks the
permutation index to exclude those false positive.
gcc/ChangeLog:
* config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
Check permutation index for vec_perm, don't count it if we
know it's not a cross-lane permutation.
gcc/testsuite/ChangeLog:
* gcc.target/i386/avx256_avoid_vec_perm.c: Adjust testcase.
* gcc.target/i386/avx256_avoid_vec_perm-2.c: New test.
* gcc.target/i386/avx256_avoid_vec_perm-5.c: New test.
H.J. Lu [Fri, 5 Sep 2025 22:40:51 +0000 (15:40 -0700)]
c: Update TLS model after processing a TLS variable
Set a tentative TLS model in grokvardecl and update TLS mode with the
default TLS access model after a TLS variable has been fully processed
if the default TLS access model is stronger.
gcc/c/
PR c/107419
* c-decl.cc (c_decl_attributes): Update TLS model with the
default TLS access model if the default TLS access model is
stronger.
(grokdeclarator): Set a tentative TLS model which will be
updated by c_decl_attributes later.
Eric Botcazou [Mon, 8 Sep 2025 17:41:20 +0000 (19:41 +0200)]
Ada: Make -fdump-ada-spec deal with pointers to anonymous structure
This is about -fdump-ada-spec not generating the definition of the structure
for pointers to anonymous structure as structure elements.
gcc/c-family:
PR ada/121544
* c-ada-spec.cc (dump_ada_node) <POINTER_TYPE>: Dump the name of
anonymous tagged pointed-to types specially.
(dump_nested_type) <POINTER_TYPE>: Recurse on anonymous pointed-to
types declared in the same file.
Set TREE_VISITED on the underlying DECL of the field type, if any.
Eric Botcazou [Mon, 8 Sep 2025 17:18:59 +0000 (19:18 +0200)]
Testsuite: Fix spurious of ACATS-4 test cxai033
This tentatively applies the same tweak as in other similar cases.
gcc/testsuite/
PR ada/121532
* ada/acats-4/tests/cxa/cxai033.a: Use Long_Switch_To_New_Task
constant instead of Switch_To_New_Task in delay statements.
Nathan Myers [Thu, 28 Aug 2025 17:11:57 +0000 (13:11 -0400)]
libstdc++: Make syncbuf _S_get_mutex definition extern.
This patch creates a global function __syncbuf_get_mutex, gated by
_GLIBCXX_HAS_GTHREADS, replacing a static instantiated member
_S_get_mutex used in syncbuf<> construction, and makes the global
symbol visible. A static local table of 16 mutexes is shared among
all specializations of syncbuf<>, chosen on construction by a hash
of the wrapped streambuf's address.
It detaches the implementation of _S_get_mutex from the C++20 ABI.
libstdc++-v3/ChangeLog:
* include/std/syncstream: (syncbuf<>::__mutex) Remove _S_get_mutex,
use extern function instead.
* src/c++20/syncbuf.cc: Define global __syncbuf_get_mutex.
* src/c++20/Makefile.am: Mention syncbuf.cc.
* src/c++20/Makefile.in: Regenerate.
* config/abi/pre/gnu.ver: Mention mangled __syncbuf_get_mutex.
Xi Ruoyao [Mon, 8 Sep 2025 13:46:56 +0000 (21:46 +0800)]
testsuite: Another fixup for fixed-point/bitint-1.c test
Besides r16-3595, there's another bug in this test: with -std=c23 the
token _Sat isn't recognized as a keyword at all, thus an error massage
different from the expected will be outputted.
Fix it by using -std=gnu23 instead.
gcc/testsuite:
* gcc.dg/fixed-point/bitint-1.c (dg-options): Use -std=gnu23
instead of -std=c23.
Richard Biener [Mon, 8 Sep 2025 12:32:38 +0000 (14:32 +0200)]
tree-optimization/121844 - IVOPTs and asm goto in latch
When there's an asm goto in the latch of a loop we may not use
IP_END IVs since instantiating those would (need to) split the
latch edge which in turn invalidates IP_NORMAL position handling.
This is a revision of the PR107997 fix.
PR tree-optimization/107997
PR tree-optimization/121844
* tree-ssa-loop-ivopts.cc (allow_ip_end_pos_p): Do not allow
IP_END for latches ending with a control stmt.
(create_new_iv): Do not split the latch edge, instead assert
that's not necessary.
Bumping branch_cost from 3 to 4 triggers if-conversion, improving the
nbench FP EMULATION result on Ascalon significantly. There's a risk
that more aggressive use of conditional zero instructions will negatively
impact workloads that predict well, but we haven't seen anything obvious.
gcc/ChangeLog:
* config/riscv/riscv.cc (tt_ascalon_d8_tune_info): Increase branch_cost
from 3 to 4.
Richard Biener [Mon, 8 Sep 2025 11:25:37 +0000 (13:25 +0200)]
tree-optimization/121830 - SLP cycle detection confused by nested cycle
The SLP reduc-index computation is confused by having an outer reduction
inner loop nested cycle fed by another non-reduction nested cycle.
Instead of undoing the unfortunate mixing of outer reduction inner
cycles with general nested cycles the following instead distinguishes
them by not setting STMT_VINFO_REDUC_DEF on the non-reduction nested
cycles.
PR tree-optimization/121830
* tree-vect-loop.cc (vect_analyze_scalar_cycles_1): Only
set STMT_VINFO_REDUC_DEF on reductions.
* tree-vect-slp.cc (vect_build_slp_tree_2): Identify reduction
PHIs by a set STMT_VINFO_REDUC_DEF instead of their def type.
Richard Biener [Mon, 8 Sep 2025 10:40:30 +0000 (12:40 +0200)]
tree-optimization/121829 - bogus CFG with asm goto
When the vectorizer removes a forwarder created earlier by split_edge
it uses redirect_edge_pred for convenience and efficiency. That breaks
down when the edge split is originating from an asm goto as that is
a jump that needs adjustments from redirect_edge_and_branch. The
following factores a simple vect_remove_forwarder handling this
situation appropriately.
PR tree-optimization/121829
* tree-vect-loop-manip.cc (vect_remove_forwarder): New
function.
(slpeel_tree_duplicate_loop_to_edge_cfg): Use it.
[AutoFDO] Check count initialization to fix ICE with AutoFDO
Fix ICE with AutoFDO by adding initialization check
before accessing IPA counts to avoid issues with uninitialized profile
counts in self-recursive clone processing.
RISC-V: Add pattern for vector-scalar single-width floating-point reverse sub
This pattern enables the combine pass (or late-combine, depending on the case)
to merge a vec_duplicate into a minus RTL instruction. The vec_duplicate is the
minuend operand.
Before this patch, we have two instructions, e.g.:
vfmv.v.f v2,fa0
vfsub.vv v1,v2,v1
After, we get only one:
vfrsub.vf v1,v1,fa0
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*vfrsub_vf_<mode>): New pattern to
combine vec_duplicate + vfsub.vv into vfrsub.vf.
RISC-V: Add pattern for vector-scalar single-width floating-point sub
This pattern enables the combine pass (or late-combine, depending on the case)
to merge a vec_duplicate into a minus RTL instruction. The vec_duplicate is the
subtrahend operand.
Before this patch, we have two instructions, e.g.:
vfmv.v.f v2,fa0
vfsub.vv v1,v1,v2
After, we get only one:
vfsub.vf v1,v1,fa0
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*vfsub_vf_<mode>): New pattern to
combine vec_duplicate + vfsub.vv into vfsub.vf.
* config/riscv/vector.md (@pred_<optab><mode>_scalar): Allow VLS modes.
RISC-V: Add pattern for vector-scalar widening floating-point multiply
This pattern enables the combine pass (or late-combine, depending on the case)
to merge a float_extend'ed vec_duplicate into a mult RTL instruction.
Before this patch, we have six instructions, e.g.:
fcvt.d.s fa0,fa0
vsetvli a5,zero,e64,m1,ta,ma
vfmv.v.f v3,fa0
vfwcvt.f.f.v v1,v2
vsetvli zero,zero,e64,m1,ta,ma
vfmul.vv v1,v3,v1
After, we get only one:
vfwmul.vf v1,v2,fa0
gcc/ChangeLog:
* config/riscv/autovec-opt.md (*vfwmul_vf_<mode>): New pattern to
combine float_extend + vec_duplicate + vfmul.vv into vfmul.vf.
* config/riscv/vector.md (*@pred_dual_widen_<optab><mode>_scalar):
Swap operands to match the RTL emitted by expand, i.e. first
float_extend then vec_duplicate.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f16.c: Add vfwmul.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-1-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-2-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-3-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f16.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf-4-f32.c: Likewise.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_binop.h: Add support for
widening variants.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_binop_widen_run.h: New test
helper.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmul-run-1-f16.c: New test.
* gcc.target/riscv/rvv/autovec/vx_vf/vf_vfwmul-run-1-f32.c: New test.
Jakub Jelinek [Mon, 8 Sep 2025 09:49:58 +0000 (11:49 +0200)]
libstdc++: Fix up <ext/pointer.h> [PR121827]
During the tests mentioned in
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/692482.html
(but dunno why I haven't noticed it back in August but only when testing
https://gcc.gnu.org/pipermail/gcc-patches/2025-September/694527.html )
I've noticed two ext header problems.
One is that #include <ext/pointer.h> got broken with the r13-3037-g18f176d0b25591e28 change and since then is no longer
self-contained, as it includes iosfwd only if _GLIBCXX_HOSTED is defined
but doesn't actually include bits/c++config.h to make sure it is defined,
then includes a bunch of headers which do include bits/c++config.h and
finally uses in #if _GLIBCXX_HOSTED guarded code what is declared in iosfwd.
The other problem is that ext/cast.h is also not a self-contained header,
but that one has
/** @file ext/cast.h
* This is an internal header file, included by other library headers.
* Do not attempt to use it directly. @headername{ext/pointer.h}
*/
comment, so I think we just shouldn't include it in extc++.h and let
ext/pointer.h include it.
2025-09-08 Jakub Jelinek <jakub@redhat.com>
PR libstdc++/121827
* include/precompiled/extc++.h: Don't include ext/cast.h which is an
internal header.
* include/ext/pointer.h: Include bits/c++config.h before
#if _GLIBCXX_HOSTED.
libstdc++: Update link to "Tunables" in Glibc manual
libstdc++-v3:
* doc/xml/manual/using_exceptions.xml: Update link to "Tunables"
section in the Glibc manual.
* doc/html/manual/using_exceptions.html: Regenerate.
* include/std/span (__integral_constant_like): Allow the member
`value` of a constant wrapping type to be a const reference of
an integer.
* testsuite/23_containers/mdspan/extents/misc.cc: Add test for
cw and constant_wrapper.
* testsuite/23_containers/mdspan/mdspan.cc: Ditto.
* testsuite/23_containers/span/deduction.cc: Ditto.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com>
libstdc++: Implement constant_wrapper, cw from P2781R9.
This is a partial implementation of P2781R9. It adds std::cw and
std::constant_wrapper, but doesn't modify __integral_constant_like for
span/mdspan.
libstdc++-v3/ChangeLog:
* include/bits/version.def (constant_wrapper): Add.
* include/bits/version.h: Regenerate.
* include/std/type_traits (_CwFixedValue): New class.
(_IndexSequence): New struct.
(_BuildIndexSequence): New struct.
(_ConstExprParam): New concept.
(_CwOperators): New struct.
(constant_wrapper): New struct.
(cw): New global constant.
* src/c++23/std.cc.in (constant_wrapper): Add.
(cw): Add.
* testsuite/20_util/constant_wrapper/adl.cc: New test.
* testsuite/20_util/constant_wrapper/ex.cc: New test.
* testsuite/20_util/constant_wrapper/generic.cc: New test.
* testsuite/20_util/constant_wrapper/instantiate.cc: New test.
* testsuite/20_util/constant_wrapper/op_comma_neg.cc: New test.
* testsuite/20_util/constant_wrapper/version.cc: New test.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Co-authored-by: Tomasz Kamiński <tkaminsk@redhat.com> Signed-off-by: Luc Grosheintz <luc.grosheintz@gmail.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
Paul Thomas [Mon, 8 Sep 2025 07:13:07 +0000 (08:13 +0100)]
Fortran: Correct variable typespec in PDT specification exprs [PR84008]
2025-09-08 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/84008
* decl.cc (insert_parameter_exprs): Correct the typespec of new
variable declarations, where the type is set to BT_PROCEDURE as
a precaution for resolution of the whole program unit.
gcc/testsuite/
PR fortran/84008
* gfortran.dg/pdt_45.f03: New test.
Andrew Pinski [Sat, 19 Apr 2025 16:14:54 +0000 (09:14 -0700)]
strlen: Handle empty constructor as memset for combining with malloc to calloc [PR87900]
This was noticed when turning memset (with constant size) into a store of an empty constructor
but can be reproduced without that.
In this case we have the following IR:
```
p_3 = __builtin_malloc (4096);
*p_3 = {};
```
Which we can treat the store as a memset.
So this patch adds the similar optimization as memset/malloc now for malloc/constructor.
This patch is on top of https://gcc.gnu.org/pipermail/gcc-patches/2025-April/681439.html
(it calls allow_memset_malloc_to_calloc but that can be removed if that patch is rejected).
Changes since v1:
* v2: Correctly return false from handle_assign after removing stmt.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/87900
gcc/ChangeLog:
* tree-ssa-strlen.cc (strlen_pass::handle_assign): Add RHS argument.
For empty constructor RHS, see if can combine with a previous malloc into
a calloc.
(strlen_pass::check_and_optimize_call): Update call to handle_assign;
passing NULL_TREE for RHS.
(strlen_pass::check_and_optimize_stmt): Update call to handle_assign.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/calloc-10.c: New test.
* gcc.dg/tree-ssa/calloc-11.c: New test.
* gcc.dg/tree-ssa/calloc-12.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Andrew Pinski [Sat, 19 Apr 2025 00:06:33 +0000 (17:06 -0700)]
strlen: Don't do the malloc+memset->calloc optimization in some cases [PR83022]
This fixes a long standing (since GCC 5) issue where the malloc+memset->calloc
optimization would happen even if the memset was not always executed.
This is a varient of Nathan's patch: https://inbox.sourceware.org/gcc-patches/f4b5d106-8176-b7bd-709b-d435188783b0@acm.org/
Jeff Law had suggested to look at probabilities of the basic blocks to see
if it is profitable or not; I am not totally convinced that is a good idea.
Though this is an extended version of Nathan's patch as it uses post domination to see
if the memset is always called after the condition of null-ness.
PR tree-optimization/83022
gcc/ChangeLog:
* tree-ssa-strlen.cc (last_stmt_ptr_check): New function.
(allow_memset_malloc_to_calloc): New function.
(strlen_pass::handle_builtin_memset): Check to see if it is a good
idea to do the malloc+memset->calloc optimization.
(printf_strlen_execute): Free post dom info.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/calloc-6.c: New test.
* gcc.dg/tree-ssa/calloc-7.c: New test.
* gcc.dg/tree-ssa/calloc-8.c: New test.
* gcc.dg/tree-ssa/calloc-9.c: New test.
Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Andrew Pinski [Sun, 7 Sep 2025 16:33:07 +0000 (09:33 -0700)]
forwprop: Improve rejection of overlapping for copyprop of aggregates [PR121841]
Here we have:
tmp = src1[0];
dest1[0] = tmp;
where src1 and dest1 are decls.
We currently reject this as the bases are different but since the bases
are decls we know they won't overlap.
This adds the extra check to allow this.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/121841
gcc/ChangeLog:
* tree-ssa-forwprop.cc (optimize_agr_copyprop_1): Allow
two different decls as bases as non-overlapping bases.
gcc/testsuite/ChangeLog:
* gcc.dg/tree-ssa/copy-prop-aggregate-struct-1.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
RISC-V: Add support for the XAndesvdot ISA extension.
This extension defines vector instructions to calculae of the signed/unsigned
dot product of four SEW/4-bit data and accumulate the result into a SEWbit
element for all elements in a vector register.
gcc/ChangeLog:
* config/riscv/andes-vector-builtins-bases.cc (nds_vd4dot): New class.
(class nds_vd4dotsu): New class.
* config/riscv/andes-vector-builtins-bases.h: New def.
* config/riscv/andes-vector-builtins-functions.def (nds_vd4dots): Ditto.
(nds_vd4dotsu): Ditto.
(nds_vd4dotu): Ditto.
* config/riscv/andes-vector.md
(@pred_nds_vd4dot<su><mode>): New pattern.
(@pred_nds_vd4dotsu<mode>): New pattern.
* config/riscv/genrvv-type-indexer.cc (main): Modify sew of QUAD_FIX,
QUAD_FIX_SIGNED and QUAD_FIX_UNSIGNED.
* config/riscv/riscv-vector-builtins.cc
(qexti_vvvv_ops): New operand information.
(qexti_su_vvvv_ops): New operand information.
(qextu_vvvv_ops): New operand information.
* config/riscv/riscv-vector-builtins.h (XANDESVDOT_EXT): New def.
(required_ext_to_isa_name): Add case XANDESVDOT_EXT.
(required_extensions_specified): Ditto.
(struct function_group_info): Ditto.
* config/riscv/vector-iterators.md (NDS_QUAD_FIX): New iterator.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dots.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotsu.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vd4dotu.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dots.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotsu.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vd4dotu.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dots.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotsu.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vd4dotu.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dots.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotsu.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vd4dotu.c: New test.
Jeff Law [Sun, 7 Sep 2025 18:11:55 +0000 (12:11 -0600)]
[RISC-V] Fix ordering of pipeline models
I missed that the new ascalon pipeline description was put into the wrong place
during review. The net is tests which wanted to use generic-ooo explicitly for
stability in the test output ended up getting a different pipeline model and
different codegen than the test expected.
This tripped a small number of vsetvl failures in the testsuite.
This has spun on riscv64-elf and riscv32-elf in my tester and fixes the
regression. I'm going to go ahead and push it as I'm likely offline this
afternoon/evening and don't want anyone else to waste their time chasing the
regression down.
RISC-V: Add support for the XAndesvpackfph ISA extension.
This extension defines vector instructions to extract a pair of FP16 data from
a floating-point register. Multiply the top FP16 data with the FP16 elements
and add the result with the bottom FP16 data.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
Turn on VECTOR_ELEN_FP_16 for XAndesvpackfph.
* config/riscv/andes-vector-builtins-bases.cc (nds_vfpmad): New class.
* config/riscv/andes-vector-builtins-bases.h: New def.
* config/riscv/andes-vector-builtins-functions.def (nds_vfpmadt): Ditto.
(nds_vfpmadb): Ditto.
(nds_vfpmadt_frm): Ditto.
(nds_vfpmadb_frm): Ditto.
* config/riscv/andes-vector.md (@pred_nds_vfpmad<nds_tb><mode>):
New pattern.
* config/riscv/riscv-vector-builtins-types.def
(DEF_RVV_F16_OPS): New def.
* config/riscv/riscv-vector-builtins.cc (f16_ops): Ditto
* config/riscv/riscv-vector-builtins.def (float32_type_node): Ditto.
* config/riscv/riscv-vector-builtins.h (XANDESVPACKFPH_EXT): Ditto.
(required_ext_to_isa_name): Add case XANDESVPACKFPH_EXT.
(required_extensions_specified): Ditto.
* config/riscv/vector-iterators.md (VHF): New iterator.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadb.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfpmadt.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadb.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfpmadt.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadb.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfpmadt.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadb.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfpmadt.c: New test.
H.J. Lu [Thu, 31 Jul 2025 14:38:48 +0000 (07:38 -0700)]
c++: Update TLS model after processing a TLS variable
Set a tentative TLS model in grokvardecl and update TLS mode with the
default TLS access model after a TLS variable has been fully processed
if the default TLS access model is stronger.
gcc/cp/
PR c++/107393
* decl.cc (grokvardecl): Set a tentative TLS model which will be
updated by cplus_decl_attributes later.
* decl2.cc (cplus_decl_attributes): Update TLS model with the
default TLS access model if the default TLS access model is
stronger.
* pt.cc (tsubst_decl): Set TLS model only after processing a
variable.
gcc/testsuite/
PR c++/107393
* g++.dg/tls/pr107393-1.C: New test.
* g++.dg/tls/pr107393-2.C: Likewise.
Pan Li [Sat, 6 Sep 2025 02:54:43 +0000 (10:54 +0800)]
RISC-V: Combine vec_duplicate + vnmsub.vv to vnmsub.vx on GR2VR cost
This patch would like to combine the vec_duplicate + vnmsub.vv to the
vnmsub.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR. Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.
Assume we have example code like below, GR2VR cost is 0.
Andrew Pinski [Sat, 6 Sep 2025 22:24:00 +0000 (15:24 -0700)]
dep_fusion: Fix if target does not have macro fusion [PR121835]
This new pass will ICE if the target does not define the macro_fusion_pair_p
pass. The pass will not be useful in that case so it is best to return
early.
Pushed as obvious after a bootstrap on x86_64-linux-gnu.
PR rtl-optimization/121835
gcc/ChangeLog:
* dep-fusion.cc (pass_dep_fusion::execute): Return early if
macro_fusion_pair_p is null.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Presently, the scheduler code only considers consecutive instructions
for macro-op fusion (see sched-deps.cc::sched_macro_fuse_insns () for
details). This patch introduces the new dep_fusion pass, which is
intended to uncover more fusion opportunities by reordering eligible
instructions to form fusible pairs (based solely on the value of the
TARGET_SCHED_MACRO_FUSION_PAIR_P hook). This is achieved by using
the RTL-SSA framework, and only the single-use instructions are
considered for the first instruction of a pair.
Aside from reordering instructions, this pass also sets the SCHED_GROUP
flag for the second instruction so that following passes can implement
special handling of the fused pairs. For instance, RA and regrename
should make use of this information to preserve single-output property
for some of such pairs. Accordingly, in passes.def, this patch adds two
invocations of the new pass: just before IRA and just before regrename.
The new pass is enabled at -O2+ and -Os.
gcc/ChangeLog:
* Makefile.in (OBJS): Add dep-fusion.o.
* common.opt (fdep-fusion): Add option.
* dep-fusion.cc: New pass.
* doc/invoke.texi: Document it.
* opts.cc (default_options_table): Enable it at -O2+ and -Os.
* passes.def: Insert two instances of dep_fusion.
* tree-pass.h (make_pass_dep_fusion): Declare new function.
Andrew Pinski [Sat, 6 Sep 2025 11:04:37 +0000 (04:04 -0700)]
forwprop: Factor out the memcpy followed by memset optimization
As simplify_builtin_call adds more and more optimization, it is
getting bigger and bigger and easier to misunderstand, so this
factors out the memcpy followed by memset optimization (which
was the original optimization added).
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-ssa-forwprop.cc (simplify_builtin_call): Factor out
the memcpy followed by a memset optimization to ...
(simplify_builtin_memcpy_memset): Here. New function.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Andrew Pinski [Sat, 6 Sep 2025 10:40:51 +0000 (03:40 -0700)]
forwprop: Factor out memchr optimization to its own function
As more optimizations are added to forwprop's simplify_builtin_call,
this function is becoming harder and harder to understand. To help
simplify things, this factors out the memchr optimization to its own
function like what was done when memcmp optimization was added.
Bootstrapped and tested on x86_64-linux-gnu.
gcc/ChangeLog:
* tree-ssa-forwprop.cc (simplify_builtin_call): Factor out the memchr
optimization to ...
(simplify_builtin_memchr): Here. New function.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Sam James [Thu, 4 Sep 2025 22:48:38 +0000 (23:48 +0100)]
doc: update incremental link vs binutils information
GNU Binutils now supports linking LTO and non-LTO objects into a single
mixed object file as of 2.44. Update the text to reflect this and fix
some minor grammar issues while at it.
gcc/ChangeLog:
PR ipa/116410
* doc/invoke.texi (Link Options): Update -flinker-output= text
to reflect GNU Binutils changes. Fix grammar.
RISC-V: Add support for the XAndesvsintload ISA extension.
This extension defines vector load instructions to move sign-extended or
zero-extended INT4 data into 8-bit vector register elements.
gcc/ChangeLog:
* config/riscv/andes-vector-builtins-bases.cc
(nds_nibbleload): New class.
* config/riscv/andes-vector-builtins-bases.h (nds_vln8): New def.
(nds_vlnu8): Ditto.
* config/riscv/andes-vector-builtins-functions.def (nds_vln8): Ditto.
(nds_vlnu8): Ditto.
* config/riscv/andes-vector.md (@pred_intload_mov<su><mode>): New pattern.
* config/riscv/riscv-vector-builtins-types.def (DEF_RVV_Q_OPS): New def.
(DEF_RVV_QU_OPS): Ditto.
* config/riscv/riscv-vector-builtins.cc
(q_v_void_const_ptr_ops): New operand information.
(qu_v_void_const_ptr_ops): Ditto.
* config/riscv/riscv-vector-builtins.def (void_const_ptr): New def.
* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
(required_ext_to_isa_name): Add case XANDESVSINTLOAD_EXT.
(required_extensions_specified): Ditto.
* config/riscv/vector-iterators.md (NDS_QVI): New iterator.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vln8.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vln8.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vln8.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vln8.c: New test.
RISC-V: Add support for the XAndesvbfhcvt ISA extension.
This patch add support for XAndesvbfhcvt ISA extension.
This extension defines instructions to perform vector floating-point
conversion between the BFLOAT16 floating-point data and the IEEE-754 32-bit
single-precision floating-point (SP) data in a vector register.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc:
Turn on VECTOR_ELEN_BF_16 for XAndesvbfhcvt.
* config.gcc: Add extra_objs andes-vector-builtins-bases.o
and extra_headers andes_vector.h.
* config/riscv/riscv-vector-builtins-shapes.cc
(BASE_NAME_MAX_LEN): Increase size to 20.
* config/riscv/riscv-vector-builtins.cc
(f32_to_bf16_nf_w_ops): New operand information.
(f32_to_bf16_nf_w_ops): New operand information.
(DEF_RVV_FUNCTION): New def.
* config/riscv/riscv-vector-builtins.def (bf16): Ditto.
* config/riscv/riscv-vector-builtins.h (enum required_ext): Ditto.
(required_ext_to_isa_name): Add case XANDESVBFHCVT_EXT.
(required_extensions_specified): Ditto.
* config/riscv/t-riscv: Add andes-vector-builtins-functions.def,
andes-vector-builtins-bases.h and andes-vector-builtins-bases.o.
* config/riscv/vector-iterators.md (NDS_VWEXTBF): New iterator.
(NDS_V_DOUBLE_TRUNC_BF): New attr.
* config/riscv/andes-vector-builtins-bases.cc: New file.
* config/riscv/andes-vector-builtins-bases.h: New file.
* config/riscv/andes-vector-builtins-functions.def: New file.
* config/riscv/andes_vector.h: New file.
* config/riscv/andes-vector.md: New file.
* config/riscv/vector.md: Include andes_vector.md.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/rvv.exp: Add regression for xandesvector.
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfncvtbf16s.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfncvtbf16s.c: New test.
* gcc.target/riscv/rvv/xandesvector/non-policy/overloaded/nds_vfwcvtsbf16.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfncvtbf16s.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/non-overloaded/nds_vfwcvtsbf16.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfncvtbf16s.c: New test.
* gcc.target/riscv/rvv/xandesvector/policy/overloaded/nds_vfwcvtsbf16.c: New test.
Paul Thomas [Sat, 6 Sep 2025 16:39:25 +0000 (17:39 +0100)]
Fortran: Implement correct form of PDT constructors [PR84119]
2025-09-06 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/84119
* resolve.cc (reset_array_ref_to_scalar): New function using
chunk broken out from gfc_resolve_ref.
(gfc_resolve_ref): Call the new function, the first time for
PDT type parameters and the second time for LEN inquiry refs.
gcc/testsuite/
PR fortran/84119
* gfortran.dg/pdt_20.f03: Modify to deal with scalar type parm.
Andrew Pinski [Fri, 5 Sep 2025 23:50:58 +0000 (16:50 -0700)]
phiopt: Improve locations for factor out conditional operation [PR108466]
This improves the locations for the phi args and the newly created statement.
Since this is a factorization/commonizing in one case the location for the new
statement will not always be set correctly either way.
The new locations on the new phi will either be the old location of the argument
to the phi or the location of the defining statement (if it exists).
The new statement will be either the location of the phi or the location
of the defining statements if the location of the phi is unknown.
This fixes the location of an uninitialized variable warning too.
Bootstrapped and tested on x86_64-linux-gnu.
PR tree-optimization/108466
gcc/ChangeLog:
* tree-ssa-phiopt.cc (factor_out_conditional_operation): Give better
locations to the new phi args and the new statement.
gcc/testsuite/ChangeLog:
* gcc.dg/uninit-pr108466-1.c: New test.
Signed-off-by: Andrew Pinski <andrew.pinski@oss.qualcomm.com>
Jeff Law [Sat, 6 Sep 2025 14:34:03 +0000 (08:34 -0600)]
[RISC-V] Adjust recently added test
The recently added zbb-sext test includes stdint.h and explicitly asks for the
lp64 abi (not lp64d!).
This will fail on a native riscv system as the system headers don't support
lp64 -- they assume "d" is included.
It looks like most tests are including stdint-gcc instead of stdint. Not a fan
of that, but it seems to be how we've been handling this kind of issue to-date.
gcc/testsuite
* gcc.target/riscv/zbb-sext.c: Include stdint-gcc.h instead of
stdint.h.
c++/modules: Fix exported using-directive of imported namespace [PR121702]
Currently we represent exported using-directives as a list of indices
into the namespace array that we stream. However this list of
namespaces doesn't include any namespaces that we don't expose in this
module's purview, and so we ICE.
This patch reworks the handling to instead use the existing depset
tracking for namespaces directly. This means that we don't need to
build up a second lookup map when streaming, and we can reuse the logic
in {read,write}_namespace. We do need to make sure that we create a
depset for namespaces only referenced by a using-directive, though.
I don't expect to be exporting large numbers of using-directives from a
namespace, so for simplicity we stream the names as {parent, target}
pairs.
This also adjusts read handling so that we load the using-directives for
any import (including indirect) if it's in the import list for the
current TU. Otherwise we run into issues if the using-directive is in
a namespace that is otherwise never referenced in the 'export import'ing
module, because we never walk this namespace and so never know that we
need to emit it. To do this the patch ensures that we calculate the
import list before read_language is called.
As a drive-by fix, I noticed that with modules 'add_using_namespace'
will add duplicate using-directives because we compare usings against
the target namespace, but we then push a wrapping USING_DECL instead.
This reworks so that the contents of the structure is equivalent between
modules and non-modules code.
PR c++/121702
gcc/cp/ChangeLog:
* module.cc (enum module_state_counts): New counter.
(depset::hash::add_namespace_entities): Seed using-directive
targets for later streaming.
(module_state::write_namespaces): Don't handle using-directives
here.
(module_state::read_namespaces): Likewise.
(module_state::write_using_directives): New function.
(module_state::read_using_directives): New function.
(module_state::write_counts): Log using-directives.
(module_state::read_counts): Likewise.
(module_state::write_begin): Stream using-directives.
(module_state::read_language): Read using-directives if
directly importing.
(module_state::direct_import): Update current TU import list
before calling read_language.
* name-lookup.cc (add_using_namespace): Fix lookup of previous
using-directives.
* parser.cc (cp_parser_import_declaration): Don't set
MK_EXPORTING when performing import_module.
gcc/testsuite/ChangeLog:
* g++.dg/modules/namespace-10_c.C: Add check for log dump.
* g++.dg/modules/namespace-13_a.C: New test.
* g++.dg/modules/namespace-13_b.C: New test.
* g++.dg/modules/namespace-13_c.C: New test.
Nathaniel Shead [Sun, 31 Aug 2025 04:47:43 +0000 (14:47 +1000)]
c++/modules: Support ADL on non-discarded GM entities [PR121705]
[basic.lookup.argdep] p4 says that ADL also finds declarations of
functions or function templates from a point of lookup within the
module, only ignoring discarded (or internal) GM entities.
To implement this we need to create bindings for these entities so that
we can guarantee that name lookup will discover they exist. This raises
some complications, though, as we ideally would like to avoid having
bindings that contain no declarations, or emitting GM namespaces that
only contain discarded or internal functions.
This patch does this by additionally creating a new binding whenever we
call make_dependency on a non-EK_FOR_BINDING decl. We don't do this for
using-decls, as at the point of use of a GM entity we no longer know
whether we called through a using-decl or the declaration directly;
however, this behaviour is explicitly supported by [module.global.frag]
p3.6.
Creating these bindings caused g++.dg/modules/default-arg-4_* to fail.
It turns out that this makes the behaviour look identical to
g++.dg/modules/default-arg-5, which is incorrectly dg-error-ing default
value redeclarations (we only currently error because of PR c++/99000).
This patch removes the otherwise identical test and turns the dg-errors
into xfailed dg-bogus.
As a drive-by fix this also fixes an ICE when debug printing friend
function instantiations.
PR c++/121705
PR c++/117658
gcc/cp/ChangeLog:
* module.cc (depset::hash::make_dependency): Make bindings for
GM functions.
(depset::hash::add_binding_entity): Adjust comment.
(depset::hash::add_deduction_guides): Add log.
* ptree.cc (cxx_print_xnode): Handle friend functions where
TI_TEMPLATE is an OVERLOAD or IDENTIFIER.
gcc/testsuite/ChangeLog:
* g++.dg/modules/default-arg-4_a.C: XFAIL bogus errors.
* g++.dg/modules/default-arg-4_b.C: Likewise.
* g++.dg/modules/default-arg-5_a.C: Remove duplicate test.
* g++.dg/modules/default-arg-5_b.C: Likewise.
* g++.dg/modules/adl-9_a.C: New test.
* g++.dg/modules/adl-9_b.C: New test.
* g++.dg/modules/gmf-5.C: New test.
Signed-off-by: Nathaniel Shead <nathanieloshead@gmail.com> Reviewed-by: Jason Merrill <jason@redhat.com>
Jakub Jelinek [Sat, 6 Sep 2025 10:24:31 +0000 (12:24 +0200)]
libgomp: Use consistent formatting in <omp.h>
I've noticed the new C++ part of omp.h uses libstdc++ coding conventions,
while the rest of the header (and libgomp) is formatted using the normal
gcc coding conventions like gcc/.
This patch makes it consistent.
2025-09-06 Jakub Jelinek <jakub@redhat.com>
* omp.h.in: Fix up formatting of __cplusplus >= 201103L
guarded code from libstc++ style to GCC/libgomp style.
Robin Dapp [Fri, 5 Sep 2025 07:35:46 +0000 (09:35 +0200)]
RISC-V: Check if we can vec_extract [PR121510].
For Zvfhmin a vector mode exists but the corresponding vec_extract does
not. This patch checks that a vec_extract is available and otherwise
falls back to standard handling.
PR target/121510
gcc/ChangeLog:
* config/riscv/riscv.cc (riscv_legitimize_move): Check if we can
vec_extract.
gcc/testsuite/ChangeLog:
* gcc.target/riscv/rvv/autovec/pr121510.c: New test.
Jakub Jelinek [Fri, 5 Sep 2025 18:03:09 +0000 (20:03 +0200)]
c: Allow translations of a lot of C FE messages
I've noticed a lot of diagnostic messages in the C FE aren't marked
for translation.
The reason is some weird coding style which wraps the string
literals into (), especially when they don't fit on a single line.
With that fixed, there were 83 unique similar messages
"both %<something%> and %<something%> in declaration specifiers"
marked for translation, which is very unfriendly to translators,
the patch brings that down to 4 (if it was ok to change order,
it could be even 3):
msgid "both %qs and %qs in declaration specifiers"
msgid "both %qs and %<__int%d%> in declaration specifiers"
msgid "both %qs and %<_Float%d%s%> in declaration specifiers"
msgid "both %<__int%d%> and %qs in declaration specifiers"
2025-09-05 Jakub Jelinek <jakub@redhat.com>
* c-decl.cc (pushtag): Remove ()s around string literal
in call to diagnostic function.
(diagnose_mismatched_decls): Likewise.
(c_check_switch_jump_warnings): Likewise.
(grokdeclarator): Likewise.
(warn_cxx_compat_finish_struct): Likewise.
(build_enumerator): Formatting fix.
(declspecs_add_type): Remove ()s around string literal
in call to diagnostic function, simplify
"both %<something%> and %<something%>" starting format
strings to "both %qs and %qs" with appropriate arguments.
Formatting fixes.
* c-typeck.cc (build_external_ref): Remove ()s around string
literal in call to diagnostic function.
(build_conditional_expr): Likewise.
* c-parser.cc (c_parser_transaction): Use G_() around string
literals. Formatting fix.
(c_parser_transaction_expression): Likewise.
In order to reduce time complexity, rtl-ssa groups consecutive
clobbers together. Each group of clobbers has a splay tree for
lookup and manipulation purposes.
This arrangement means that we might need to split a group (when
inserting a new non-clobber definition between two clobbers) or
to join consecutive groups together (when deleting an intervening
non-clobber definition). To reduce the time complexity of these updates,
the back pointer from a clobber to its group is only updated lazily.
The invariant is supposed to be that the first clobber, last clobber,
and splay tree root have the right group at all times, whereas other
members of the group can have identifiably stale group pointers.
However, a lack of abstraction meant that only some splay tree lookups
correctly maintained this invariant. Others did not update the group
pointer after installing a new root.
This patch adds a helper that maintains the invariant and uses it in
three places, one that was already correct and two that were wrong.
The original lookup_clobber is still used in other code that
manipulates groups as a whole.
gcc/
PR rtl-optimization/121757
* rtl-ssa/accesses.h (clobber_group::lookup_clobber): New member
function.
* rtl-ssa/accesses.cc (clobber_group::lookup_clobber): Likewise.
(clobber_group::prev_clobber, clobber_group::next_clobber)
(function_info::add_clobber): Use it.
gcc/testsuite/
PR rtl-optimization/121757
* g++.dg/pr121757.C: New test.
Patrick Palka [Fri, 5 Sep 2025 17:14:16 +0000 (13:14 -0400)]
libstdc++: Make join_view::_Iterator::_M_get_inner noexcept [PR121804]
Since this helper (added in r16-3576-g7f7f1878eedd80) is used in the
noexcept-spec of iter_move and iter_swap, it in turn needs an accurate
noexcept-spec.
PR libstdc++/121804
libstdc++-v3/ChangeLog:
* include/std/ranges (join_view::_Iterator::_M_get_inner):
Mark noexcept.
* testsuite/std/ranges/adaptors/join.cc (test16): New test.
Reviewed-by: Tomasz Kamiński <tkaminsk@redhat.com> Reviewed-by: Jonathan Wakely <jwakely@redhat.com>
Robert Dubner [Fri, 5 Sep 2025 14:41:08 +0000 (10:41 -0400)]
cobol: Improved handling of COBOL Special Registers.
COBOL Special Registers (e.g., RETURN-CODE; DEBUG-ITEM) are implemented as
global variables. These changes define them with the prefix "__ggsr__" in
their variable names so that the GDB-COBOL debugger can identify them.
The creation and handling of such variables has been streamlined with the
introduction of the "register_e" cbl_field_t::attr bit.
gcc/cobol/ChangeLog:
* genapi.cc (trace1_init): Prepend two internal variables with
underscore.
(initialize_variable_internal): Use new register_e attribute.
(psa_global): Use "__ggsr__" prefix to identify special registers
(parser_symbol_add): Use new register_e attribute.
* symbols.cc (cbl_field_attr_str): Likewise.
(symbol_table_init): Likewise.
(is_register_field): Eliminated in favor of (attr & register_e).
* symbols.h (is_register_field): Likewise.
libgcobol/ChangeLog:
* common-defs.h (enum cbl_field_attr_t): Define register_e.
* constants.cc (struct cblc_field_t): Define special registers with
"__ggsr__" prefix.
This also covers bad_function_call::what from C++11.
libstdc++-v3/ChangeLog:
* doc/html/manual/status.html: Regenerate.
* doc/xml/manual/status_cxx2011.xml: Add entry for bad_function_call.
* doc/xml/manual/status_cxx2017.xml: Add entries for bad_any_cast
and nullptr_t output. Update entry for sf.cmath. Fix stable name for
mem.res.
Reviewed-by: Jonathan Wakely <jwakely@redhat.com> Signed-off-by: Tomasz Kamiński <tkaminsk@redhat.com>
There are some cases where involing zero_reg is not needed and
where there are other sequences with the same efficiency.
An example is to use SBCI R,0 instead of SBC R,__zero_reg__
when R >= R16. This may turn out to be better for small ISRs.
PR target/121794
gcc/
* config/avr/avr.cc (avr_out_compare): Only use zero_reg
when there is no other sequence of the same length.
(avr_out_plus_ext): Same.
(avr_out_plus_1): Same.
Richard Biener [Fri, 5 Sep 2025 09:55:50 +0000 (11:55 +0200)]
Avoid costing vector stmts with count == 0
This avoids confusing the backends.
* tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Do not
cost zero remaining scalar stmts.
(vectorizable_slp_permutation): Do not cost zero actual
permutations.
* tree-vect-stmts.cc (vectorizable_load): Likewise.
Marek Polacek reported to me internally that I've messed up one diagnostic
message in this function, with one word before final double quote on one
line and another word right after opening double quote on the next line,
with no space in between.
Fixed thusly.
2025-09-05 Jakub Jelinek <jakub@redhat.com>
* constexpr.cc (cxx_eval_cxa_builtin_fn): Add missing word separating
space into invalid_nargs diagnostics.
Jakub Jelinek [Fri, 5 Sep 2025 08:59:42 +0000 (10:59 +0200)]
testsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]
On Tue, Jul 01, 2025 at 02:50:40PM -0500, Segher Boessenkool wrote:
> No tests become good tests without effort. And tests that are not good
> tests require constant maintenance!
Here are two patches, either just the first one or both can be used
and both were tested on powerpc64le-linux.
The second one adds further 8 tests, which are dg-do run which #include
the former tests, don't do any dump tests and just define the checking/main
for those.
2025-09-05 Jakub Jelinek <jakub@redhat.com>
PR testsuite/118567
* gcc.target/powerpc/vsx-vectorize-9.c: New test.
* gcc.target/powerpc/vsx-vectorize-10.c: New test.
* gcc.target/powerpc/vsx-vectorize-11.c: New test.
* gcc.target/powerpc/vsx-vectorize-12.c: New test.
* gcc.target/powerpc/vsx-vectorize-13.c: New test.
* gcc.target/powerpc/vsx-vectorize-14.c: New test.
* gcc.target/powerpc/vsx-vectorize-15.c: New test.
* gcc.target/powerpc/vsx-vectorize-16.c: New test.
Jakub Jelinek [Fri, 5 Sep 2025 08:54:53 +0000 (10:54 +0200)]
testsuite, powerpc, v2: Fix vsx-vectorize-* after alignment peeling [PR118567]
On Tue, Jul 01, 2025 at 02:50:40PM -0500, Segher Boessenkool wrote:
> No tests become good tests without effort. And tests that are not good
> tests require constant maintenance!
Here are two patches, either just the first one or both can be used
and both were tested on powerpc64le-linux.
The first one removes all the checking etc. stuff from the testcases,
as they are just dg-do compile, for the vectorize dump checks all we
care about are the vectorized loops they want to test.
2025-09-05 Jakub Jelinek <jakub@redhat.com>
PR testsuite/118567
* gcc.target/powerpc/vsx-vectorize-1.c: Remove includes, checking
part of main1 and main.
* gcc.target/powerpc/vsx-vectorize-2.c: Remove includes, replace
bar definition with declaration, remove main.
* gcc.target/powerpc/vsx-vectorize-3.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-4.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-5.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-6.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-7.c: Likewise.
* gcc.target/powerpc/vsx-vectorize-8.c: Likewise.
aarch64: Use SVE for V2DImode integer min/max operations
Unlike Advanced SIMD, SVE has instruction to perform smin, smax, umin, umax
on 64-bit elements. Thus, we can use them with the fixed-width V2DImode
expander. Most of the machinery is already there on the define_insn side,
supporting V2DImode operands of the SVE pattern. We just need to wire up
the RTL emission to the v2di standard names for the TARGET_SVE case.
So for the smin case we now generate:
min_di:
ldr q30, [x0]
ptrue p7.b, all
ldr q31, [x1]
smin z30.d, p7/m, z30.d, z31.d
str q30, [x2]
ret
The register operand case is the same length, though the new ptrue can now be
shared and moved away. But the immediate operand case is obviously better
as the SVE immediate form doesn't require a predicate operand.
Bootstrapped and tested on aarch64-none-linux-gnu.
Paul Thomas [Fri, 5 Sep 2025 06:22:01 +0000 (07:22 +0100)]
Fortran: Check PDT parameters are of integer type [PR84432, PR114815]
2025-09-04 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/84432
PR fortran/114815
* expr.cc (gfc_check_assign_symbol): Check that components in a
PDT with a default initializer have type and length parameters
that reduce to constant integer expressions.
* trans-expr.cc (gfc_trans_assignment_1): Parameterized
components cannot have default initializers so they must be
allocated after initialization.
gcc/testsuite/
PR fortran/84432
PR fortran/114815
* gfortran.dg/pdt_26.f03: Update with default no initializer.
* gfortran.dg/pdt_27.f03: Change to test non-conforming
initializers.
Paul Thomas [Fri, 5 Sep 2025 06:19:01 +0000 (07:19 +0100)]
Fortran: Check PDT parameters are of integer type [PR83762, PR102457]
2025-09-05 Paul Thomas <pault@gcc.gnu.org>
gcc/fortran
PR fortran/83762
PR fortran/102457
* decl.cc (gfc_get_pdt_instance): Check that variable PDT parm
expressions are of type integer. Note that the symbol must be
tested since the expression often appears as BT_PROCEDURE.
gcc/testsuite/
PR fortran/83762
PR fortran/102457
* gfortran.dg/pdt_44.f03: New test.
* gfortran.dg/pr95090.f90: Give the PDT parameter a value to
suppress the type error.
Pan Li [Tue, 2 Sep 2025 04:30:16 +0000 (12:30 +0800)]
RISC-V: Combine vec_duplicate + vmadd.vv to vmadd.vx on GR2VR cost
This patch would like to combine the vec_duplicate + vmadd.vv to the
vmadd.vx. From example as below code. The related pattern will depend
on the cost of vec_duplicate from GR2VR. Then the late-combine will
take action if the cost of GR2VR is zero, and reject the combination
if the GR2VR cost is greater than zero.
Assume we have example code like below, GR2VR cost is 0.
* config/riscv/autovec-opt.md (*vmacc_vx_<mode>): Rename to
handle both the macc and madd.
(*mul_plus_vx_<mode>): Add madd pattern.
* config/riscv/vector.md (@pred_mul_plus_vx_<mode>): Rename to
handle both the macc and madd.
(*pred_macc_<mode>_scalar_undef): Remove.
(*pred_nmsac_<mode>_scalar_undef): Remove.
(*pred_mul_plus_vx<mode>_undef): Add new pattern to handle
both the vmacc and vmadd.
(@pred_mul_plus_vx<mode>): Ditto.
Jakub Jelinek [Thu, 4 Sep 2025 16:52:47 +0000 (18:52 +0200)]
aarch64: Adjust aarch64/spaceship_1.C testcase for recent changes [PR121732]
In r16-3414 libstdc++ changed ABI for (still experimental C++20) and uses
unordered value -128 instead of 2. Generally the change improved code
generation on all targets tested, see
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/693534.html
for details.
In r16-3474 I've adjusted the middle-end and backends to use that value.
This apparently broke the spaceship_1.C test on aarch64 which scans the
exact function bodies which are now different.
The following patch adjusts the full body patterns to match. On these
2 routines, the generated code is 1 insn longer than in the past, so if
you have ideas how to change the code generation for the common case of
-1, 0, 1, -128 value, maybe it could be improved.
2025-09-04 Jakub Jelinek <jakub@redhat.com>
PR testsuite/121732
PR target/117013
* g++.target/aarch64/spaceship_1.C: Adjust expected fn bodies
for _Z8ss_floatff and _Z9ss_doubledd.
Jan Hubicka [Thu, 4 Sep 2025 15:29:07 +0000 (17:29 +0200)]
Fix ICE with auto-fdo and -fpartial-profiling
With -fpartial-profling we ICE building perlbench and gcc from spec2k17 since
afdo_annotate_cfg applies knowlede about zero profiles too early. This patch
moves it after the early exit when profile is 0 everywhere and also fixes
formatting issue in the next block.
gcc/ChangeLog:
* auto-profile.cc (afdo_annotate_cfg): Apply zero_bbs after early
exit for missing profile; fix formating
Jan Hubicka [Thu, 4 Sep 2025 15:23:20 +0000 (17:23 +0200)]
Fix scalng of auto-fdo profiles in liner
with auto-fdo it is possible that function bar with non-zero profile is inlined
into foo with zero profile and foo is the only caller of it. In this case
we currently scale bar to also have zero profile which makes it optimized
for size. With normal profiles this does not happen, since basic blocks with
non-zero count must have some way to be reached.
This patch makes inliner to scale caller in this case which mitigates the
problem (to some degree).
Bootstrapped/regtested x86_64-linux, plan to commit it shortly.
gcc/ChangeLog:
* ipa-inline-transform.cc (inline_call): If function with
AFDO profile is inlined into function with
GUESSED_GLOBAL0_AFDO or GUESSED_GLOBAL0_ADJUSTED, scale
caller to AFDO profile.
* profile-count.h (profile_count::apply_scale): If num is AFDO
and den is not GUESSED, make result AFDO rather then GUESSED.
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