Alan Modra [Fri, 15 May 2020 08:36:05 +0000 (18:06 +0930)]
Fix tight loop on recursively-defined symbols
This patch fixes a bug in GAS where the assembler enters a tight loop
when attempting to resolve recursively-defined symbols, e.g. when
trying to assemble "a=a".
This is a regression introduced between binutils 2.32 and 2.33,
by commit 1903f1385bff9
* symbols.c (struct local_symbol): Update comment.
(resolve_symbol_value): For resolved symbols equated to other
symbols, verify that the referenced symbol is not a local_symbol
before accessing sy_value. Don't leave symbol loops during
finalize_syms resolution.
* testsuite/gas/all/assign-bad-recursive.d: New test.
* testsuite/gas/all/assign-bad-recursive.l: Error output for test.
* testsuite/gas/all/assign-bad-recursive.s: Assembly for test.
* testsuite/gas/all/gas.exp: Run it.
Andre Vieira [Fri, 13 Mar 2020 13:31:56 +0000 (13:31 +0000)]
gas, arm: PR25660L Fix vadd/vsub with lt and le condition codes for MVE
As explained in the PR, the addition of MVE makes the parser strip 't' and 'e'
as suffixes when MVE is enabled. This leads to vadd and vsub in it blocks with
lt and le conditions to be initially parsed as vaddl and vsubl. This means the
operand parsing for these must allow for the same operands as the scalar vadd
and vsub. I had forgotten to do this and this patch remedies that oversight.
gas/ChangeLog:
2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
Backport from mainline.
2020-03-13 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR 25660
* config/tc-arm.c (operand_parse_code): Add OP_RNSDMQR and OP_oRNSDMQ.
(parse_operands): Handle new operand codes.
(do_neon_dyadic_long): Make shape check accept the scalar variants.
(asm_opcode_insns): Fix operand codes for vaddl and vsubl.
* testsuite/gas/arm/mve-vaddsub-it.s: New test.
* testsuite/gas/arm/mve-vaddsub-it.d: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.s: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.l: New test.
* testsuite/gas/arm/mve-vaddsub-it-bad.d: New test.
* testsuite/gas/arm/nomve-vaddsub-it.d: New test.
Alan Modra [Wed, 11 Mar 2020 04:13:16 +0000 (14:43 +1030)]
powerpc64-ld infinite loop
If this code dealing with possible conversion of inline plt sequences
is ever executed, ld will hang. A binary with such sequences and of
code size larger than approximately 90% the reach of an unconditional
branch is the trigger. Oops.
* elf64-ppc.c (ppc64_elf_inline_plt): Do increment rel in for loop.
Andre Vieira [Fri, 31 Jan 2020 17:09:27 +0000 (17:09 +0000)]
arm: PR gas/25472 Enable DSP instructions with +mve
We noticed +mve was not enabling DSP instructions as it should, reported in PR
25472.
The MVE architecture extension for Armv8.1-M Mainline implies DSP extensions.
This patch reflects that in the '+mve' command line option.
gas/ChangeLog:
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
Backport from mainline.
2020-01-31 Andre Vieira <andre.simoesdiasvieira@arm.com>
PR gas/25472
* config/tc-arm.c (armv8m_main_ext_table): Refactored +dsp adding.
(armv8_1m_main_ext_table): Refactored +dsp adding and enabled dsp for
+mve.
* testsuite/gas/arm/mve_dsp.d: New test.
Tamar Christina [Mon, 27 Jan 2020 10:40:02 +0000 (10:40 +0000)]
AArch64: Fix cfinv disassembly issues
This fixes the preferred disassembly for cfinv. The Armv8.4-a instruction
overlaps with the possible encoding space for msr. This because msr allows you
to use unallocated encoding space using the general sA_B_cC_cD_E form.
However when an encoding does become allocated then we need to ensure that it's
used as the preferred disassembly. The problem with cfinv is that its mask has
all bits sets because it has no arguments.
This causes issues for the Alias resolver in gas as it uses the mask to build
alias graph. In this case it can't do it since it thinks almost everything
would alias with cfinv. So instead we can only fix this by moving cfinv before
msr.
Mihail Ionescu [Mon, 20 Jan 2020 14:10:26 +0000 (14:10 +0000)]
This is a series of backports for binutils 2.33 which addresses some of the new context sensitive extension mechanism. This is done in order to get gcc MVE code to work with binutils 2.33.
Mihail Ionescu(5)
[backport][binutils][arm][1/5] Enable context sensitive .arch_extension
[backport][binutils][arm][2/5] Make .fpu reset the FPU/Coprocessor feature bits
[backport][binutils][arm][3/5] Change CRC from fpu feature to archititectural extension
[backport][binutils][arm][4/5] Set context table for '.arch_extension'
[backport][binutils][arm][5/5] PR25376 Change MVE into a CORE_HIGH feature
Tamar Christina [Thu, 2 Jan 2020 14:06:01 +0000 (14:06 +0000)]
AArch64: Revert SEC_LINKER_CREATED for AArch64 stubs (PR/25210)
The SEC_LINKER_CREATED flag was added as a fix for PR 24753. I believe that
part of the fix in compress.c to still be correct as linker created sections
don't have a size on disk and it fixes the Arm bootstrap regression.
So I'm partially revert this change so that we don't have to manage the section
manually as implied by SEC_LINKER_CREATED as it's causing an error when both
errata workarounds are used together and it wasn't needed. This can also be
seen from that the arm bootstrap was fixed and no flag was added to it's stubs.
Alan Modra [Wed, 15 Jan 2020 05:45:43 +0000 (16:15 +1030)]
Reinstate gas em=freebsd for sparc-freebsd
In commit c9098af41e3 I over-simplified the sparc target decoding,
missing the fact that prior to that patch sparc-*-freebsd fell through
to the generic *-*-freebsd match.
Alan Modra [Tue, 14 Jan 2020 10:15:53 +0000 (20:45 +1030)]
PR25384, PowerPC64 ELFv1 copy relocs against function symbols
Function symbols of course don't normally want .dynbss copies but
with some old versions of gcc they are needed to copy the function
descriptor. This patch restricts the cases where they are useful to
compilers using dot-symbols, and enables the warning regardless of
whether a PLT entry is emitted in the executable. PLTs in shared
libraries are affected by a .dynbss copy in the executable.
bfd/
PR 25384
* elf64-ppc.c (ELIMINATE_COPY_RELOCS): Update comment.
(ppc64_elf_adjust_dynamic_symbol): Don't allow .dynbss copies
of function symbols unless dot symbols are present. Do warn
whenever one is created, regardles of whether a PLT entry is
also emitted for the function symbol.
ld/
* testsuite/ld-powerpc/ambiguousv1b.d: Adjust expected output.
* testsuite/ld-powerpc/funref.s: Align func_tab.
* testsuite/ld-powerpc/funref2.s: Likewise.
* testsuite/ld-powerpc/funv1.s: Add dot symbols.
Szabolcs Nagy [Thu, 9 Jan 2020 17:20:56 +0000 (17:20 +0000)]
[PR ld/22269] arm: Avoid dynamic relocs for undefweak symbols in static PIE
With static PIE linking undefined weak symbols are resolved to 0, so no
dynamic relocation is needed for them. The UNDEFWEAK_NO_DYNAMIC_RELOC
macro was introduced so this case can be handled easily, but it was not
applied consistently in the first attempt to fix ld/22269 for arm: