A new version of the ZyXEL XGS1210-12 has been discovered in
the wild. It includes at least two known hardware changes
- lan9/lan10 use RTL8221B instead of RTL8226
- lan9/lan10 use different SMI busses
Pave the new device the way by splitting the existing DTS.
According to the vendor website the models are named
- A1 (first version): not explicetly labeled
- B1 (second version): Label Rev. B1 on device
Rename the current OpenWrt device definition to A1 as it was
made for the first version. To stay compatible with older
installations, add the old device name to the list of
supported devices.
realtek: rt-loader: add ROM uImage lookup (aka standalone)
The rt-loader currently only supports booting piggy backed lzma
compressed kernels. This requires a data layout where the kernel
directly follows the loader. That might not be sufficient for
more complex flash layouts.
Especially bootbase devices (like ZyXEL GS1920) will need some
kind of chain loading that needs to be explored yet.
Enhance the rt-loader as follows:
- Allow to build as standalone version
- In this case a flash start address is given
- During boot loader will search the ROM starting from that address
- If it finds a uImage this will be loaded into RAM
- Afterwards it will be decompressed to its load address
- While we are here add uncompressed uImage support
As always the implementation tries to be as simple as possible.
- uImage detection works without magics
- uImage will be loaded to highest possible memory address
- Documentation in Makefile has been adapted accordingly
Funny side fact: A standalone rt-loader can chain load a piggy
backed rt-loader from flash.
During bootup loader will show
rt-loader
Running on RTL8380M (chip id 6275C) with 256MB
Relocate 15760 bytes from 0x82000000 to 0x8ffa0000
Searching for uImage starting at 0xb45a0000 ...
uImage 'MIPS OpenWrt Linux-6.12.40' found at 0xb45a0000 with load address 0x80100000
Copy 2923034 bytes of image data to 0x8fcd61e6 ...
Extract image with 2923034 bytes from 0x8fcd61e6 to 0x80100000 ...
Final kernel size is 2923034 bytes
Booting kernel from 0x80100000 ...
Registers must not be accessed in parallel by multiple drivers.
Read-modify-write operations are not atomic, and the result of parallel
access is undefined.
The MAC_L2_GLOBAL_CTRL2 register is essentially a pin configuration
register and is represented by a pinmux node in the devicetree. Operations
on this register by the realtek,rtl838x-eth driver must therefore also be
reflected in the devicetree.
Since the MDIO sets used are board-specific, the pins must be enabled in
the board’s devicetree. This can be achieved using the pinctrl properties
for the realtek,rtl83xx-switch.
Sven Eckelmann [Wed, 20 Aug 2025 03:19:31 +0000 (05:19 +0200)]
realtek: rtl931x: Add LED Sync configuration
The pinmux-related registers on the RTL931X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: https://github.com/openwrt/openwrt/pull/19815 Signed-off-by: Robert Marko <robimarko@gmail.com>
The MAC_L2_GLOBAL_CTRL2 register is primarily used for pin configuration.
It is necessary to select specific modes for pins or to free them for use
as GPIOs.
Fixes: 9dbc04785c4e ("realtek: add rtl8231-aux to rtl931x.dtsi") Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: https://github.com/openwrt/openwrt/pull/19815 Signed-off-by: Robert Marko <robimarko@gmail.com>
The pinmux-related registers on the RTL930X SoC family are spread across
various non-consecutive registers. It might be tempting to modify them
directly in a specific driver (SPI, LED, etc.), but this would cause issues
with parallel, non-locked read-modify-write operations, which are required
to update individual portions of these registers.
Instead, it is better to use the devicetree pinctrl properties to define
the correct configurations for the various operation modes.
One important setting here is the LED Sync bit. This allows the LED
controller to generate an additional positive edge on the `STCP`
("STore Clock Pin", also known as `RCLK`) of the LED shift register after
the actual content has already been shifted in using the normal shift
clock. The LED shift register is then expected to copy the content from the
shift register section into the storage registers, which act as the actual
LED output control. This functionality is available in, and commonly used
with, the SNx4HC595 family of shift registers.
To activate it, simply register it in the default state of the
"realtek,rtl83xx-switch" node:
It would be nicer when this can be directly added to the led subnode. But
for this to work, `realtek,rtl9300-leds` must first be an actual driver
(known to the driver core).
Suggested-by: Bevan Weiss <bevan.weiss@gmail.com> Signed-off-by: Sven Eckelmann <sven@narfation.org> Link: https://github.com/openwrt/openwrt/pull/19815 Signed-off-by: Robert Marko <robimarko@gmail.com>
firmware: Add support for Airoha EN7581 NPU firmware
Add support for Airoha EN7581 NPU firmware present in linux-firmware.
Support for it is fully upstream with the Ethernet part fully pushed and
the Wireless Offload currently in progress for various WiFi chip.
generic: backport support for Aeonsemi AS21xxx PHY
Backport support for Aeonsemi AS121xxx PHY. The PHY require dedicated
firmware to be loaded to correctly work and support a big family of
Aeonsemi PHY that provide from 1G to 10G speed.
Automatically refresh all affected patch and file (rtl PHY).
airoha: replace thermal patch with upstream version
Replace thermal patch with upstream version. The thermal maintainer
reported that the sysfs entry are considered deprecated and that slope
and offset should be handled internally to the driver.
Jonas Jelonek [Tue, 2 Sep 2025 07:38:51 +0000 (09:38 +0200)]
realtek: fix model for TP-Link TL-ST1008F v2.0
Fix the model name in DTS compatible, Makefiles and board scripts by
using dash instead of comma or underscore. This aligns it with other
examples in OpenWrt and makes in consistent in all places where the
board model is used.
wifi-scripts: ucode: set default wildcard mac for wifi-station
When creating the PSK file, the old script sets `mac` to
`00:00:00:00:00:00` when `mac` is not specified (see [here][1]),
creating hostapd configuration lines like:
vlanid=10 00:00:00:00:00:00 MyStrongPassword
That matches any MAC address (a wildcard). The `ucode` script alternative
misses the default, so set it.
In the later example the frontend/backend mapping code is already
in our new functions. So swap the calculation logic and use the
new access functions. This allows to finally drop the old access
functions without mapping.
From now on all RTL931x SerDes functions will use a consistent
frontend view.
realtek: convert access to RTL931x "digital 2" serdes pages
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own. We plan to provide
a consistent serdes mapping to all callers.
As the third step make use of these new functions whenever we want to
access the "digital 2" pages. The pages are mapped starting at 0x200.
So the function conversion is as simple as this:
The more we step down into the SerDes deeps the more confusing it
gets. Nevertheless it is not to late to fix a wrong assumption.
Until now it seemed as if the frontend/backend SerDes mapping is
totally without intersection. This is not true.
The backend SerDes mapping is also dependent on the mode. Especially
the proprietary Realtek XSGMII mode stands out from all other
mappings. So fix the descriptions and the calculation of the third
page package (digital 2 aka XSGMII 2).
As it was not yet used it had no impact.
Fixes: a4cbb44c1b ("realtek: convert access to RTL931x analog serdes pages") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/19873 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
realtek: convert access to RTL931x "digital 1" serdes pages
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own. We plan to provide
a consistent serdes mapping to all callers.
As the second step make use of these new functions whenever we
want to access the digital 1 pages. The pages are mapped starting
at 0x100. So the function conversion is as simple as this:
For some reason 3 of the 4 mdio access functions contain an
artifical delay of 10ms. While it might have been part of
older Realtek SDKs it can no longer be found in current ones.
Remove the delays.
While we are here remove the pre-access bus ready checks.
It is sufficient to run them after the command start. If
anything fails the caller will get an error. This is the
same behaviour as for the other targets.
Finally cleanup the error handling. Something like this makes
no sense at all.
update patch to upstream function change
bcm53x/patches-6.6/180-usb-xhci-add-support-for-performing-fake-doorbell.patch
changed function xhci_disable_and_free_slot() upstream [3]
Damien Dejean [Wed, 20 Aug 2025 16:07:37 +0000 (18:07 +0200)]
realtek: add 2500base-x patch sequence.
Adds the SerDes patch sequence for 2500base-x to improve the support of
devices with minimal bootloaders (like BootBase). The sequences were
imported from [1] for even lanes and [2] for odd lanes.
Damien Dejean [Wed, 20 Aug 2025 16:07:37 +0000 (18:07 +0200)]
realtek: allow different serdes patch sequences
Prepare the SerDes patch function to allow different patch sequences
depending on the phy mode. Patches are required to allow devices with a
lightweight bootloader (one that doesn't have a "rtk network init"
command) to use the serdes. Some modes required a different patch
sequence than the one currently used.
The addition of the soft_reset() function to the RTL8221B PHYs
missed to take care of C22/C45 standalone PHY versions. Especially
on RTL930x switch devices with these PHY the reset fails for the
C45 operation mode. This comes from the fact that the mdio bus
disables C22 read/writes when being set to C45.
Upstream has gained a proper C45 reset function. Use it for the
C45 PHY models.
Fixes: 7e3284eef7f ("generic: use genphy_soft_reset for RealTek 2.5G PHYs") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/19843 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
realtek: XGS1210-12: convert RTL8226 PHYs to 2500base-x
We reached the point of no return. Upstream has gained the final
bits for the RTL8226 PHYs. That means.
- RTL8226 MAC side behaves like RTL8221(B)
- It's serdes no longer uses proprietary HSGMII (2.5G SGMII)
- Instead it dynamically switches between SGMII and 2500base-x
This (partly) solves one of the central henn/egg problems of the
Realtek target. To change the MAC/PHY interface mode both sides
need to have all bits in place to do so. But where to start if
so much needs to be done?
Now the PHY side has created facts and it mitigates a lot of
problems. All downstream HSGMII patches and coding can be dropped
in the future.
For now only adapt the only DTS that still maps PHYs to HSGMII.
The patching sequence of the RTL8214x/8218x is very similar.
Especially the preparation for readiness is always the same.
Provide a common helper to improve readability.
While we are here clean up the changed functions
- Sort variable definitions according to upstream
- simplify some messages
Our phy driver can handle some multiport phys (e.g. RTL8218B
or RTL8214FC). To access arbitrary ports some package access
functions have been defined. These were implemented in the
mdio bus with poor knowledge about the phy/mdio dependencies.
So they add unneeded complexity to the bus and the phy driver
must access these external functions directly.
Provide a new helper get_package_phy() that can derive any
phy device in a package from a given phy of that package.
Make use of this local helper and cut the mdio dependency.
While we refactor several firmware patching functions rename
the loop variables to "port" to better indicate what we are
working on.
Now that we have a get_base_phy() function a lot code of the RTL8214FC
handling can be cleaned up. To name a few:
- use phy_read/phy_write instead of mdiobus functions or the even worse
phy_package_..._paged() helpers
- replace messages with phydev_info()
- remove if/else statements around copper/fibre handling
Currently phy packages (like RTL8214x/RTL8218x) are patched and
initialized as soon as the first phy of the package is found.
In this situation the shared structure is not finalized because
devm_phy_package_join() has only been called for the first phy.
This is no issue as the patching directly hammers the bus addresses
for the follow-up phys.
In the future we want to simplify the package handling and allow
to access all phy_device structures from only one phy_device of
the package. With this we can use normal phy_read/phy_write.
Switch the probing logic to "late patching". With this we will
initialize the firmware of the package when the last phy of the
package has been found and thus the shared structure is complete.
Provide get_base_phy() as the first package helper that allows
to determine the first phy of the package from any other phy.
While we are here drop the shared structure that only repeats the
phy name and has no other use.
The switch is powered by 54 Volts 2.77A barrel connector. The internal TTL
serial connector can be used to access the terminal. Pins from 1: TX RX
(unused) GND. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
*) Only 128 MB of RAM are currently configured because there were
infrequent random memory corruptions detected when using memtester with a
256 MB DT configuration. This could also be reproduced with RTLSDK.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial as per the layout above. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl930x-plasmacloud_psx10-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
The switch is powered by 54 Volts 2.77A barrel connector. The internal TTL
serial connector can be used to access the terminal. Pins from 1: TX RX
(unused) GND. Serial connection is via 115200 baud, 8N1.
A reset button is accessible through a hole in the front panel.
*) Only 128 MB of RAM are currently configured because there were
infrequent random memory corruptions detected when using memtester with a
256 MB DT configuration. This could also be reproduced with RTLSDK.
Installation
------------
* The device can be flashed by using sysupgrade command. Either from the
original vendor firmware or using an initramfs (see "Debug")
* Connect serial as per the layout above. Connection parameters: 115200 8N1
* The image must be copied using scp to /tmp of the device
scp openwrt-realtek-rtl930x-plasmacloud_psx8-squashfs-sysupgrade.bin root@[IP address of the device]:/tmp/
* start sysupgrade without saving the original vendor configuration
* Connect serial as per the layout above. Connection parameters: 115200 8N1.
* A tftp server is required, tftpd-hpa works well.
* Power the device, at U-Boot start rapidly hit Esc key to stop autoboot
* Enable network:
Plasma Cloud devices use a dual-firmware regions/slots boot mechanism. On
APs, the u-boot is "intelligent" and checks the NOR/NAND partitions (kernel
+ rootfs) for corruption via "datachk". If validation fails, the bootloader
automatically switches to the fallback partition.
On Realtek-based switches, this "datachk" helper is not available.
However, the bootloader still supports two firmware regions/slots.
When flashing a new image, the "inactive" partition is written instead of
overwriting the active one. If no "inactive" partition exists but
"firmware1" is present, the bootloader always treats "firmware1" as
fallback. Only after a successful flash is the `u-boot-env` updated to
select the newly written partition.
On reboot, the bootloader loads the kernel from the new partition and
passes `mtdparts` information as the kernel cmdline. The Plasma Cloud
switch device tree does not override this with a `bootargs` property, so
the active partition layout is honored from cmdline.
Since offsets, sizes, and names of partitions match between the device tree
and cmdline (except the inactive slot), properties and nodes such as
`nvmem-cells` or `compatible` remain fully usable.
This mechanism also allows switching back to the old firmware slot. For
example, if `firmware1` is currently active (`/proc/mtd` shows it), it can
be switched to slot 2 using:
Firmware upgrades use standard `sysupgrade` tarballs, chosen for
compatibility with vendor images. In theory, one can switch between vendor
and OpenWrt with:
sysupgrade -n /tmp/*-squashfs-sysupgrade.bin
Note: configuration files must not be preserved, as they are not compatible
with vanilla OpenWrt.
realtek: rtl930x: Enable parsing of u-boot nvmem layouts
To be able to read out the ethaddr from the u-boot environment for MAC
address configuration, it is required to also enable the NVMEM layout
parsing code for the U-Boot env layout.
The function of_get_mac_address is not taking care of evaluation the nvmem
address before trying to read out the mac-address properties. The driver
must check whether the return code is -EPROBE_DEFER and stop the probing
process in that case. If the nvmem-cell related driver code finished, the
probe can be redone ad the correct mac-address will appear for the device.
Felix Fietkau [Thu, 28 Aug 2025 08:42:43 +0000 (10:42 +0200)]
wifi-scripts: allow configuring per-radio macaddr in shared/mlo wifi-iface
When a wifi-iface section is used either for multiple vifs or MLD links,
make it possible to configure the per-radio/link macaddr.
When MLO is enabled, the main macaddr is used for the MLD interface.
Rosen Penev [Sun, 25 May 2025 01:10:42 +0000 (18:10 -0700)]
ath79: qcn5502: use led-sources for WMAC
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
It's also a bit funny matching against phy0 and phy1 when both differ
between ath9k and ath10k.
Felix Fietkau [Tue, 26 Aug 2025 20:06:25 +0000 (22:06 +0200)]
hostapd: update to Git HEAD (2025-08-26)
33fb6c738bc4 P2P2: Enable some testing parameters without CONFIG_TESTING_OPTIONS 56616c4183a6 P2P2: Update device name with USD device found 1d791939dcdf Cancel pending connect radio work when network is removed 8235e21d7fe3 P2P: Fix preferred frequency list size handling in p2p_check_pref_chan() 4bc754d9c727 Add QCA vendor interface to enable/disable TX power limit d65f5705df98 Add QCA vendor attribute to disable A-MSDU address check validation 74881765b7fb nl80211: Use i802_bss in qca_set_allowed_ap_freqs() to use correct ifindex ca8303135cbb P2P2: Set P2P mode to the driver on P2P GO device 063ae7af68dc ACS: Fix incorrect index calculation for primary channel 4aa3a58377c1 ACS: Validate all channels in a segment before selection 02c9d3376224 ACS: Extend support to exclude 6 GHz non-PSC in non-offloaded ACS 307365eb57bb tests: Add test for ACS exclude 6 GHz non-PSC 0721e4886316 Add QCA vendor attribute to configure EHT RTWT support 76b39db44c77 QCA vendor attribute to configure BTM MLD Recommendation For Multiple APs support 2faeffdeca22 AP MLD: Properly deinit sm of non-ML STA connected to ML AP e4f4e5a872a5 AP MLD: Fix STA's flag wrongly updated in SME-in-driver cases ec6cade42c0f Increase buffer size to handle long freq_list entries in config 0522585da7b0 Write freq_list as per-network item in wpa_supplicant.conf 5e527704b912 Use SCS reconfiguration logic under CONFIG_NO_ROBUST_AV 5d6214a724c1 PASN: Clear driver/firwmare ranging context if PASN Auth 1 fails 14dc782d50db DPP: Avoid generating DPP shared secret(z) for non-association links 40326b60b17a RSNO: Allow OWE to be configured in RSN overrides in AP processing acadef1b04d5 hostapd_cli: Open a new hostapd connection on ping failure when using -a ac0d9bd80ec5 Add QCA vendor attributes to configure global TX chain mask f5b8ef6c966a Add QCA vendor attributes for MSDU TX statistics 6c11fcefe4fc hostapd: Prevent blocking sends on control interface monitor socket 0bbb8a66f64c AP MLD: Remove redundant outer loop in hostapd_notif_disassoc_mld() 52fb5ccd91f3 AP MLD: Avoid using mld_id to identify partners 7bb930d50b5f wpa_supplicant: Add option to disable 80+80 MHz opclass advertisement 9001059bd6ad tests: Make dbus_connect_oom more robust 663fb1940231 AP MLD: Fix hostapd_is_mld_ap() check 590f3bdb4c61 AP MLD: Rename hostapd_is_mld_ap() to hostapd_is_multiple_link_mld() b13b69a235f7 Add VLANID in the AP-STA-CONNECTED events c1e8b1c6462b SAE: Assign VLAN when using PMKSA caching 9bc29dcdfdee SAE: Default password binding through control interface 9de127c31c40 tests: More testing coverage for SAE with multiple passwords 5ce1d4180386 nl80211: Fix crash by cancelling scan timeout before a BSS is removed ca266cc24d87 nl80211: Fix crash by setting the drv->ctx properly
Agustin Lorenzo [Sun, 20 Jul 2025 21:51:50 +0000 (23:51 +0200)]
qualcommax: migrate wifi configuration (ath10k) device paths for 6.12 kernel
The device tree PCIe host node name has been changed in the new
6.12 kernel[1]. Hence we have to update the wifi device path to
make sure it can work properly.
Signed-off-by: Agustin Lorenzo <agustin.lorenzo@thinco.es> Signed-off-by: Sean Khan <datapronix@protonmail.com> Link: https://github.com/openwrt/openwrt/pull/19479 Signed-off-by: Robert Marko <robimarko@gmail.com>
Paul Spooren [Tue, 26 Aug 2025 11:36:54 +0000 (13:36 +0200)]
include: make APK .list files even more reproducible
This commit fixes "aff2f096235 include: make APK .list files reproducible"
since it would create the .list file while `find` still runs. This causes the
.list file to be part of itself. As an alternative, write the file to a
temporary folder first and then move it.
Fix: aff2f096235 include: make APK .list files reproducible Signed-off-by: Paul Spooren <mail@aparcar.org>
Harshal Gohel [Fri, 8 Aug 2025 15:31:03 +0000 (17:31 +0200)]
realtek: rtl93xx: Trap LLDP management frames
LLDP packets must be transmitted on a single port and trapped on a port of
a device which understands LLDP. It must not forward it to other ports to
avoid confusing neighbor information on connected devices.
Harshal Gohel [Fri, 8 Aug 2025 15:31:03 +0000 (17:31 +0200)]
realtek: dsa: Fix prefix for trapping functions
The functions to enable trapping of management frames are not RTL83xx
specific. It is more appropriate to use the more generic "rtldsa" prefix
for them.
John Audia [Fri, 15 Aug 2025 19:22:27 +0000 (15:22 -0400)]
generic/config-6.12: add new option
Add new option required to build with VHOST_MENU=y
This option enables two IOCTLs: VHOST_SET_FORK_FROM_OWNER and
VHOST_GET_FORK_FROM_OWNER. These allow userspace applications
to modify the vhost worker mode for vhost devices.
Also expose module parameter 'fork_from_owner_default' to allow users
to configure the default mode for vhost workers.
By default, `VHOST_ENABLE_FORK_OWNER_CONTROL` is set to `y`,
users can change the worker thread mode as needed.
If this config is disabled (n),the related IOCTLs and parameters will
be unavailable.
Rosen Penev [Sun, 25 May 2025 01:45:03 +0000 (18:45 -0700)]
ath79: araknis_an-300-ap-i-n: use led-sources
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
realtek: convert access to RTL931x analog serdes pages
The RTL931x has 14 frontend and at least 26 backend serdes. Currently
the programming functions always need to determine the right backend
serdes from the given frontend serdes on their own.
We plan to provide a consistent serdes mapping to all callers as follows
frontend page "even" frontend SerDes "odd" frontend SerDes
page 0x000-0x03f (analog): page 0x000-0x03f back SDS page 0x000-0x03f back SDS
page 0x100-0x13f (XSGMII1): page 0x000-0x03f back SDS page 0x000-0x03f back SDS+1
page 0x200-0x23f (XSGMII2): page 0x000-0x03f back SDS page 0x000-0x03f back SDS+2
As a first micro step provide some helpers that simply operate on
frontend serdes and will determine the backend serdes on their own.
So rtmdio_931x_read_sds_phy() and rtmdio_931x_write_sds_phy() operate
on backend serdes. While rtmdio_931x_read_sds_phy_**new**() and
rtmdio_931x_write_sds_phy_**new**() operate on frontend serdes.
This is only an intermediate naming convention and will be cleanup
afterwards.
In a first step make use of these new functions whenever we
want to access the analog page. As the pages stay unchanged
in the new functions conversion is as simple as this:
Rosen Penev [Mon, 26 May 2025 01:39:55 +0000 (18:39 -0700)]
treewide: fix compatible string for ath10k
The ath9k documentation says to use pci168c strings for the compatible
string, probably because the OWL loader uses it to overide bogus pci IDs
like abcd. This is not the case with ath10k and the documentation
explicitly states to use qcom,ath10k.
Rosen Penev [Sun, 8 Jun 2025 02:47:04 +0000 (19:47 -0700)]
ath79: compex_wpj531: remove wrong wifi device
This device does not come with a pci card. It has a slot where one can
get supplied. What's more, nvmem or ieee80211 frequency limits are not
applied here. It can just get removed.
Rosen Penev [Sun, 25 May 2025 01:14:47 +0000 (18:14 -0700)]
ath79: wb2000: use led-sources for ath9k
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Rosen Penev [Sun, 25 May 2025 03:41:27 +0000 (20:41 -0700)]
ath79: dir-825-c1: set LED pin properly
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Rosen Penev [Mon, 26 May 2025 01:26:22 +0000 (18:26 -0700)]
ath79: iodata: set ath9k LED pin
The ath9k driver creates an ath9k LED by default. Instead of having a
non functional LED, configure it properly and remove the extra as it's
not needed.
Set the pcie device to qcom,ath10k as the Documentation says, The pci
line implies it's ath9k when it's actually ath10k.
Paul Donald [Mon, 21 Jul 2025 17:54:43 +0000 (19:54 +0200)]
mediatek: remove the aquantia kmod from filogic mediatek platforms
The kmod is installed on all filogic mediatek images, even for devices
that do not have any aquantia hardware. Remove it.
Signed-off-by: Paul Donald <newtwen+github@gmail.com> Link: https://github.com/openwrt/openwrt/pull/19488
[Do not explicitly remove kmod-phy-aquantia from gatonetworks_gdsp] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
projects / thirdparty / openwrt.git / log
