Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
realtek: DTS: add macro for switch port with SerDes
In the future the PCS & DSA drivers will lookup the SerDes of a
switch port via pcs-handle (like upstream does). Provide a macro
that allows to expand the existing port definitions. To link a
SerDes to port simply do
Either in short form:
replace SWITCH_PORT(0, 1, qsgmii)
with SWITCH_PORT_SDS(0, 1, 3, qsgmii) (Link to SerDes 3)
Coia Prant [Tue, 10 Dec 2024 15:18:13 +0000 (23:18 +0800)]
ramips: add support for Qding QC202
This is a smart door lock device equipped with OpenWrt 14.07 OEM
modified version Qdwrt
The OEM has closed down, This commit is intended to maximize the
remaining value of these devices. It can flash OpenWrt to become
an AP
Specification:
- SoC: MediaTek MT7628NN
- Flash: 8 MB
- RAM: 64 MB
- Power: DC 5V - 25V
- Ethernet: 1 x RJ45 (10/100 Mbps)
- Wireless radio: 802.11n 2.4g-only
- On-Board LED:
Status 1: GPIO/43 active-low
Status 2: GPIO/44 active-low
Power: AlwaysOn
- Button:
WPS / RESET: GPIO/14 active-low
- Bluetooth: CC2541 via UART1 (ttyS1) and GPIO/26-29
- RFID: MF RC522 on I2C@28
- RTC: DS1339 on I2C@68
- Shell (via CON1 cable)
- LED (Swipe card area):
- Green GPIO/3 active-high
- Red GPIO/11 active-high
- Matrix keypad: (active-low)
GPIO/20 GPIO/21 GPIO/19 (Rows)
GPIO/24 1 2 3
GPIO/25 4 5 6
GPIO/22 7 8 9
GPIO/23 BACK 0 ENTER
(Cols)
- UART: 1 x UART on PCB - 57600 8N1
- GPIO Relay: GPIO/42 active-high
- GPIO Buzzer: GPIO/15 active-high
Warning:
The original firmware does not use the device tree.
This device tree is written based on the content of /sys/devices/platform
and has been tested
Note:
- On the device, matrix keypad rows actually are columns, and the columns actually are rows
- The key code of the CLEAR key of the matrix keypad is BACK in the original firmware.
Issue:
- No drivers in mainline kernel for RFID and Bluetooth.
Flash Instruction:
Using SSH/Telnet:
1. Connect the board to the computer via RJ45 Ethernet
2. Login 10.10.10.1 with root password "szqdingnet123" (SSH Port 22, Telnet Port 9900)
3. Download openwrt firmware on the computer.
4. Setup a http server on computer. And use wget download openwrt firmware from computer
5. Use command "mtd -r write openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin firmware"
to flash
Using U-Boot WebUI:
1. Configure PC with a static IP address 10.10.10.2/24.
2. Open http://10.10.10.1
3. Use "mkqdimg -B qc202 -f openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin" to
make image.
4. Upload factory.bin via U-Boot WebUI.
Original Firmware Dump / More details:
https://blog.gov.cooking/archives/research-qianding-smart-locker-and-flash.html
Original U-Boot firmware image tools:
https://gitlab.com/CoiaPrant/mkqdimg
This device is flashed OpenWRT base firmware with this target.
The LuCI webpage is integrated in default for upgrading.
Flash instruction through u-boot:
1. Prepare the TFTP server on PC.
2. Connect uart to PC, select "2. Upgrade firmware" in u-boot menu.
3. Select "0 - TFTP client (Default)", input client IP, server IP, flashed bin file path
4. Wait about 60 seconds to complete flashing
Obviously default address-cells size is fixed to 64 bit. Align
with upstream and override address size to 32 bit.
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/20091 Signed-off-by: Robert Marko <robimarko@gmail.com>
Note: To use SPI interface on mPCIe slot, weld 4x 0402 0R resistors on [R832-835] or [R960-963]
mPCIe mapping:
45# - SPI_CLK
47# - SPI_MISO
49# - SPI_MOSI
51# - SPI_CSN
Flash instruction through LuCI:
This device is flashed OpenWRT base firmware with this target.
The LuCI webpage is integrated in default for upgrading.
Flash instruction through u-boot:
1. Prepare the TFTP server on PC.
2. Connect uart to PC, select "2. System Load Linux Kernel then write to Flash via TFTP." in u-boot menu.
3. input flashed bin file path, server IP, client IP
4. Wait about 20 seconds to complete flashing
Flashing via TFTP:
1. Connect your PC and router to the first LAN port, configure PC interface using IP 192.168.1.2, mask 255.255.255.0
2. Save the factory image of the OpenWRT firmware, renamed to KN-3711_recovery.bin, on the TFTP server
3. Hold the reset button and power up the device
4. Keep the button pressed until the status LED starts blinking
The EN751221 has an XHCI that is compatible with MT7621.
While there is setup logic in the vendor code for both
EN751221 and MT7621, but MT7621 does not use it in mainline
or OpenWRT, and it appears to work correctly with EN751221.
Include SCSI / Mass Storage because many EcoNet devices
contain a builtin USB SD-Card reader.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://github.com/openwrt/openwrt/pull/20050
[Remove usb storage kmod from smartfiber_xp8421-b] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The baud rate control on Airoha does not function properly. This
patch enables the inactive code responsible for this. The UART2
baud rate is correct. HSUART3 operates at twice the requested
baud rate. The same problem exists in the current code, so this
doesn't introduce any regression. Support for baud rates higher
than 460800 is still required. This will be added in the future.
Tested on Gemtek W1700k. UART2 and HSUART3 are working fine.
John Audia [Thu, 11 Sep 2025 19:37:51 +0000 (15:37 -0400)]
x86: config: add CONFIG_MITIGATION_VMSCAPE=y
Introduced in the 6.12.47 update, set this new mitigation option to
be enabled. See: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/diff/arch/x86/Kconfig?id=v6.12.47&id2=v6.12.46
realtek: mdio: register SerDes bus so it can be looked up
The upcoming PCS driver will lookup the SerDes mdio bus via
of_mdio_find_bus() and the devicetree. This is only possible
with proper registration via devm_of_mdiobus_register().
No need two write a dedicated 1:1 mapping function and link that
for all the targets except RTL931x. Combine everything into a generic
helper and reduce the configuration structure.
The new SerDes mdio driver produces the following compilation
error in non-debug builds.
drivers/net/mdio/mdio-realtek-otto-serdes.c:72:12:
error: 'rtsds_sds_to_mmd' defined but not used [-Werror=unused-function]
72 | static int rtsds_sds_to_mmd(int sds_page, int sds_regnum)
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Move the function into the debug section.
Fixes: 7a7ee72c4d306e7 ("realtek: mdio: add SerDes driver") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/20078 Signed-off-by: Robert Marko <robimarko@gmail.com>
New upstream release. Debian changelog:
* New upstream microcode datafile 20250812 (closes: #1110983, #1112168)
- Mitgations for INTEL-SA-01249 (processor Stream Cache):
CVE-2025-20109: Improper Isolation or Compartmentalization in the
stream cache mechanism for some Intel Processors may allow an
authenticated user to potentially enable escalation of privilege via
local access. Intel also disclosed that several processors models
had already received this mitigation on the previous microcode
release, 20250512.
- Mitigations for INTEL-SA-01308:
CVE-2025-22840: Sequence of processor instructions leads to
unexpected behavior for some Intel Xeon 6 Scalable processors may
allow an authenticated user to potentially enable escalation of
privilege via local access.
- Mitigations for INTEL-SA-01310 (OOBM services module):
CVE-2025-22839: Insufficient granularity of access control in the
OOB-MSM for some Intel Xeon 6 Scalable processors may allow a
privileged user to potentially enable escalation of privilege via
adjacent access.
- Mitigations for INTEL-SA-01311 (Intel TDX):
CVE-2025-22889: Improper handling of overlap between protected
memory ranges for some Intel Xeon 6 processors with Intel TDX may
allow a privileged user to potentially enable escalation of
privilege via local access.
- Mitigations for INTEL-SA-01313:
CVE-2025-20053: Improper buffer restrictions for some Intel Xeon
Processor firmware with SGX enabled may allow a privileged user to
potentially enable escalation of privilege via local access.
CVE-2025-21090: Missing reference to active allocated resource for
some Intel Xeon processors may allow an authenticated user to
potentially enable denial of service via local access.
CVE-2025-24305: Insufficient control flow management in the Alias
Checking Trusted Module (ACTM) firmware for some Intel Xeon
processors may allow a privileged user to potentially enable
escalation of privilege via local access.
- Mitigations for INTEL-SA-01367 (Intel SGX, TDX):
CVE-2025-26403: Out-of-bounds write in the memory subsystem for some
Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow
a privileged user to potentially enable escalation of privilege via
local access.
CVE-2025-32086: Improperly implemented security check for standard
in the DDRIO configuration for some Intel Xeon 6 Processors when
using Intel SGX or Intel TDX may allow a privileged user to
potentially enable escalation of privilege via local access.
- Fixes for unspecified functional issues on several Intel Core and
Intel Xeon processor models.
* Updated microcodes:
sig 0x000606a6, pf_mask 0x87, 2025-03-11, rev 0xd000410, size 309248
sig 0x000606c1, pf_mask 0x10, 2025-03-06, rev 0x10002e0, size 301056
sig 0x000806f8, pf_mask 0x87, 2025-04-04, rev 0x2b000643, size 592896
sig 0x000806f7, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f6, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f5, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f4, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f8, pf_mask 0x10, 2025-04-08, rev 0x2c000401, size 625664
sig 0x000806f6, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000806f5, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000806f4, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000a06a4, pf_mask 0xe6, 2025-03-19, rev 0x0025, size 140288
sig 0x000a06d1, pf_mask 0x95, 2025-05-15, rev 0x10003d0, size 1667072
sig 0x000a06d1, pf_mask 0x20, 2025-05-15, rev 0xa000100, size 1638400
sig 0x000a06f3, pf_mask 0x01, 2025-05-03, rev 0x3000362, size 1530880
sig 0x000b06a2, pf_mask 0xe0, 2025-02-24, rev 0x4129, size 224256
sig 0x000b06a3, pf_mask 0xe0, 2025-02-24, rev 0x4129
sig 0x000b06a8, pf_mask 0xe0, 2025-02-24, rev 0x4129
sig 0x000b06d1, pf_mask 0x80, 2025-05-21, rev 0x0123, size 80896
sig 0x000c0662, pf_mask 0x82, 2025-05-14, rev 0x0119, size 90112
sig 0x000c06a2, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c0652, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c0664, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c06f2, pf_mask 0x87, 2025-04-15, rev 0x210002b3, size 564224
sig 0x000c06f1, pf_mask 0x87, 2025-04-15, rev 0x210002b3
Roy H [Tue, 16 Sep 2025 03:25:36 +0000 (10:25 +0700)]
ath79: fix longdata-aps256 wan port to work in factory bootloader
In first commit I successfully bring WAN port into ethernet switch,
without realizing that I was using custom bootloader. But if using
original bootloader it do not works. WAN port in original bootloader
is tied to using its own GMAC.
This fix is made so this firmware will be compatible with orignal
bootloader, so the user can directly flash from stock firmware without
changing anything.
Until now the SerDes access is realized with some helper functions
in the mdio bus. These were moved around a lot and had no real home.
End that temporary solution to move them where they belong.
The target design for the different Realtek drivers is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (to be developed)
- mdio driver manages SerDes on low level (this commit)
This driver adds the low level SerDes access via mdio. For debugging
purposes the user can interact with the SerDes in different ways.
First, there is a debug interface in
/sys/kernel/debug/realtek_otto_serdes/serdes.X/registers.
With that a dump of all registers can be shown.
Second, one can read/write registers via the mmd functions of the
mdio command line tool. Important to know: The registers are accessed
on the vendor specific MDIO_MMD_VEND1 device address (=30). Additionally
the SerDes page and register are concatenated into the the mmd register.
Top 8 bits are SerDes page and bottom 8 bits are SerDEs register.
E.g.
Read register 0x02 on page 0x03 of SerDes 0
> mdio realtek-serdes-mdio mmd 0:30 raw 0x0302
Write register 0x12 on page 0x02 of SerDes 1
> mdio realtek-serdes-mdio mmd 1:30 raw 0x0212 0x2222
For now this driver is only defined in the devicetree and activated
in the kernel build. There is no current consumer but at least
the debugging interface is available. Cleanup of the currently used
SerDes functions will come later.
There is some open coding in the ethernet driver. Drop
that and use kernel helpers instead.
- Use napi_gro_receive() instead of local skb list
- Use skb_put_data() instead of skb_put() plus memcpy()
- Use netdev_alloc_skb_ip_align() instead of manual alignment
realtek: Increase verbosity in rtldsa_fib4_add()/rtldsa_fib4_del()
L3 routing in Realtek switches is some magic voodoo. Especially
the syslog messages are not helpful at all for error diagnosis. As
a first step refactor rtldsa_fib4_add() and rtldsa_fib4_del() to
get some idea what is going on. For this add a helper function
rtldsa_fib4_check() for basic sanity checks and logging.
Do not only increase verbosity but fix some coding as well.
- Drop leftover checks for subnet 192.168.100.x
- Better detection of broadcast routes
- clearer MAC/VLAN formatting
- sort variables descending
- rename 1 char variable "r" to "route"
- change log helpers from pr...() to dev_...()
Before:
[ 5.640463] rtl83xx_fib_event_work_do: FIB4 default rule failed
[ 5.647164] rtl83xx_fib_event_work_do: FIB4 default rule failed
[ 13.975386] rtl83xx_fib_event_work_do: FIB4 failed
[ 13.981456] rtl83xx_fib_event_work_do: FIB4 failed
[ 13.986906] rtl83xx_fib_event_work_do: FIB4 failed
[ 18.455777] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[ 18.470993] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[ 18.476839] rtl83xx_fib4_del: no such gateway: 0.0.0.0
Leo Barsky [Wed, 17 Sep 2025 16:01:59 +0000 (13:01 -0300)]
kernel: 6.12: refresh patches for airoha/econet on 6.12.45
Refresh patches 6.12 for airoha and econet
Fixes: 122135b964 ("airoha: an7581: add support for kernel 6.12") Fixes: 73d0f92460 ("kernel: Add new platform EcoNet MIPS") Signed-off-by: Leo Barsky <leobrsky@proton.me> Link: https://github.com/openwrt/openwrt/pull/20073 Signed-off-by: Robert Marko <robimarko@gmail.com>
This is an automatically generated commit which aids following Kernel patch
history, as git will see the move and copy as a rename thus defeating the
purpose.
For the original discussion see:
https://lists.openwrt.org/pipermail/openwrt-devel/2023-October/041673.html
Daniel Golle [Mon, 15 Sep 2025 16:11:20 +0000 (17:11 +0100)]
mediatek: refresh patches
Refresh patch which was accidentally without non-confrming style and
not matching line numbers.
Also add patch description by copying the description of the commit
in OpenWrt, so the patch can be applied using `git am` and is ready
for upstream submission.
Fixes: afcec128c5 ("mediatek: add support for trng on mt7988a") Signed-off-by: Daniel Golle <daniel@makrotopia.org>
George Moussalem [Tue, 19 Aug 2025 14:51:59 +0000 (18:51 +0400)]
qualcommax: ipq50xx: backport upstreamed patches for adding ipq5018 CMN PLL support
Use upstreamed patches for adding IPQ CMN PLL driver support and its
node and clocks to the DTS accordingly.
In addition, set clock-div and clock-mult properties instead of the
frequency itself for the XO board clock in all board files as it's
converted to a fixed factor clock.
Felix Fietkau [Sun, 14 Sep 2025 15:04:44 +0000 (17:04 +0200)]
ucode: update to Git HEAD (2025-08-26)
2ae08749a87e ucode: add padding to uc_resource_ext_t 7931bd901222 socket: add socket.pair() 4cd07cd66ab3 socket: add socket.open() 6350e6383ff3 struct: implement X and Z formats for hex and base64 coding e632e6da1fbc vm: fix potential eyond end of array accesses a7ead3169ebf resolv: properly handle multiple TXT strings 9d782ea4af63 math: Add an optional range to rand()
Fixes: https://github.com/jow-/ucode/issues/315 Fixes: https://github.com/jow-/ucode/issues/321 Signed-off-by: Felix Fietkau <nbd@nbd.name>
bcm27xx: Add padding after writing rootfs to image.
This addresses #9113 by adding up to 1MB padding after writing the
rootfs image. On boot mount_root will probe for existing filesystems
after the rootfs image data. Without overwriting the initial free
space left on the rootfs partition, OpenWrt might incorrectly detect
an exising filesystem and fails to mount it, resulting in a bricked
device as the overlayfs will not be mountend and settings will not be
available.
David Härdeman [Thu, 11 Sep 2025 21:38:11 +0000 (23:38 +0200)]
odhcpd: update to Git HEAD (2025-08-26)
2859741d971e dhcpv4: store reqopts as uint8_t 6d342cc03bf7 odhcpd: add DNR (RFC 9463) support c89b8b3f2ff3 odhcpd: make the IPv6 RA DNR lifetime configurable 066b3dc6ec1a netlink: fix a memory leak 171140e90b6a odhcpd: add a helper function for addr6/prefix parsing 5585b969c18f router: move pref64 calculations to the config stage 4308384748be dhcpv6: add ipv6 pxe support 6e1ad492cef5 router: replace ssize_t with size_t
Donghyun Ko [Fri, 1 Aug 2025 06:01:07 +0000 (15:01 +0900)]
mediatek: add support for ipTIME AX7800M-6E
Specification
-------------
- SoC : MediaTek MT7986AV quad-core ARM Cortex-A53 2GHz
- RAM : DDR4 512Mbytes, Nanya Technology NT5AD256M16E4
- Flash : 128Mbytes NAND Flash, ESMT F50L1G41LB
- WLAN : MediaTek MT7976DAN, MediaTek MT7916AN, MediaTek MT7976AN
- 2.4GHz : b/g/n/ax, Multi User MIMO
- 5GHz : a/n/ac/ax, Multi User MIMO
- 6GHz : ax, Multi User MIMO
- Ethernet : 10/100/1000 Mbps x4, LAN (MediaTek MT7531AE)
10/100/1000/2500 Mbps x1, WAN (MaxLinear GPY211C0VC)
- UART : 1x4 pin header on PCB
- [J1] 3.3V, TX, RX, GND (115200, 8N1)
- Buttons : WPS, Reset
- Switches : Rfkill Slide Switch
- USB : 1x USB 3.0 (MediaTek MT7986AV peripheral)
- FAN : 1x Fan (off - slow - fast)
- LEDs : 1x Power (Blue)
1x CPU (Blue)
1x Wi-Fi 6GHz (Blue)
1x Wi-Fi 5GHz (Blue)
1x Wi-Fi 2.4GHz (Blue)
4x LAN activity (Blue)
1x WAN activity (Blue)
1x USB 3.0 (Blue)
- Power : 12VDC, 3.5A (Center positive polarity)
MAC address
-----------
+-----------+-------------------+------------------------+
| Interface | MAC | Algorithm |
+-----------+-------------------+------------------------+
| WLAN 2.4G | 58:86:94:xx:xx:xx | label1 |
| WLAN 5G | 5A:86:94:xx:xx:xx | label2 with LA Bit set |
| WLAN 6G | 5A:86:94:xx:xx:xx | label1 with LA Bit set |
| WAN | 58:86:94:xx:xx:xx | label1 + 1 |
| LAN | 58:86:94:xx:xx:xx | label1 + 3 |
+-----------+-------------------+------------------------+
The WLAN 2.4G MAC address (label1) was found in 'Factory' partition, 0xA0004
The WLAN 5G MAC address (label2) was found in 'Factory' partition, 0x4
Installation
------------
1. Download the OEM recovery software (ipTIME Firmware Wizard (11ac))
from the manufacturer's website
2. Download the *squashfs-factory.bin file from the OpenWrt website
3. Press a reset button, and power up the router (keep pressing the reset button)
4. Wait more than 10 seconds until the CPU LED stop blinking
5. Connect the router (LAN port) to the PC
6. Run the OEM recovery software and follow the instructions
7. Select the *squashfs-factory.bin file during the router recovery process
8. Wait for the router to boot from *squashfs-factory.bin
Note: The router will automatically reboot if no file is uploaded within
55 seconds.
Fan Control
------------
The fan speed is controlled by writing a value from 0 to 2 to the
`fan1_target` file.
```
cd /sys/devices/platform/gpio-fan/hwmon/hwmon2
echo '0' > fan1_target // off
echo '1' > fan1_target // slow
echo '2' > fan1_target // fast
```
Limitation: Enabling Wi-Fi 6E
----------
Wi-Fi 6E (6GHz) does not work out of the box on LuCI.
After installation, you need to configure a few settings in the `radio1`
and `default_radio1` sections of the `/etc/config/wireless`.
Once you have made these changes, you can enable and use Wi-Fi 6E.
In the `radio1` section, you need to add three common options:
- band: must be set to `6g`
- country: a valid country code for the 6GHz band
- channel: a preferrend scanning channel (PSC) for 6GHz
In the `default_radio1` section, you need to add the SSID and key:
- ssid: The public name of your Wi-Fi network
- key: The Wi-Fi password
- encryption: must be set to either `sae` for WPA3 or `owe` for OWE
(open network)
Example:
```
config wifi-device 'radio1'
...
option band '6g'
option country 'KR'
option channel '37'
...
Limitation: Maximum Transmit Power
----------
The maximum transmit power is currently broken. In the drop-down menu,
you can only choose between "driver default" and "255 dBm (2147493647
mW)". There is currently no workaround for the issue. Please leave the
maximum transmit power set to "driver default".
Daniel Golle [Thu, 11 Sep 2025 00:43:24 +0000 (01:43 +0100)]
mediatek: add driver for HW-RNG v2
Add driver for hardware random number generator found in MT7981, MT7988
and MT7987. This gives us a fast source of high-quality random numbers
on those platforms.
root@OpenWrt:~# cat /dev/hwrng | rngtest -c 10000
rngtest 6.17
Copyright (c) 2004 by Henrique de Moraes Holschuh
This is free software; see the source for copying conditions. There is NO warranty; not even for MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
rngtest: starting FIPS tests...
rngtest: bits received from input: 200000032
rngtest: FIPS 140-2 successes: 9988
rngtest: FIPS 140-2 failures: 12
rngtest: FIPS 140-2(2001-10-10) Monobit: 2
rngtest: FIPS 140-2(2001-10-10) Poker: 0
rngtest: FIPS 140-2(2001-10-10) Runs: 4
rngtest: FIPS 140-2(2001-10-10) Long run: 6
rngtest: FIPS 140-2(2001-10-10) Continuous run: 0
rngtest: input channel speed: (min=616.108; avg=11979.007; max=19531250.000)Kibits/s
rngtest: FIPS tests speed: (min=1.859; avg=82.116; max=83.656)Mibits/s
rngtest: Program run time: 18629928 microseconds
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
The only consumers of the Realtek HSGMII (2.5G SGMII) mode were
the RTL8226/RTL8221B PHYs. These have been converted to dynamic
SGMII/2500base-x mode switching. Drop the leftovers of the mode
implementation.
The mdio controller got its own dts node with a dedicated bus node.
Until now it still searches the phy nodes in the ethernet node.
Change the driver so it searches the nodes at the right location.
For this to work move the phy nodes in all dts/dtsi over to the new
bus node. Use the following replacement rule:
Until now the mdio bus is a subnode of the ethernet device. This
coupling is different from upstream and wrong. Ethernet and mdio
are different devices. Additionally differentiate between mdio
controller and mdio bus. To make it clear:
- There is one mdio controller
- With up to 4 busses (on RTL93xx)
Prepare new mdio controller and bus nodes with SoC specific compatibles.
These will be used later when refactoring the mdio driver probing.
Remark! For now only define the first bus for the RTL93xx targets.
So the driver still relies on "rtl9300,smi-address = <x y>;". It will
need much more refactoring to get totally aligned with upstream.
realtek: rtl931x: align SerDes access with other targets
While converting the RTL931x SerDes code to the new frontend
access methods, the target specific workarounds where left in
place. The old functions were kept and the phy/sds mapping
was unchanged too. It is time to clean this up
- drop the old functions
- reuse the existing read/write logic
- harden the new functions
For now keep the function naming rtmdio_...__new() as is. This
will be changed in a future commit.
econet: Add new target TP-Link Archer VR1200v (v2)
The TP-Link Archer VR1200v (v2) is a low end DSL modem based on the
EcoNet EN751221 processor platform.
While it does have an unlocked bootloader, the factory upgrade feature
requires a cryptographic signature so flashing from the web UI is not
feasible.
The Archer VR1200v (v2) uses a dual-image layout. I have chosen to reuse
this to support dual-boot between OpenWRT and the factory firmware.
Flashing instructions (from bootloader):
Build and then locate the squashfs-sysupgrade.bin image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-sysupgrade.bin)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds, you should get to a `bldr>` prompt
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type `re` or simply restart the device to boot into OpenWRT
The SmartFiber XP8421-B is a fiber modem which is available for $20 online
and has 512MB of memory, 256MB of SPI NAND flash and 2 USB 2.0 ports in
addition to ethernet, wifi and XPON.
Because EcoNet is not currently producing evaluation boards, the XP8421-B
stands in as a convenient, low cost, off-the-shelf, representitive example
of the capabilities of the EN751221 econet processor. This is also the
example board that is included in the upstream Linux patchset.
The XP8421-B, and apparently many other devices of this platform, use a
dual-image layout. I have chosen to reuse this to support dual-boot between
OpenWRT and the factory firmware. Certain design decisions were made with
the goal of not overwriting data that is used by the factory OS.
This commit also introduces a utility for switching between OS_A and OS_B
which are used for OpenWRT and Factory OS respectively.
Flashing instructions (from bootloader):
Build and then locate the squashfs-tclinux.trx image file
Get the length of that file in hex: printf '%X\n' "$(stat -c%s the-file-squashfs-tclinux.trx)"
Connect to device with xmodem capability, e.g. picocom --send-cmd lsx -vv -b 115200 /dev/ttyUSB0
Switch device on and press a key within 3 seconds
Enter bootloader username and password: telecomadmin nE7jA%5m
Type: xmdm 80020000 <file length hex>
Quickly start xmodem and send the file, in picocom that is ctrl+a ctrl+s <paste-the-file-name> enter If the transfer fails to start, wait 30 seconds to a
minute for the bootloader prompt to return and then try the command again.
Once the transfer has completed successfully, type the following flash 80000 80020000 <file length hex>
Type go or simply restart the device to boot into OpenWRT
EcoNet EN75xx is a big endian MIPS platform used in XPON (fiber),
DSL, and SIM (3g/4g) applications. Complete GPL vender SDKs exist
for this platform, but are based on Linux 2.6.
The bulk of this submission has already been accepted upstream:
https://patchwork.kernel.org/project/linux-mips/list/?series=960479&state=*
This platform uses a bootloader that is derived from old TrendChip
code. This bootloader implements a frustratingly complex Bad Block
Table which is implemented here in en75_bmt.c
This BMT is not upstreamed because it depends on mtk_bmt framework
which likewise is not upstreamed.
This BMT system rewrites block indexes in flash and if the bootloader
considers it to be corrupted, it will attempt to automatically rebuild
on boot. So without implementing the algorithm, you can't safely use
the disk at all.
Hardware
--------
RockChip RK3568 ARM64 (4 cores)
1/2GB LPDDR4 RAM
2x 2500 Base-T (PCIe, r8125b)
1 LED (Power)
1 Button (Reset)
Micro-SD Slot
2x USB 3.0 Port
12V DC Jack
Installation
------------
Uncompress the OpenWrt sysupgrade and write it to a micro SD card using
dd.
Tested-by: Francisco G Luna <frangonlun@gmail.com> Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/19990 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Tested-by: Francisco G Luna <frangonlun@gmail.com> Signed-off-by: Tianling Shen <cnsztl@immortalwrt.org> Link: https://github.com/openwrt/openwrt/pull/19990 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
projects / thirdparty / openwrt.git / log
