boot: Introduce support for U-Boot support for Airoha EN7581/AN7583
Introduce support for U-Boot for Airoha EN7581/AN7583. For EN7581
initial patch are already in U-Boot mainline and doesn't require
backport, for AN7583 some patch are still pending but already posted
upstream.
Also add for now, precompiled binary for ATF BL2 and BL31. Support for
ATF is planned and will come later.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Introduce initial support for Airoha AN7583 SoC and add all the required
patch for basic functionality of the SoC.
Airoha AN7583 is based on Airoha EN7581 SoC with some major changes on
the PHY handling and Serdes. It can be see as a lower spec of EN7581
with modern and simplified implementations.
All the patch are sent upstream and are pending revision. Support for
PCIe and USB will come later as soon as DT structure is accepted
upstream.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
This add a pending version of the Airoha PCS driver to add support for
External PHY. The Airoha PCS driver will receive some minor modification
once we the PCS subsystem will be defined upstream.
Add all the required node for GDM2 and GDM4 and enable the PCS config.
Signed-off-by: Christian Marangi <ansuelsmth@gmail.com>
Jan Hoffmann [Thu, 24 Jul 2025 17:39:28 +0000 (19:39 +0200)]
realtek: support configuring SerDes auto-negotiation on RTL93xx
There are SFP modules which only work if auto-negotiation is disabled,
like some "OEM SFP-2.5G-T" modules. This also seems to be necessary for
RTL8226/RTL8221B PHYs when using 2500Base-X.
However, currently, it is always enabled, so add support for configuring
it to make these SFP modules and PHYs work.
This also adds locking which should be useful for future extension of
the PCS driver.
realtek: evaluate pcs-handle instead of sds property
In the Realtek dts the pcs-handle property at the switch port is the
successor of the sds property at the phy. Rearrange the MDIO and DSA
driver so they always look at the new attribute.
Remark! This code can be dropped completely if the new PCS driver
is fully featured. But this will take some time.
Felix Fietkau [Sun, 21 Sep 2025 13:39:35 +0000 (15:39 +0200)]
wpa_supplicant: add MLO client support
Can also be used for a client mode interface that is able to connect on
multiple bands individually, while handling hostapd state for the correct
band.
Felix Fietkau [Wed, 17 Sep 2025 19:31:51 +0000 (21:31 +0200)]
wifi-scripts: simplify MLO handling
Move mlo specific hostapd ubus call from wireless handler to netifd core
ucode script. This avoids unnecessary queueing and the fake MLO wireless
device.
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the supported device to A1 to make it clear this is the only
known compatible hardware revision.
realtek: rtl839x: rename GS1900 series v1/v2 to A1/B1
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
realtek: rtl838x: rename GS1900 series v1/v2 to A1/B1
Zyxel labels their switch revisions A1, B1, ... and not v1, v2, ...
Rename the devices as such in OpenWrt to match the labels. Of note:
the first (A1) revision is never labeled as such on the label, just
in the web UI. Provide compatibles for seamless sysupgrade.
For a recent overview of Zyxel GS1900 series revisions, see the
table linked in https://forum.openwrt.org/t//57875/3874.
This commit fixes stability issues on certain RAX3000Me devices. Some
devices has DDR3 RAM which don't able to work reliably at 2133 MHz
and require special BL2 (1866 MHz RAM freq).
Fixes warning:
/linux/arch/arm64/boot/dts/airoha/en7581-gemtek-w1700k.dtb: i2c1@1fbf8100 (mediatek,mt7621-i2c): status: 'oneOf' conditional failed, one must be fixed:
['disable'] is not of type 'object'
'disable' is not one of ['okay', 'disabled', 'reserved', 'fail', 'fail-needs-probe']
from schema $id: http://devicetree.org/schemas/dt-core.yaml#
Bjørn Mork [Fri, 27 Dec 2024 11:43:18 +0000 (12:43 +0100)]
build: parsing "git log" breaks with gpg signature verification
Parsing "git log" is fragile. The actual output depends on both global and
local configuration files. Enabling "log.showSignature" makes "git log" prefix
signed commits with multiple lines of gpg verify output, regardless of the
configured log format.
Add "--no-show-signature" to "git log" commands to work around this particular
issue.
For all switch ports where the assigned SerDes is known, add the new
pcs-handle to the dts. Leave the existing <sds> assignments to the
PHYs as is because the driver has not yet been updated.
Thomas Martitz [Thu, 18 Sep 2025 07:09:04 +0000 (09:09 +0200)]
realtek: add support for RTL8218E
ZyXEL XGS1250-12 Rev.B1 has RTL8218E compared to RTL8218D in Rev.A1
but both of them seem very similar and pin compatible. Therefore
they can share the same phy_driver callbacks.
PHY identifier is set based on the datasheet from
https://github.com/plappermaul/realtek-doc/blob/main/RTL8218E-CG_Datasheet.pdf
1. Set up a TFTP server with the IP address "192.168.11.2".
2. Rename the OpenWrt initramfs image to "linux.ubi-recovery" and place it
in the TFTP server's root directory.
3. While holding down the AOSS button, power on the WSR-6000AX8 (or AX8P).
4. The device will automatically download the initramfs image
from the TFTP server and boot into it.
5. Once booted, run "sysupgrade -n" using the OpenWrt sysupgrade image
to complete the installation.
Recovery
--------
1. Decrypt the official firmware image using "buffalo-enc".
Ari Kurniawan [Mon, 15 Sep 2025 13:13:29 +0000 (20:13 +0700)]
mediatek: filogic: add support for Totolink X6000R
Specification :
- SOC : Mediatek MT7981B (1.3GHz)
- RAM : 256MB
- Flash : 16MB SPI NOR
- Ports : 4 LAN (1G) & 1 WAN (1G)
- WIFI : MediaTek dual-band WiFi 6
- 2.4 GHz : b/g/n/ax, MIMO 2x2
- 5 GHz : a/n/ac/ax, MIMO 2x2
- Buttons : Reset & WPS/Mesh
- LEDS : WAN (Green), Status (Red & Blue)
- Power : 12V1A
Install via OEM web ui:
Upload the sysupgrade image to firmware upgrade page on OEM web ui
Install via recovery / revert to stock firmware:
1. Unplug from power
2. Download the Sysupgrade (for openwrt installation) or OEM Factory image (for revert to stock firmware)
3. Set your computer ethernet IP to 192.168.1.X, subnet 255.255.255.0 (X=your chosen ip number ranging from 2-254)
4. Press and hold reset button while turn on / plug power adapter to the router. Wait untill ALL LAN green LED turn on, then release the reset button.
5. Plug the LAN cable from your computer into LAN 1 port then open web browser, and type in the address column : 192.168.1.1
6. Upload the sysupgrade / oem factory image
7. Wait until the router finished flashing (the router will reboot)
8. Set ethernet ip to dhcp
9. Open 192.168.1.1 (for openwrt install) / 192.168.0.1 (for OEM firmware)
This commit add kernel module support for Infineon DPS310/DPS368/DPS422
digital barometric air pressure and temperature sensor.
Test on custom board based on Mediatek MT7988a.
This device is flashed OpenWRT base firmware with this target.
The LuCI webpage is integrated in default for upgrading.
Flash instruction through u-boot:
1. Prepare the TFTP server on PC.
2. Connect uart to PC, select "2. Upgrade firmware" in u-boot menu.
3. Select "0 - TFTP client (Default)", input client IP, server IP, IP netmask, flashed bin file path
4. Wait about 20 seconds to complete flashing
Until now the the SerDes configuration is realized with helper functions
scattered around the DSA and PHY driver. Give them a new home as a PCS
driver.
The target design is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (this commit)
- mdio driver manages SerDes on low level
This driver adds the high level SerDes access via PCS. It makes use of
the low level mdio SerDes driver to access the registers.
Remark: This initial version provides exactly all phylink_pcs_ops that
are currently part of the DSA driver. So this can be swapped in one of
the next commits as a drop in replacement. To make use of it something
like this is needed:
...
ports = of_get_child_by_name(node, "ethernet-ports");
if (!ports)
return -EINVAL;
realtek: DTS: add macro for switch port with SerDes
In the future the PCS & DSA drivers will lookup the SerDes of a
switch port via pcs-handle (like upstream does). Provide a macro
that allows to expand the existing port definitions. To link a
SerDes to port simply do
Either in short form:
replace SWITCH_PORT(0, 1, qsgmii)
with SWITCH_PORT_SDS(0, 1, 3, qsgmii) (Link to SerDes 3)
Coia Prant [Tue, 10 Dec 2024 15:18:13 +0000 (23:18 +0800)]
ramips: add support for Qding QC202
This is a smart door lock device equipped with OpenWrt 14.07 OEM
modified version Qdwrt
The OEM has closed down, This commit is intended to maximize the
remaining value of these devices. It can flash OpenWrt to become
an AP
Specification:
- SoC: MediaTek MT7628NN
- Flash: 8 MB
- RAM: 64 MB
- Power: DC 5V - 25V
- Ethernet: 1 x RJ45 (10/100 Mbps)
- Wireless radio: 802.11n 2.4g-only
- On-Board LED:
Status 1: GPIO/43 active-low
Status 2: GPIO/44 active-low
Power: AlwaysOn
- Button:
WPS / RESET: GPIO/14 active-low
- Bluetooth: CC2541 via UART1 (ttyS1) and GPIO/26-29
- RFID: MF RC522 on I2C@28
- RTC: DS1339 on I2C@68
- Shell (via CON1 cable)
- LED (Swipe card area):
- Green GPIO/3 active-high
- Red GPIO/11 active-high
- Matrix keypad: (active-low)
GPIO/20 GPIO/21 GPIO/19 (Rows)
GPIO/24 1 2 3
GPIO/25 4 5 6
GPIO/22 7 8 9
GPIO/23 BACK 0 ENTER
(Cols)
- UART: 1 x UART on PCB - 57600 8N1
- GPIO Relay: GPIO/42 active-high
- GPIO Buzzer: GPIO/15 active-high
Warning:
The original firmware does not use the device tree.
This device tree is written based on the content of /sys/devices/platform
and has been tested
Note:
- On the device, matrix keypad rows actually are columns, and the columns actually are rows
- The key code of the CLEAR key of the matrix keypad is BACK in the original firmware.
Issue:
- No drivers in mainline kernel for RFID and Bluetooth.
Flash Instruction:
Using SSH/Telnet:
1. Connect the board to the computer via RJ45 Ethernet
2. Login 10.10.10.1 with root password "szqdingnet123" (SSH Port 22, Telnet Port 9900)
3. Download openwrt firmware on the computer.
4. Setup a http server on computer. And use wget download openwrt firmware from computer
5. Use command "mtd -r write openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin firmware"
to flash
Using U-Boot WebUI:
1. Configure PC with a static IP address 10.10.10.2/24.
2. Open http://10.10.10.1
3. Use "mkqdimg -B qc202 -f openwrt-ramips-mt76x8-qding_qc202-squashfs-sysupgrade.bin" to
make image.
4. Upload factory.bin via U-Boot WebUI.
Original Firmware Dump / More details:
https://blog.gov.cooking/archives/research-qianding-smart-locker-and-flash.html
Original U-Boot firmware image tools:
https://gitlab.com/CoiaPrant/mkqdimg
This device is flashed OpenWRT base firmware with this target.
The LuCI webpage is integrated in default for upgrading.
Flash instruction through u-boot:
1. Prepare the TFTP server on PC.
2. Connect uart to PC, select "2. Upgrade firmware" in u-boot menu.
3. Select "0 - TFTP client (Default)", input client IP, server IP, flashed bin file path
4. Wait about 60 seconds to complete flashing
Obviously default address-cells size is fixed to 64 bit. Align
with upstream and override address size to 32 bit.
Suggested-by: Jonas Jelonek <jelonek.jonas@gmail.com> Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/20091 Signed-off-by: Robert Marko <robimarko@gmail.com>
Note: To use SPI interface on mPCIe slot, weld 4x 0402 0R resistors on [R832-835] or [R960-963]
mPCIe mapping:
45# - SPI_CLK
47# - SPI_MISO
49# - SPI_MOSI
51# - SPI_CSN
Flash instruction through LuCI:
This device is flashed OpenWRT base firmware with this target.
The LuCI webpage is integrated in default for upgrading.
Flash instruction through u-boot:
1. Prepare the TFTP server on PC.
2. Connect uart to PC, select "2. System Load Linux Kernel then write to Flash via TFTP." in u-boot menu.
3. input flashed bin file path, server IP, client IP
4. Wait about 20 seconds to complete flashing
Flashing via TFTP:
1. Connect your PC and router to the first LAN port, configure PC interface using IP 192.168.1.2, mask 255.255.255.0
2. Save the factory image of the OpenWRT firmware, renamed to KN-3711_recovery.bin, on the TFTP server
3. Hold the reset button and power up the device
4. Keep the button pressed until the status LED starts blinking
The EN751221 has an XHCI that is compatible with MT7621.
While there is setup logic in the vendor code for both
EN751221 and MT7621, but MT7621 does not use it in mainline
or OpenWRT, and it appears to work correctly with EN751221.
Include SCSI / Mass Storage because many EcoNet devices
contain a builtin USB SD-Card reader.
Signed-off-by: Caleb James DeLisle <cjd@cjdns.fr> Link: https://github.com/openwrt/openwrt/pull/20050
[Remove usb storage kmod from smartfiber_xp8421-b] Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
The baud rate control on Airoha does not function properly. This
patch enables the inactive code responsible for this. The UART2
baud rate is correct. HSUART3 operates at twice the requested
baud rate. The same problem exists in the current code, so this
doesn't introduce any regression. Support for baud rates higher
than 460800 is still required. This will be added in the future.
Tested on Gemtek W1700k. UART2 and HSUART3 are working fine.
John Audia [Thu, 11 Sep 2025 19:37:51 +0000 (15:37 -0400)]
x86: config: add CONFIG_MITIGATION_VMSCAPE=y
Introduced in the 6.12.47 update, set this new mitigation option to
be enabled. See: https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/diff/arch/x86/Kconfig?id=v6.12.47&id2=v6.12.46
realtek: mdio: register SerDes bus so it can be looked up
The upcoming PCS driver will lookup the SerDes mdio bus via
of_mdio_find_bus() and the devicetree. This is only possible
with proper registration via devm_of_mdiobus_register().
No need two write a dedicated 1:1 mapping function and link that
for all the targets except RTL931x. Combine everything into a generic
helper and reduce the configuration structure.
The new SerDes mdio driver produces the following compilation
error in non-debug builds.
drivers/net/mdio/mdio-realtek-otto-serdes.c:72:12:
error: 'rtsds_sds_to_mmd' defined but not used [-Werror=unused-function]
72 | static int rtsds_sds_to_mmd(int sds_page, int sds_regnum)
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
Move the function into the debug section.
Fixes: 7a7ee72c4d306e7 ("realtek: mdio: add SerDes driver") Signed-off-by: Markus Stockhausen <markus.stockhausen@gmx.de> Link: https://github.com/openwrt/openwrt/pull/20078 Signed-off-by: Robert Marko <robimarko@gmail.com>
New upstream release. Debian changelog:
* New upstream microcode datafile 20250812 (closes: #1110983, #1112168)
- Mitgations for INTEL-SA-01249 (processor Stream Cache):
CVE-2025-20109: Improper Isolation or Compartmentalization in the
stream cache mechanism for some Intel Processors may allow an
authenticated user to potentially enable escalation of privilege via
local access. Intel also disclosed that several processors models
had already received this mitigation on the previous microcode
release, 20250512.
- Mitigations for INTEL-SA-01308:
CVE-2025-22840: Sequence of processor instructions leads to
unexpected behavior for some Intel Xeon 6 Scalable processors may
allow an authenticated user to potentially enable escalation of
privilege via local access.
- Mitigations for INTEL-SA-01310 (OOBM services module):
CVE-2025-22839: Insufficient granularity of access control in the
OOB-MSM for some Intel Xeon 6 Scalable processors may allow a
privileged user to potentially enable escalation of privilege via
adjacent access.
- Mitigations for INTEL-SA-01311 (Intel TDX):
CVE-2025-22889: Improper handling of overlap between protected
memory ranges for some Intel Xeon 6 processors with Intel TDX may
allow a privileged user to potentially enable escalation of
privilege via local access.
- Mitigations for INTEL-SA-01313:
CVE-2025-20053: Improper buffer restrictions for some Intel Xeon
Processor firmware with SGX enabled may allow a privileged user to
potentially enable escalation of privilege via local access.
CVE-2025-21090: Missing reference to active allocated resource for
some Intel Xeon processors may allow an authenticated user to
potentially enable denial of service via local access.
CVE-2025-24305: Insufficient control flow management in the Alias
Checking Trusted Module (ACTM) firmware for some Intel Xeon
processors may allow a privileged user to potentially enable
escalation of privilege via local access.
- Mitigations for INTEL-SA-01367 (Intel SGX, TDX):
CVE-2025-26403: Out-of-bounds write in the memory subsystem for some
Intel Xeon 6 processors when using Intel SGX or Intel TDX may allow
a privileged user to potentially enable escalation of privilege via
local access.
CVE-2025-32086: Improperly implemented security check for standard
in the DDRIO configuration for some Intel Xeon 6 Processors when
using Intel SGX or Intel TDX may allow a privileged user to
potentially enable escalation of privilege via local access.
- Fixes for unspecified functional issues on several Intel Core and
Intel Xeon processor models.
* Updated microcodes:
sig 0x000606a6, pf_mask 0x87, 2025-03-11, rev 0xd000410, size 309248
sig 0x000606c1, pf_mask 0x10, 2025-03-06, rev 0x10002e0, size 301056
sig 0x000806f8, pf_mask 0x87, 2025-04-04, rev 0x2b000643, size 592896
sig 0x000806f7, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f6, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f5, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f4, pf_mask 0x87, 2025-04-04, rev 0x2b000643
sig 0x000806f8, pf_mask 0x10, 2025-04-08, rev 0x2c000401, size 625664
sig 0x000806f6, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000806f5, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000806f4, pf_mask 0x10, 2025-04-08, rev 0x2c000401
sig 0x000a06a4, pf_mask 0xe6, 2025-03-19, rev 0x0025, size 140288
sig 0x000a06d1, pf_mask 0x95, 2025-05-15, rev 0x10003d0, size 1667072
sig 0x000a06d1, pf_mask 0x20, 2025-05-15, rev 0xa000100, size 1638400
sig 0x000a06f3, pf_mask 0x01, 2025-05-03, rev 0x3000362, size 1530880
sig 0x000b06a2, pf_mask 0xe0, 2025-02-24, rev 0x4129, size 224256
sig 0x000b06a3, pf_mask 0xe0, 2025-02-24, rev 0x4129
sig 0x000b06a8, pf_mask 0xe0, 2025-02-24, rev 0x4129
sig 0x000b06d1, pf_mask 0x80, 2025-05-21, rev 0x0123, size 80896
sig 0x000c0662, pf_mask 0x82, 2025-05-14, rev 0x0119, size 90112
sig 0x000c06a2, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c0652, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c0664, pf_mask 0x82, 2025-05-14, rev 0x0119
sig 0x000c06f2, pf_mask 0x87, 2025-04-15, rev 0x210002b3, size 564224
sig 0x000c06f1, pf_mask 0x87, 2025-04-15, rev 0x210002b3
Roy H [Tue, 16 Sep 2025 03:25:36 +0000 (10:25 +0700)]
ath79: fix longdata-aps256 wan port to work in factory bootloader
In first commit I successfully bring WAN port into ethernet switch,
without realizing that I was using custom bootloader. But if using
original bootloader it do not works. WAN port in original bootloader
is tied to using its own GMAC.
This fix is made so this firmware will be compatible with orignal
bootloader, so the user can directly flash from stock firmware without
changing anything.
Until now the SerDes access is realized with some helper functions
in the mdio bus. These were moved around a lot and had no real home.
End that temporary solution to move them where they belong.
The target design for the different Realtek drivers is as follows:
- dsa driver manages switch
- pcs driver manages SerDes on high level (to be developed)
- mdio driver manages SerDes on low level (this commit)
This driver adds the low level SerDes access via mdio. For debugging
purposes the user can interact with the SerDes in different ways.
First, there is a debug interface in
/sys/kernel/debug/realtek_otto_serdes/serdes.X/registers.
With that a dump of all registers can be shown.
Second, one can read/write registers via the mmd functions of the
mdio command line tool. Important to know: The registers are accessed
on the vendor specific MDIO_MMD_VEND1 device address (=30). Additionally
the SerDes page and register are concatenated into the the mmd register.
Top 8 bits are SerDes page and bottom 8 bits are SerDEs register.
E.g.
Read register 0x02 on page 0x03 of SerDes 0
> mdio realtek-serdes-mdio mmd 0:30 raw 0x0302
Write register 0x12 on page 0x02 of SerDes 1
> mdio realtek-serdes-mdio mmd 1:30 raw 0x0212 0x2222
For now this driver is only defined in the devicetree and activated
in the kernel build. There is no current consumer but at least
the debugging interface is available. Cleanup of the currently used
SerDes functions will come later.
There is some open coding in the ethernet driver. Drop
that and use kernel helpers instead.
- Use napi_gro_receive() instead of local skb list
- Use skb_put_data() instead of skb_put() plus memcpy()
- Use netdev_alloc_skb_ip_align() instead of manual alignment
realtek: Increase verbosity in rtldsa_fib4_add()/rtldsa_fib4_del()
L3 routing in Realtek switches is some magic voodoo. Especially
the syslog messages are not helpful at all for error diagnosis. As
a first step refactor rtldsa_fib4_add() and rtldsa_fib4_del() to
get some idea what is going on. For this add a helper function
rtldsa_fib4_check() for basic sanity checks and logging.
Do not only increase verbosity but fix some coding as well.
- Drop leftover checks for subnet 192.168.100.x
- Better detection of broadcast routes
- clearer MAC/VLAN formatting
- sort variables descending
- rename 1 char variable "r" to "route"
- change log helpers from pr...() to dev_...()
Before:
[ 5.640463] rtl83xx_fib_event_work_do: FIB4 default rule failed
[ 5.647164] rtl83xx_fib_event_work_do: FIB4 default rule failed
[ 13.975386] rtl83xx_fib_event_work_do: FIB4 failed
[ 13.981456] rtl83xx_fib_event_work_do: FIB4 failed
[ 13.986906] rtl83xx_fib_event_work_do: FIB4 failed
[ 18.455777] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[ 18.470993] rtl83xx_fib4_del: no such gateway: 0.0.0.0
[ 18.476839] rtl83xx_fib4_del: no such gateway: 0.0.0.0
projects / thirdparty / openwrt.git / log
