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4 months agosched/core: Get this cpu once in ttwu_queue_cond()
Shrikanth Hegde [Mon, 23 Mar 2026 19:36:28 +0000 (01:06 +0530)] 
sched/core: Get this cpu once in ttwu_queue_cond()

Calling smp_processor_id() on:
 - In CONFIG_DEBUG_PREEMPT=y, if preemption/irq is disabled, then it does
   not print any warning.
 - In CONFIG_DEBUG_PREEMPT=n, it doesn't do anything apart from getting
   __smp_processor_id

So with both CONFIG_DEBUG_PREEMPT=y/n, in preemption disabled section
it is better to cache the value. It could save a few cycles. Though
tiny, repeated could add up to a small value.

ttwu_queue_cond is called with interrupt disabled. So preemption is
disabled. Hence cache the value once instead.

Signed-off-by: Shrikanth Hegde <sshegde@linux.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Mukesh Kumar Chaurasiya (IBM) <mkchauras@gmail.com>
Link: https://patch.msgid.link/20260323193630.640311-3-sshegde@linux.ibm.com
4 months agosched/fair: Get this cpu once in find_new_ilb()
Shrikanth Hegde [Mon, 23 Mar 2026 19:36:27 +0000 (01:06 +0530)] 
sched/fair: Get this cpu once in find_new_ilb()

Calling smp_processor_id() on:
 - In CONFIG_DEBUG_PREEMPT=y, if preemption/irq is disabled, then it does
   not print any warning.
 - In CONFIG_DEBUG_PREEMPT=n, it doesn't do anything apart from getting
   __smp_processor_id

So with both CONFIG_DEBUG_PREEMPT=y/n, in preemption disabled section
it is better to cache the value. It could save a few cycles. Though
tiny, repeated in loop could add up to a small value.

find_new_ilb is called in interrupt context. So preemption is disabled.
So Hoist the this_cpu out of loop

Signed-off-by: Shrikanth Hegde <sshegde@linux.ibm.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Reviewed-by: Mukesh Kumar Chaurasiya (IBM) <mkchauras@gmail.com>
Reviewed-by: K Prateek Nayak <kprateek.nayak@amd.com>
Link: https://patch.msgid.link/20260323193630.640311-2-sshegde@linux.ibm.com
4 months agosched/topology: Fix sched_domain_span()
Peter Zijlstra [Mon, 23 Mar 2026 09:36:27 +0000 (10:36 +0100)] 
sched/topology: Fix sched_domain_span()

Commit 8e8e23dea43e ("sched/topology: Compute sd_weight considering
cpuset partitions") ends up relying on the fact that structure
initialization should not touch the flexible array.

However, the official GCC specification for "Arrays of Length Zero"
[*] says:

  Although the size of a zero-length array is zero, an array member of
  this kind may increase the size of the enclosing type as a result of
  tail padding.

Additionally, structure initialization will zero tail padding. With
the end result that since offsetof(*type, member) < sizeof(*type),
array initialization will clobber the flex array.

Luckily, the way flexible array sizes are calculated is:

  sizeof(*type) + count * sizeof(*type->member)

This means we have the complete size of the flex array *outside* of
sizeof(*type), so use that instead of relying on the broken flex array
definition.

[*] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html

Fixes: 8e8e23dea43e ("sched/topology: Compute sd_weight considering cpuset partitions")
Reported-by: Nathan Chancellor <nathan@kernel.org>
Debugged-by: K Prateek Nayak <kprateek.nayak@amd.com>
Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Tested-by: Jon Hunter <jonathanh@nvidia.com>
Tested-by: Chen Yu <yu.c.chen@intel.com>
Tested-by: K Prateek Nayak <kprateek.nayak@amd.com>
Tested-by: Nathan Chancellor <nathan@kernel.org>
Link: https://patch.msgid.link/20260323093627.GY3738010@noisy.programming.kicks-ass.net
4 months agogpio: drop unneeded Kconfig dependencies on OF_GPIO
Bartosz Golaszewski [Mon, 16 Mar 2026 09:45:23 +0000 (10:45 +0100)] 
gpio: drop unneeded Kconfig dependencies on OF_GPIO

OF_GPIO is selected automatically on all OF systems. Any symbols it
controls also provide stubs so there's really no reason to select it
explicitly. Remove all Kconfig dependencies/selects for GPIO drivers.
For those that have no other dependencies: convert it to requiring
CONFIG_OF instead to avoid new symbols popping up in make config.

Link: https://patch.msgid.link/20260316-gpio-of-kconfig-v2-3-de2f4b00a0e4@oss.qualcomm.com
Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
4 months agoaccel/ivpu: Add disable clock relinquish workaround for NVL-A0
Karol Wachowski [Mon, 23 Mar 2026 09:50:29 +0000 (10:50 +0100)] 
accel/ivpu: Add disable clock relinquish workaround for NVL-A0

Turn on disable clock relinquish workaround for Nova Lake A0.
Without this workaround NPU may not power off correctly after
inference, leading to unexpected system behavior.

Fixes: 550f4dd2cedd ("accel/ivpu: Add support for Nova Lake's NPU")
Cc: <stable@vger.kernel.org> # v6.19+
Reviewed-by: Lizhi.hou <lizhi.hou@amd.com>
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Link: https://patch.msgid.link/20260323095029.64613-1-karol.wachowski@linux.intel.com
4 months agodrm/imagination: Implement handling of context reset notification
Alexandru Dadu [Mon, 23 Mar 2026 18:31:30 +0000 (20:31 +0200)] 
drm/imagination: Implement handling of context reset notification

The firmware will send the context reset notification message as
part of handling hardware recovery (HWR) events deecoding the message
and printing via drm_info(). This eliminates the "Unknown FWCCB command"
message that was previously printed.

Co-developed-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Link: https://patch.msgid.link/20260323-b4-firmware-context-reset-notification-handling-v3-3-1a66049a9a65@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
4 months agodrm/imagination: Switch reset_reason fields from enum to u32
Alexandru Dadu [Mon, 23 Mar 2026 18:31:29 +0000 (20:31 +0200)] 
drm/imagination: Switch reset_reason fields from enum to u32

Update the reset_reason fwif structure fields from enum to u32 to remove
any ambiguity from the interface (enum is not a fixed size thus is unfit
for the purpose of the data type).

Fixes: a26f067feac1f ("drm/imagination: Add FWIF headers")
Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Link: https://patch.msgid.link/20260323-b4-firmware-context-reset-notification-handling-v3-2-1a66049a9a65@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
4 months agodrm/imagination: Add missing rogue context reset reasons
Alexandru Dadu [Mon, 23 Mar 2026 18:31:28 +0000 (20:31 +0200)] 
drm/imagination: Add missing rogue context reset reasons

Update the context reset reason enum with the missing reset reasons in
the 6-11 value gap:
 - CDM Mission/safety checksum mismatch;
 - TRP checksum mismatch;
 - GPU ECC error (corrected, OK);
 - GPU ECC error (uncorrected, HWR);
 - FW ECC error (corrected, OK);
 - FW ECC error (uncorrected, ERR);

Co-developed-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Sarah Walker <sarah.walker@imgtec.com>
Signed-off-by: Alexandru Dadu <alexandru.dadu@imgtec.com>
Reviewed-by: Matt Coster <matt.coster@imgtec.com>
Link: https://patch.msgid.link/20260323-b4-firmware-context-reset-notification-handling-v3-1-1a66049a9a65@imgtec.com
Signed-off-by: Matt Coster <matt.coster@imgtec.com>
4 months agoiomap: fix lockdep complaint when reads fail
Darrick J. Wong [Mon, 23 Mar 2026 21:00:17 +0000 (14:00 -0700)] 
iomap: fix lockdep complaint when reads fail

Zorro Lang reported the following lockdep splat:

"While running fstests xfs/556 on kernel 7.0.0-rc4+ (HEAD=04a9f1766954),
a lockdep warning was triggered indicating an inconsistent lock state
for sb->s_type->i_lock_key.

"The deadlock might occur because iomap_read_end_io (called from a
hardware interrupt completion path) invokes fserror_report, which then
calls igrab.  igrab attempts to acquire the i_lock spinlock. However,
the i_lock is frequently acquired in process context with interrupts
enabled. If an interrupt occurs while a process holds the i_lock, and
that interrupt handler calls fserror_report, the system deadlocks.

"I hit this warning several times by running xfs/556 (mostly) or
generic/648 on xfs. More details refer to below console log."

along with this dmesg, for which I've cleaned up the stacktraces:

 run fstests xfs/556 at 2026-03-18 20:05:30
 XFS (sda3): Mounting V5 Filesystem 396e9164-c45a-4e05-be9d-b38c2c5c6477
 XFS (sda3): Ending clean mount
 XFS (sda3): Unmounting Filesystem 396e9164-c45a-4e05-be9d-b38c2c5c6477
 XFS (sda3): Mounting V5 Filesystem bf3f89c3-3c45-4650-a9c7-744f39c0191e
 XFS (sda3): Ending clean mount
 XFS (sda3): Unmounting Filesystem bf3f89c3-3c45-4650-a9c7-744f39c0191e
 XFS (dm-0): Mounting V5 Filesystem bf3f89c3-3c45-4650-a9c7-744f39c0191e
 XFS (dm-0): Ending clean mount
 device-mapper: table: 253:0: adding target device (start sect 209 len 1) caused an alignment inconsistency
 device-mapper: table: 253:0: adding target device (start sect 210 len 62914350) caused an alignment inconsistency
 buffer_io_error: 6 callbacks suppressed
 Buffer I/O error on dev dm-0, logical block 209, async page read
 Buffer I/O error on dev dm-0, logical block 209, async page read
 XFS (dm-0): Unmounting Filesystem bf3f89c3-3c45-4650-a9c7-744f39c0191e
 XFS (dm-0): Mounting V5 Filesystem bf3f89c3-3c45-4650-a9c7-744f39c0191e
 XFS (dm-0): Ending clean mount

 ================================
 WARNING: inconsistent lock state
 7.0.0-rc4+ #1 Tainted: G S      W
 --------------------------------
 inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage.
 od/2368602 [HC1[1]:SC0[0]:HE0:SE1] takes:
 ff1100069f2b4a98 (&sb->s_type->i_lock_key#31){?.+.}-{3:3}, at: igrab+0x28/0x1a0
 {HARDIRQ-ON-W} state was registered at:
   __lock_acquire+0x40d/0xbd0
   lock_acquire.part.0+0xbd/0x260
   _raw_spin_lock+0x37/0x80
   unlock_new_inode+0x66/0x2a0
   xfs_iget+0x67b/0x7b0 [xfs]
   xfs_mountfs+0xde4/0x1c80 [xfs]
   xfs_fs_fill_super+0xe86/0x17a0 [xfs]
   get_tree_bdev_flags+0x312/0x590
   vfs_get_tree+0x8d/0x2f0
   vfs_cmd_create+0xb2/0x240
   __do_sys_fsconfig+0x3d8/0x9a0
   do_syscall_64+0x13a/0x1520
   entry_SYSCALL_64_after_hwframe+0x76/0x7e
 irq event stamp: 3118
 hardirqs last  enabled at (3117): [<ffffffffb54e4ad8>] _raw_spin_unlock_irq+0x28/0x50
 hardirqs last disabled at (3118): [<ffffffffb54b84c9>] common_interrupt+0x19/0xe0
 softirqs last  enabled at (3040): [<ffffffffb290ca28>] handle_softirqs+0x6b8/0x950
 softirqs last disabled at (3023): [<ffffffffb290ce4d>] __irq_exit_rcu+0xfd/0x250

 other info that might help us debug this:
  Possible unsafe locking scenario:

        CPU0
        ----
   lock(&sb->s_type->i_lock_key#31);
   <Interrupt>
     lock(&sb->s_type->i_lock_key#31);

  *** DEADLOCK ***

 1 lock held by od/2368602:
  #0: ff1100069f2b4b58 (&sb->s_type->i_mutex_key#19){++++}-{4:4}, at: xfs_ilock+0x324/0x4b0 [xfs]

 stack backtrace:
 CPU: 15 UID: 0 PID: 2368602 Comm: od Kdump: loaded Tainted: G S      W           7.0.0-rc4+ #1 PREEMPT(full)
 Tainted: [S]=CPU_OUT_OF_SPEC, [W]=WARN
 Hardware name: Dell Inc. PowerEdge R660/0R5JJC, BIOS 2.1.5 03/14/2024
 Call Trace:
  <IRQ>
  dump_stack_lvl+0x6f/0xb0
  print_usage_bug.part.0+0x230/0x2c0
  mark_lock_irq+0x3ce/0x5b0
  mark_lock+0x1cb/0x3d0
  mark_usage+0x109/0x120
  __lock_acquire+0x40d/0xbd0
  lock_acquire.part.0+0xbd/0x260
  _raw_spin_lock+0x37/0x80
  igrab+0x28/0x1a0
  fserror_report+0x127/0x2d0
  iomap_finish_folio_read+0x13c/0x280
  iomap_read_end_io+0x10e/0x2c0
  clone_endio+0x37e/0x780 [dm_mod]
  blk_update_request+0x448/0xf00
  scsi_end_request+0x74/0x750
  scsi_io_completion+0xe9/0x7c0
  _scsih_io_done+0x6ba/0x1ca0 [mpt3sas]
  _base_process_reply_queue+0x249/0x15b0 [mpt3sas]
  _base_interrupt+0x95/0xe0 [mpt3sas]
  __handle_irq_event_percpu+0x1f0/0x780
  handle_irq_event+0xa9/0x1c0
  handle_edge_irq+0x2ef/0x8a0
  __common_interrupt+0xa0/0x170
  common_interrupt+0xb7/0xe0
  </IRQ>
  <TASK>
  asm_common_interrupt+0x26/0x40
 RIP: 0010:_raw_spin_unlock_irq+0x2e/0x50
 Code: 0f 1f 44 00 00 53 48 8b 74 24 08 48 89 fb 48 83 c7 18 e8 b5 73 5e fd 48 89 df e8 ed e2 5e fd e8 08 78 8f fd fb bf 01 00 00 00 <e8> 8d 56 4d fd 65 8b 05 46 d5 1d 03 85 c0 74 06 5b c3 cc cc cc cc
 RSP: 0018:ffa0000027d07538 EFLAGS: 00000206
 RAX: 0000000000000c2d RBX: ffffffffb6614bc8 RCX: 0000000000000080
 RDX: 0000000000000000 RSI: ffffffffb6306a01 RDI: 0000000000000001
 RBP: 0000000000000000 R08: 0000000000000001 R09: 0000000000000000
 R10: ffffffffb75efc67 R11: 0000000000000001 R12: ff1100015ada0000
 R13: 0000000000000083 R14: 0000000000000002 R15: ffffffffb6614c10
  folio_wait_bit_common+0x407/0x780
  filemap_update_page+0x8e7/0xbd0
  filemap_get_pages+0x904/0xc50
  filemap_read+0x320/0xc20
  xfs_file_buffered_read+0x2aa/0x380 [xfs]
  xfs_file_read_iter+0x263/0x4a0 [xfs]
  vfs_read+0x6cb/0xb70
  ksys_read+0xf9/0x1d0
  do_syscall_64+0x13a/0x1520

Zorro's diagnosis makes sense, so the solution is to kick the failed
read handling to a workqueue much like we added for writeback ioends in
commit 294f54f849d846 ("fserror: fix lockdep complaint when igrabbing
inode").

Cc: Zorro Lang <zlang@redhat.com>
Link: https://lore.kernel.org/linux-xfs/20260319194303.efw4wcu7c4idhthz@doltdoltdolt/
Fixes: a9d573ee88af98 ("iomap: report file I/O errors to the VFS")
Signed-off-by: "Darrick J. Wong" <djwong@kernel.org>
Link: https://patch.msgid.link/20260323210017.GL6223@frogsfrogsfrogs
Reviewed-by: Christoph Hellwig <hch@lst.de>
Signed-off-by: Christian Brauner <brauner@kernel.org>
4 months agodrm/i915/lt_phy: Replace crtc compute clock
Mika Kahola [Thu, 12 Mar 2026 08:06:57 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Replace crtc compute clock

The existing DPLL compute clock callback for the XE3PLPD platform
(`xe3plpd_crtc_compute_clock`) was specific to that platform. Replace it
with the more generic Haswell (`hsw_crtc_compute_clock`) implementation
so that the compute clock path does not rely on the XE3PLPD hook.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-25-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Enable dpll framework for xe3plpd
Mika Kahola [Thu, 12 Mar 2026 10:14:15 +0000 (10:14 +0000)] 
drm/i915/lt_phy: Enable dpll framework for xe3plpd

xe3plpd platform is supported by dpll framework remove a separate
check for hw comparison and rely solely on dpll framework
hw comparison.

Finally, all required hooks are now in place so initialize
PLL manager for xe3plpd platform and remove the redirections
to the legacy code paths for clock enable/disable as well as
state mismatch checks that are no longer needed.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312101415.2669387-1-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Remove LT PHY specific state verification
Mika Kahola [Thu, 12 Mar 2026 08:06:55 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Remove LT PHY specific state verification

Remove LT PHY specific state verification as DPLL framework
has state verification check.

v2: Reuse intel_lt_phy_pll_compare_hw_state() as only config[0]
    and config[0] parameters are reliable with LT PHY (Suraj)
v3: Rephrase handling of LT PHY case when verifying the state (CI)
v4: Fix checkpatch warning of line length exceeding 100 columns

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-23-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks
Mika Kahola [Thu, 12 Mar 2026 08:06:54 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd Thunderbolt PLL hooks

Add the PLL hooks for the TBT PLL on xe3plpd. These are simple stubs
similar to the TBT PLL on earlier platforms, since this PLL is always
on from the display POV - so no PLL enable/disable programming is
required as opposed to the non-TBT PLLs - and the clocks for different
link rates are enabled/disabled at a different level, via the
intel_encoder::enable_clock()/disable_clock() interface.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-22-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Get encoder configuration for xe3plpd platform
Mika Kahola [Thu, 12 Mar 2026 08:06:53 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Get encoder configuration for xe3plpd platform

Reuse mtl_ddi_*_get_config functions now that all hooks are in place.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-21-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Readout lane count
Mika Kahola [Thu, 12 Mar 2026 08:06:52 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Readout lane count

Readout lane count back from HW. Reuse existing function
for Cx0 for LT PHY case with minor modification to add
lanes as function parameters.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-20-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Dump lane count for HW state
Mika Kahola [Thu, 12 Mar 2026 08:06:51 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Dump lane count for HW state

To increase debuggability add lane count as part of HW state dump.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-19-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add .disable_clock hook on DDI
Mika Kahola [Thu, 12 Mar 2026 08:06:50 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add .disable_clock hook on DDI

Add new pll_disable_clock functions so that they can be
hooked up to dpll->disable. This is just a wrapper over
the exitisting intel_xe3plpd_pll_disable to make it
compatible With dpll->disable function

v2: Revise commit message (Suraj)
    Drop wrapper for TBT clock disabling and reuse
    intel_mtl_pll_disable_clock() for DDI clock
    disabling hook (Suraj)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-18-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add .enable_clock hook on DDI
Mika Kahola [Thu, 12 Mar 2026 08:06:49 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add .enable_clock hook on DDI

Enable PLL clock on DDI by moving part of the PLL enabling
sequence into a DDI clock enabling function.

v2: Reuse intel_mtl_pll_enable_clock for DDI clock enabling

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-17-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .crtc_get_dpll
Mika Kahola [Thu, 12 Mar 2026 08:06:48 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .crtc_get_dpll

Add .crtc_get_dpll function pointer to support xe3plpd
platform.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-16-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .get_freq hook
Mika Kahola [Thu, 12 Mar 2026 08:06:47 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .get_freq hook

Add .get_freq function hook to support dpll framework for xe3plpd platform.

v2: Restore port clock calculation (Suraj)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-15-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .get_hw_state hook
Mika Kahola [Thu, 12 Mar 2026 08:06:46 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .get_hw_state hook

Add .get_hw_state hook to xe3plpd platform for dpll framework
and update intel_lt_phy_pll_readout_hw_state() function
accordingly to support dpll framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-14-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .compare_hw_state hook
Mika Kahola [Thu, 12 Mar 2026 08:06:45 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .compare_hw_state hook

Add .compare_hw_state function pointer for xe3plpd platform
to support dpll framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-13-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .dump_hw_state hook
Mika Kahola [Thu, 12 Mar 2026 08:06:44 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .dump_hw_state hook

Add .dump_hw_state function pointer for xe3plpd platform
to support dpll framework. While at it, switch to use
drm_printer structure to print hw state information.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-12-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .update_dpll_ref_clks hook
Mika Kahola [Thu, 12 Mar 2026 08:06:43 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .update_dpll_ref_clks hook

Add .update_dpll_ref_clks function pointer to xe3plpd
platform to support dpll framework. Reuse ICL
function pointer.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-11-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .update_active_dpll hook
Mika Kahola [Thu, 12 Mar 2026 08:06:42 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .update_active_dpll hook

Add .update_active_dpll function pointer to support
dpll framework for xe3plpd platform. Reuse ICL function
pointer.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-10-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .put_dplls hook
Mika Kahola [Thu, 12 Mar 2026 08:06:41 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .put_dplls hook

Add .put_dplls function pointer to support xe3plpd platform
on dpll framework. Reuse ICL function pointer.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-9-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .get_dplls hook
Mika Kahola [Thu, 12 Mar 2026 08:06:40 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .get_dplls hook

Add .get_dplls function pointer for xe3plpd platforms
to support dpll framework. Reuse the ICL function
pointer.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-8-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add xe3plpd .compute_dplls hook
Mika Kahola [Thu, 12 Mar 2026 08:06:39 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add xe3plpd .compute_dplls hook

Add compute dpll hook for xe3plpd platform and bring
PLL state calculation to support PLL framework.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-7-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add lane_count to PLL state
Mika Kahola [Thu, 12 Mar 2026 08:06:38 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add lane_count to PLL state

Cache lane count as part of PLL state.

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-6-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL state
Mika Kahola [Thu, 12 Mar 2026 08:06:37 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Refactor LT PHY PLL handling to use explicit PLL state

The LT PHY implementation currently pulls PLL and port_clock
information directly from the CRTC state. This ties the PHY
programming logic too tightly to the CRTC state and makes it
harder to clearly express the PHY’s own PLL configuration.

Introduce an explicit "struct intel_lt_phy_pll_state" argument
for the PHY functions and update callers accordingly.

No functional change is intended — this is a preparatory cleanup for
to bring LT PHY PLL handling as part of PLL framework.

v2:  DP, HDMI 2.0, and HDMI FRL modes are port of the VDR configuration 0
    register. These modes are defined by bits 2:0. Decode these to
    differentiate DP and HDMI modes when programming PLL's. (Imre, Suraj)
v3: Pass port_clock as argument instead of recalculating it (Suraj)
v4: Fix checkpatch warning of line length exceeding 100 columns

BSpec: 744921
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-5-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add PLL information for xe3plpd
Mika Kahola [Thu, 12 Mar 2026 08:06:36 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add PLL information for xe3plpd

Start bringing in xe3plpd as part of dpll framework. The work is
started by adding PLL information and related function hooks.

v2: Fix xe3plpd type (Suraj)
    Remove empty line between BSpec link and Signed-off-by (Suraj)

BSpec: 74304
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-4-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Add check if PLL is enabled
Mika Kahola [Thu, 12 Mar 2026 08:06:35 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Add check if PLL is enabled

Add check for PLL enabling and return early if
PLL is not enabled.

v2: Use PCLK PLL ACK bit to check if PLL is enabled (Suraj)
v3: Check only if PCLK PLL ACK bit for lane 0 is enabled (Suraj)

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-3-mika.kahola@intel.com
4 months agodrm/i915/lt_phy: Dump missing PLL state parameters
Mika Kahola [Thu, 12 Mar 2026 08:06:34 +0000 (08:06 +0000)] 
drm/i915/lt_phy: Dump missing PLL state parameters

Dump missing PLL structure members ssc_enabled and tbt_mode
in order to enhance debugging.

v2: Drop addr_lsb and addr_msb printouts

Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com>
Link: https://patch.msgid.link/20260312080657.2648265-2-mika.kahola@intel.com
4 months agoarm64: dts: cix: add FCH(S0)/S5 GPIO controllers for sky1
Zichar Zhang [Thu, 12 Mar 2026 08:08:26 +0000 (16:08 +0800)] 
arm64: dts: cix: add FCH(S0)/S5 GPIO controllers for sky1

Add Cadence GPIO controller nodes for Sky1 FCH(S0) and S5 domains in
sky1.dtsi, and enable those controllers on sky1-orion-o6.

Signed-off-by: Zichar Zhang <zichar.zhang@cixtech.com>
Link: https://lore.kernel.org/r/20260312080826.3470205-2-zichar.zhang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
4 months agoarm64: dts: cix: Add scmi powerdomain nodes for sky1
Gary Yang [Fri, 13 Mar 2026 11:49:14 +0000 (19:49 +0800)] 
arm64: dts: cix: Add scmi powerdomain nodes for sky1

Add a second SCMI channel using SMC transport to communicate with TF-A
for power domain management on the Sky1 SoC.

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Link: https://lore.kernel.org/r/20260313114914.1564115-3-gary.yang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
4 months agoPCI: sky1: Fix missing cleanup of ECAM config on probe failure
Felix Gu [Mon, 23 Mar 2026 16:41:28 +0000 (00:41 +0800)] 
PCI: sky1: Fix missing cleanup of ECAM config on probe failure

When devm_kzalloc() for reg_off fails, the code returns -ENOMEM without
freeing pcie->cfg, which was allocated earlier by pci_ecam_create().

Add the missing pci_ecam_free() call to properly release the allocated ECAM
configuration window on this error path.

Fixes: a0d9f2c08f45 ("PCI: sky1: Add PCIe host support for CIX Sky1")
Signed-off-by: Felix Gu <ustc.gu@gmail.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Hans Zhang <18255117159@163.com>
Link: https://patch.msgid.link/20260324-sky1-v1-1-6a00cb2776b6@gmail.com
4 months agodt-bindings: PCI: cix,sky1-pcie-host: Add power-domains
Gary Yang [Fri, 13 Mar 2026 11:49:13 +0000 (19:49 +0800)] 
dt-bindings: PCI: cix,sky1-pcie-host: Add power-domains

The Sky1 PCIe controller resides in a dedicated power domain managed
via SCMI. Add the power-domains property to the binding to allow
describing this dependency.

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Signed-off-by: Manivannan Sadhasivam <mani@kernel.org>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://patch.msgid.link/20260313114914.1564115-2-gary.yang@cixtech.com
4 months agoarm64: dts: cix: add support for cix sky1 resets
Gary Yang [Mon, 2 Mar 2026 06:44:07 +0000 (14:44 +0800)] 
arm64: dts: cix: add support for cix sky1 resets

There are two reset conctrollers on Cix Sky1 Soc. One is located in S0
domain, and the other is located in S5 domain.

Signed-off-by: Gary Yang <gary.yang@cixtech.com>
Link: https://lore.kernel.org/r/20260302064407.1914014-4-gary.yang@cixtech.com
Signed-off-by: Peter Chen <peter.chen@cixtech.com>
4 months agoriscv: dts: spacemit: drop incorrect pinctrl for combo PHY
Aurelien Jarno [Sun, 22 Mar 2026 20:25:01 +0000 (21:25 +0100)] 
riscv: dts: spacemit: drop incorrect pinctrl for combo PHY

The combo PHY on the Banana Pi F3 is used for the USB 3.0 port. The high
speed differential lanes are always configured as such, and do not
require a pinctrl entry.

The existing pinctrl entry only configures PCIe secondary pins, which
are unused for USB and instead routed to the MIPI CSI1 connector.

Remove this incorrect pinctrl entry.

Fixes: 0be016a4b5d1b9 ("riscv: dts: spacemit: PCIe and PHY-related updates")
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://lore.kernel.org/r/20260322202502.2205755-1-aurelien@aurel32.net
Signed-off-by: Yixun Lan <dlan@kernel.org>
4 months agogpu: nova-core: gsp: move Cmdq's DMA handle to a struct member
Alexandre Courbot [Thu, 19 Mar 2026 06:00:40 +0000 (15:00 +0900)] 
gpu: nova-core: gsp: move Cmdq's DMA handle to a struct member

The command-queue structure has a `dma_handle` method that returns the
DMA handle to the memory segment shared with the GSP. This works, but is
not ideal for the following reasons:

- That method is effectively only ever called once, and is technically
  an accessor method since the handle doesn't change over time,
- It feels a bit out-of-place with the other methods of `Cmdq` which
  only deal with the sending or receiving of messages,
- The method has `pub(crate)` visibility, allowing other driver code to
  access this highly-sensitive handle.

Address all these issues by turning `dma_handle` into a struct member
with `pub(super)` visibility. This keeps the method space focused, and
also ensures the member is not visible outside of the modules that need
it.

Reviewed-by: Eliot Courtney <ecourtney@nvidia.com>
Reviewed-by: Danilo Krummrich <dakr@kernel.org>
Link: https://patch.msgid.link/20260319-b4-cmdq-dma-handle-v1-1-57840b4a4f90@nvidia.com
Signed-off-by: Alexandre Courbot <acourbot@nvidia.com>
4 months agoclk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()
Shuwei Wu [Thu, 5 Mar 2026 12:46:08 +0000 (20:46 +0800)] 
clk: spacemit: ccu_mix: fix inverted condition in ccu_mix_trigger_fc()

Fix inverted condition that skips frequency change trigger,
causing kernel panics during cpufreq scaling.

Fixes: 1b72c59db0ad ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Signed-off-by: Shuwei Wu <shuwei.wu@mailbox.org>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://lore.kernel.org/r/20260305-k1-clk-fix-v1-1-abca85d6e266@mailbox.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
4 months agoriscv: dts: spacemit: reorder phy nodes for K1
Chukun Pan [Wed, 18 Mar 2026 10:00:00 +0000 (18:00 +0800)] 
riscv: dts: spacemit: reorder phy nodes for K1

Reorder the PHY nodes of USB and PCIe to the correct positions based on
the register address. This improves the readability and maintainability
of the DT. No functional change is introduced by this reordering.

Signed-off-by: Chukun Pan <amadeus@jmu.edu.cn>
Reviewed-by: Yixun Lan <dlan@kernel.org>
Link: https://lore.kernel.org/r/20260318100000.3934516-1-amadeus@jmu.edu.cn
Signed-off-by: Yixun Lan <dlan@kernel.org>
4 months agodrm/i915/dp_tunnel: Fix error handling when clearing stream BW in atomic state
Imre Deak [Fri, 20 Mar 2026 09:29:00 +0000 (11:29 +0200)] 
drm/i915/dp_tunnel: Fix error handling when clearing stream BW in atomic state

Clearing the DP tunnel stream BW in the atomic state involves getting
the tunnel group state, which can fail. Handle the error accordingly.

This fixes at least one issue where drm_dp_tunnel_atomic_set_stream_bw()
failed to get the tunnel group state returning -EDEADLK, which wasn't
handled. This lead to the ctx->contended warn later in modeset_lock()
while taking a WW mutex for another object in the same atomic state, and
thus within the same already contended WW context.

Moving intel_crtc_state_alloc() later would avoid freeing saved_state on
the error path; this stable patch leaves that simplification for a
follow-up.

Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Cc: <stable@vger.kernel.org> # v6.9+
Fixes: a4efae87ecb2 ("drm/i915/dp: Compute DP tunnel BW during encoder state computation")
Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/7617
Reviewed-by: Michał Grzelak <michal.grzelak@intel.com>
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patch.msgid.link/20260320092900.13210-1-imre.deak@intel.com
(cherry picked from commit fb69d0076e687421188bc8103ab0e8e5825b1df1)
Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
4 months agodrm/xe: Send 'none' recovery method for XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET
Raag Jadav [Thu, 5 Mar 2026 13:06:49 +0000 (18:36 +0530)] 
drm/xe: Send 'none' recovery method for XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET

XE_WEDGED_MODE_UPON_ANY_HANG_NO_RESET is intended for debugging hangs,
so wedge the device with 'none' recovery method and have it available
to the user for debugging.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260305130720.3685754-4-raag.jadav@intel.com
4 months agodrm: Update log for 'none' recovery method
Raag Jadav [Thu, 5 Mar 2026 13:06:48 +0000 (18:36 +0530)] 
drm: Update log for 'none' recovery method

Update log for 'none' recovery method for wedged event where driver wants
to hint "no recovery" without resetting the device from driver context.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260305130720.3685754-3-raag.jadav@intel.com
4 months agodrm/doc: Update documentation for 'none' recovery method
Raag Jadav [Thu, 5 Mar 2026 13:06:47 +0000 (18:36 +0530)] 
drm/doc: Update documentation for 'none' recovery method

Expand 'none' recovery method for wedged event to include debug cases
where driver wants to hint "no recovery" without resetting the device
from driver context.

Signed-off-by: Raag Jadav <raag.jadav@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Link: https://patch.msgid.link/20260305130720.3685754-2-raag.jadav@intel.com
4 months agoMerge tag 'xsa482-7.0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip
Linus Torvalds [Tue, 24 Mar 2026 04:30:14 +0000 (21:30 -0700)] 
Merge tag 'xsa482-7.0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip

Pull xen fixes from Juergen Gross:
 "Restrict the xen privcmd driver in unprivileged domU to only allow
  hypercalls to target domain when using secure boot"

* tag 'xsa482-7.0-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip:
  xen/privcmd: add boot control for restricted usage in domU
  xen/privcmd: restrict usage in unprivileged domU

4 months agodt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface
Abel Vesa [Wed, 11 Mar 2026 08:43:02 +0000 (10:43 +0200)] 
dt-bindings: firmware: qcom,scm: document Eliza SCM Firmware Interface

Document the SCM Firmware Interface on the Eliza SoC.

Signed-off-by: Abel Vesa <abel.vesa@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260311-eliza-bindings-scm-v2-1-b2d2e69068e3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoarm64: dts: qcom: agatti: Fix IOMMU DT properties
Sumit Garg [Thu, 22 Jan 2026 12:10:42 +0000 (17:40 +0530)] 
arm64: dts: qcom: agatti: Fix IOMMU DT properties

Fix IOMMU DT propeties for GPU, display and video peripherals via
dropping SMMU stream IDs which relates to secure context bank.

This problem only surfaced when the Gunyah based firmware stack is
ported on Agatti replacing the legacy QHEE based firmware stack. Assigning
Linux kernel (HLOS) VMID to secure context bank stream IDs is treated
as a fault by Gunyah hypervisor which were previously ignored by QHEE
hypervisor.

The DT changes should be backwards compatible with legacy QHEE based
firmware stack too.

Suggested-by: Prakash Gupta <guptap@qti.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Akhil P Oommen <akhilpo@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260122121042.579270-4-sumit.garg@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agodt-bindings: media: venus: Fix iommus property
Sumit Garg [Thu, 22 Jan 2026 12:10:41 +0000 (17:40 +0530)] 
dt-bindings: media: venus: Fix iommus property

Fix IOMMU DT propety for venus via dropping SMMU stream IDs which
relates to secure context bank. Assigning Linux kernel (HLOS) VMID
to secure context bank stream IDs is incorrect. The maximum value
for iommus property is updated accordingly.

These DT bindings changes should be backwards compatible.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260122121042.579270-3-sumit.garg@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agodt-bindings: display: msm: qcm2290-mdss: Fix iommus property
Sumit Garg [Thu, 22 Jan 2026 12:10:40 +0000 (17:40 +0530)] 
dt-bindings: display: msm: qcm2290-mdss: Fix iommus property

Fix IOMMU DT propety for display via dropping SMMU stream IDs which
relates to secure context bank. Assigning Linux kernel (HLOS) VMID
to secure context bank stream IDs is incorrect. The maximum value
for iommus property is updated accordingly.

These DT bindings changes should be backwards compatible.

Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20260122121042.579270-2-sumit.garg@kernel.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoclk: qcom: dispcc-sc7180: Add missing MDSS resets
Konrad Dybcio [Tue, 20 Jan 2026 11:19:26 +0000 (12:19 +0100)] 
clk: qcom: dispcc-sc7180: Add missing MDSS resets

The MDSS resets have so far been left undescribed. Fix that.

Fixes: dd3d06622138 ("clk: qcom: Add display clock controller driver for SC7180")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Tested-by: Val Packett <val@packett.cool> # sc7180-ecs-liva-qc710
Link: https://lore.kernel.org/r/20260120-topic-7180_dispcc_bcr-v1-2-0b1b442156c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoMerge branch '20260120-topic-7180_dispcc_bcr-v1-1-0b1b442156c3@oss.qualcomm.com'...
Bjorn Andersson [Tue, 24 Mar 2026 03:16:44 +0000 (22:16 -0500)] 
Merge branch '20260120-topic-7180_dispcc_bcr-v1-1-0b1b442156c3@oss.qualcomm.com' into clk-for-7.1

Merge the addition of reset constants to the SC7180 display clock
controller through a topic branch, in order to make them available to
the DeviceTree branch as well.

4 months agodt-bindings: clock: qcom,dispcc-sc7180: Define MDSS resets
Konrad Dybcio [Tue, 20 Jan 2026 11:19:25 +0000 (12:19 +0100)] 
dt-bindings: clock: qcom,dispcc-sc7180: Define MDSS resets

The MDSS resets have so far been left undescribed. Fix that.

Fixes: 75616da71291 ("dt-bindings: clock: Introduce QCOM sc7180 display clock bindings")
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Tested-by: Val Packett <val@packett.cool> # sc7180-ecs-liva-qc710
Link: https://lore.kernel.org/r/20260120-topic-7180_dispcc_bcr-v1-1-0b1b442156c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoarm64: dts: allwinner: sun55i: Fix r-spi DMA
Chen-Yu Tsai [Mon, 23 Mar 2026 17:19:26 +0000 (01:19 +0800)] 
arm64: dts: allwinner: sun55i: Fix r-spi DMA

r-spi has DRQs for both the main and MCU DMA controllers on the A523 SoC
family, however it seems it that it is mainly routed to the MCU DMA
controller, with no obvious way to change it.

Change the DMA channels of r-spi to the MCU so that it works properly.

Fixes: 1bec3bd1f839 ("arm64: dts: allwinner: sun55i: Add SPI controllers")
Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Link: https://patch.msgid.link/20260323171927.1256507-1-wens@kernel.org
Signed-off-by: Chen-Yu Tsai <wens@kernel.org>
4 months agoselftests: net: io_uring_zerocopy: enable io_uring for the test
Aleksei Oladko [Sat, 21 Mar 2026 21:59:08 +0000 (21:59 +0000)] 
selftests: net: io_uring_zerocopy: enable io_uring for the test

The io_uring_zerocopy.sh kselftest assumes that io_uring support is
enabled on the host system. When io_uring is disabled via the
kernel.io_uring_disabled sysctl, the test fails.

Explicitly enable io_uring for the test by setting
kernel.io_uring_disabled=0.

Save the original value of kernel.io_uring_disabled before changing
it and restore it in cleanup handler to ensure the system state is
restored regardless of test outcome.

Signed-off-by: Aleksei Oladko <aleksey.oladko@virtuozzo.com>
Signed-off-by: Konstantin Khorenko <khorenko@virtuozzo.com>
Link: https://patch.msgid.link/20260321215908.175465-5-aleksey.oladko@virtuozzo.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoselftests: net: run reuseport in an isolated netns
Aleksei Oladko [Sat, 21 Mar 2026 21:59:05 +0000 (21:59 +0000)] 
selftests: net: run reuseport in an isolated netns

The reuseport_* tests (bpf, bpf_cpu, bpf_numa, dualstack) currently use
a fixed port range. This can cause intermittent test failures when the
ports are already in use by other services:

  failed to bind receive socket: Address already in use

To avoid conflicts, run these tests in separate network namespaces using
unshare. Each test now has its own isolated network stack, preventing
port collisions with the host services.

Signed-off-by: Aleksei Oladko <aleksey.oladko@virtuozzo.com>
Link: https://patch.msgid.link/20260321215908.175465-2-aleksey.oladko@virtuozzo.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoarm64: defconfig: enable pci-pwrctrl-generic as module
Neil Armstrong [Thu, 19 Mar 2026 08:55:07 +0000 (09:55 +0100)] 
arm64: defconfig: enable pci-pwrctrl-generic as module

Enable the generic power control driver module since it's required
to power up the PCIe USB3 controller found on the Ayaneo Pocket S2
gaming console.

Acked-by: Manivannan Sadhasivam <mani@kernel.org>
Reviewed-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20260319-topic-sm8650-ayaneo-pocket-s2-base-v6-1-797bf96df771@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoMerge branch 'selftests-rds-add-config-file-and-config-sh-c-option'
Jakub Kicinski [Tue, 24 Mar 2026 02:39:07 +0000 (19:39 -0700)] 
Merge branch 'selftests-rds-add-config-file-and-config-sh-c-option'

Allison Henderson says:

====================
selftests: rds: add config file and config.sh -c option

This series adds an RDS-specific config file for ksft CI and extends
config.sh with a -c flag to specify an alternate config file path.
Users can now specify the path of the config they want to update, or
default to .config if none is specified.
====================

Link: https://patch.msgid.link/20260320041834.2761069-1-achender@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoselftests: rds: Add -c config option to rds/config.sh
Allison Henderson [Fri, 20 Mar 2026 04:18:34 +0000 (21:18 -0700)] 
selftests: rds: Add -c config option to rds/config.sh

This patch adds a new -c flag to config.sh that enables callers
to specify the file path of the config they would like to update.
If no config is specified, the default will be the .config of the
current directory.

Signed-off-by: Allison Henderson <achender@kernel.org>
Link: https://patch.msgid.link/20260320041834.2761069-3-achender@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoselftests: rds: add tools/testing/selftests/net/rds/config
Allison Henderson [Fri, 20 Mar 2026 04:18:33 +0000 (21:18 -0700)] 
selftests: rds: add tools/testing/selftests/net/rds/config

The ksft CI runtime needs an rds specific config file to build a
minimal kernel with the right options enabled.  This patch adds
an rds selftest config containing the required CONFIG_RDS* and
CONFIG_NET_* options.

Signed-off-by: Allison Henderson <achender@kernel.org>
Link: https://patch.msgid.link/20260320041834.2761069-2-achender@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoselftests: bonding: add test for stacked bond header_parse recursion
Jiayuan Chen [Fri, 20 Mar 2026 02:22:39 +0000 (10:22 +0800)] 
selftests: bonding: add test for stacked bond header_parse recursion

Add a selftest to reproduce the infinite recursion in bond_header_parse()
when bonds are stacked (bond1 -> bond0 -> gre). When a packet is received
via AF_PACKET SOCK_DGRAM on the topmost bond, dev_parse_header() calls
bond_header_parse() which used skb->dev (always the topmost bond) to get
the bonding struct. This caused it to recurse back into itself
indefinitely, leading to stack overflow.

Before commit b7405dcf7385 ("bonding: prevent potential infinite loop
in bond_header_parse()"), the test triggers:

  ./bond_stacked_header_parse.sh

  [  71.999481] BUG: MAX_LOCK_DEPTH too low!
  [  72.000170] turning off the locking correctness validator.
  [  72.001029] Please attach the output of /proc/lock_stat to the bug report
  [  72.002079] depth: 48  max: 48!
  ...

After the fix, everything works fine:

  ./bond_stacked_header_parse.sh
  TEST: Stacked bond header_parse does not recurse                  [ OK ]

Signed-off-by: Jiayuan Chen <jiayuan.chen@shopee.com>
Link: https://patch.msgid.link/20260320022245.392384-1-jiayuan.chen@linux.dev
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agosoc: qcom: ocmem: return -EPROBE_DEFER is ocmem is not available
Dmitry Baryshkov [Mon, 23 Mar 2026 01:20:59 +0000 (03:20 +0200)] 
soc: qcom: ocmem: return -EPROBE_DEFER is ocmem is not available

If OCMEM is declared in DT, it is expected that it is present and
handled by the driver. The GPU driver will ignore -ENODEV error, which
typically means that OCMEM isn't defined in DT. Let ocmem return
-EPROBE_DEFER if it supposed to be used, but it is not probed (yet).

Fixes: 88c1e9404f1d ("soc: qcom: add OCMEM driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-ocmem-v1-3-ad9bcae44763@oss.qualcomm.com
[bjorn: s/ERR_PTR(dev_err_probe)/dev_err_ptr_probe/
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agosoc: qcom: ocmem: register reasons for probe deferrals
Dmitry Baryshkov [Mon, 23 Mar 2026 01:20:58 +0000 (03:20 +0200)] 
soc: qcom: ocmem: register reasons for probe deferrals

Instead of printing messages to the dmesg, let the message be recorded
as a reason for the OCMEM client deferral.

Fixes: 88c1e9404f1d ("soc: qcom: add OCMEM driver")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Brian Masney <bmasney@redhat.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-ocmem-v1-2-ad9bcae44763@oss.qualcomm.com
[bjorn: s/ERR_PTR(dev_err_probe)/dev_err_ptr_probe/
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agosoc: qcom: ocmem: make the core clock optional
Dmitry Baryshkov [Mon, 23 Mar 2026 01:20:57 +0000 (03:20 +0200)] 
soc: qcom: ocmem: make the core clock optional

OCMEM's core clock (aka RPM bus 2 clock) is being handled internally by
the interconnect driver. Corresponding clock has been dropped from the
SMD RPM clock driver. The users of the ocmem will vote on the ocmemnoc
interconnect paths, making sure that ocmem is on. Make the clock
optional, keeping it for compatibility with older DT.

Fixes: d6edc31f3a68 ("clk: qcom: smd-rpm: Separate out interconnect bus clocks")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260323-ocmem-v1-1-ad9bcae44763@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoclk: qcom: rcg2: expand frac table for mdss_pixel_clk_src
Pengyu Luo [Sat, 21 Mar 2026 09:50:28 +0000 (17:50 +0800)] 
clk: qcom: rcg2: expand frac table for mdss_pixel_clk_src

Recently, when testing 10-bit dsi C-PHY panel, clks are different
from the usual. (dsi0_phy_pll_out_dsiclk's parent is dsi0_pll_bit_clk
now (dsiclk_sel = 0)) And we failed to set dsiclk's children.

dsi_link_clk_set_rate_6g: Set clk rates: pclk=172992000, byteclk=108120000

byteclk was set first to 108120000, so the vco rate was set to
108120000 * 7 * 1 * 1 = 756840000. When we was trying to set
172992000 on mdss_pixel_clk_src later.

Since there was no matched ratio, we failed to set it. And dsiclk
divider ratio was set to 15:1 (wrong cached register value 0xf and
didn't update), we finally got 50455997, apparently wrong.

  dsi0vco_clk                1       1        0        756839941
     dsi0_pll_out_div_clk    1       1        0        756839941
        dsi0_pll_post_out_div_clk 0       0        0        216239983
        dsi0_pll_bit_clk     2       2        0        756839941
           dsi0_phy_pll_out_dsiclk 2       2        0        50455997
              disp_cc_mdss_pclk1_clk_src 1       1        0        50455997
           dsi0_pll_by_2_bit_clk 0       0        0        378419970
           dsi0_phy_pll_out_byteclk 2       2        0        108119991
              disp_cc_mdss_byte1_clk_src 2       2        0        108119991

Downstream clk_summary shows the mdss_pixel_clk_src support the
ratio(35:16)

 dsi0_phy_pll_out_dsiclk             2       2        0        378420000
     disp_cc_mdss_pclk1_clk_src       1       1        0        172992000
 dsi0_phy_pll_out_byteclk            2       2        0        108120000
     disp_cc_mdss_byte1_clk_src       2       2        0        108120000

After checking downstream source, 15:4 also seems to be supported,
add them two.

Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Reviewed-by: Taniya Das <taniya.das@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260321095029.2259489-1-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
4 months agoselftests: forwarding: local_termination: fix PTP UDP cksums
Daniel Golle [Sat, 21 Mar 2026 04:26:11 +0000 (04:26 +0000)] 
selftests: forwarding: local_termination: fix PTP UDP cksums

All six PTP-over-IP test frames (3x IPv4 + 3x IPv6) contain incorrect
UDP checksums. The stored values are the ones-complement sums of just
the pseudo-headers, not the complete UDP checksums over pseudo-header +
UDP header + payload. This is characteristic of frames captured on the
sender before TX checksum offload completion.

For example, the IPv4 Sync and Follow-Up frames both store checksum
0xa3c8 despite having different UDP payloads and port numbers - 0xa3c8
is their shared pseudo-header sum (same src/dst IP, same protocol and
UDP length).

While most L2 switches forward frames without verifying transport
checksums, hardware that performs deep packet inspection or has PTP
awareness may validate UDP checksums and drop frames that fail
verification. This causes the 1588v2 over IPv4/IPv6 tests to fail on
such hardware even though L2 PTP (which has no UDP checksum) passes
fine.

Replace all six pseudo-header partial sums with the correctly computed
full UDP checksums:

  IPv4 Sync:           0xa3c8 -> 0x9f41
  IPv4 Follow-Up:      0xa3c8 -> 0xeb8a
  IPv4 Peer Delay Req: 0xa2bc -> 0x9ab9
  IPv6 Sync:           0x2e92 -> 0x1476
  IPv6 Follow-Up:      0x2e92 -> 0xf047
  IPv6 Peer Delay Req: 0xb454 -> 0x891f

Signed-off-by: Daniel Golle <daniel@makrotopia.org>
Reviewed-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Link: https://patch.msgid.link/651c3decb80023e4395ec149fd81110afa3869a1.1774067006.git.daniel@makrotopia.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: enetc: fix the output issue of 'ethtool --show-ring'
Wei Fang [Fri, 20 Mar 2026 09:42:22 +0000 (17:42 +0800)] 
net: enetc: fix the output issue of 'ethtool --show-ring'

Currently, enetc_get_ringparam() only provides rx_pending and tx_pending,
but 'ethtool --show-ring' no longer displays these fields. Because the
ringparam retrieval path has moved to the new netlink interface, where
rings_fill_reply() emits the *x_pending only if the *x_max_pending values
are non-zero. So rx_max_pending and tx_max_pending to are added to
enetc_get_ringparam() to fix the issue.

Note that the maximum tx/rx ring size of hardware is 64K, but we haven't
added set_ringparam() to make the ring size configurable. To avoid users
mistakenly believing that the ring size can be increased, so set
the *x_max_pending to priv->*x_bd_count.

Fixes: e4a1717b677c ("ethtool: provide ring sizes with RINGS_GET request")
Signed-off-by: Wei Fang <wei.fang@nxp.com>
Link: https://patch.msgid.link/20260320094222.706339-1-wei.fang@nxp.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoudp: Fix wildcard bind conflict check when using hash2
Martin KaFai Lau [Thu, 19 Mar 2026 18:18:17 +0000 (11:18 -0700)] 
udp: Fix wildcard bind conflict check when using hash2

When binding a udp_sock to a local address and port, UDP uses
two hashes (udptable->hash and udptable->hash2) for collision
detection. The current code switches to "hash2" when
hslot->count > 10.

"hash2" is keyed by local address and local port.
"hash" is keyed by local port only.

The issue can be shown in the following bind sequence (pseudo code):

bind(fd1,  "[fd00::1]:8888")
bind(fd2,  "[fd00::2]:8888")
bind(fd3,  "[fd00::3]:8888")
bind(fd4,  "[fd00::4]:8888")
bind(fd5,  "[fd00::5]:8888")
bind(fd6,  "[fd00::6]:8888")
bind(fd7,  "[fd00::7]:8888")
bind(fd8,  "[fd00::8]:8888")
bind(fd9,  "[fd00::9]:8888")
bind(fd10, "[fd00::10]:8888")

/* Correctly return -EADDRINUSE because "hash" is used
 * instead of "hash2". udp_lib_lport_inuse() detects the
 * conflict.
 */
bind(fail_fd, "[::]:8888")

/* After one more socket is bound to "[fd00::11]:8888",
 * hslot->count exceeds 10 and "hash2" is used instead.
 */
bind(fd11, "[fd00::11]:8888")
bind(fail_fd, "[::]:8888")      /* succeeds unexpectedly */

The same issue applies to the IPv4 wildcard address "0.0.0.0"
and the IPv4-mapped wildcard address "::ffff:0.0.0.0". For
example, if there are existing sockets bound to
"192.168.1.[1-11]:8888", then binding "0.0.0.0:8888" or
"[::ffff:0.0.0.0]:8888" can also miss the conflict when
hslot->count > 10.

TCP inet_csk_get_port() already has the correct check in
inet_use_bhash2_on_bind(). Rename it to
inet_use_hash2_on_bind() and move it to inet_hashtables.h
so udp.c can reuse it in this fix.

Fixes: 30fff9231fad ("udp: bind() optimisation")
Reported-by: Andrew Onyshchuk <oandrew@meta.com>
Signed-off-by: Martin KaFai Lau <martin.lau@kernel.org>
Reviewed-by: Kuniyuki Iwashima <kuniyu@google.com>
Link: https://patch.msgid.link/20260319181817.1901357-1-martin.lau@linux.dev
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoMerge branch 'ethtool-dynamic-rss-context-indirection-table-resizing'
Jakub Kicinski [Tue, 24 Mar 2026 00:59:58 +0000 (17:59 -0700)] 
Merge branch 'ethtool-dynamic-rss-context-indirection-table-resizing'

Björn Töpel says:

====================
ethtool: Dynamic RSS context indirection table resizing

Some NICs (e.g. bnxt) change their RSS indirection table size based on
the queue count, because the hardware table is a shared resource. The
ethtool core locks ctx->indir_size at context creation, so drivers
have to reject channel changes when RSS contexts exist.

This series adds resize helpers and wires them up in bnxt. It also
adds tracking of the user provided indirection table size to the
ethtool core.

Patch 1 tracks the user-provided indirection table size (user_size)
in ctx->indir_user_size for non-default RSS contexts and in
dev->ethtool->rss_indir_user_size for context 0. It is set when the
indirection table is configured via netlink or ioctl, and cleared to
zero on reset-to-default.

IFF_RXFH_CONFIGURED is removed, and replaced with rss_indir_user_size.
The flag is redundant now that user_size captures the same
information.

Patch 2 adds core resize helpers:
  ethtool_rxfh_indir_can_resize() - read-only validation for context 0
  ethtool_rxfh_indir_resize() - fold/unfold context 0 table in place
  ethtool_rxfh_ctxs_can_resize() - validate all non-default contexts
  ethtool_rxfh_ctxs_resize() - resize all non-default contexts,
    with locking and RSS_NTF notifications

Patch 3 uses the resize helpers in bnxt_set_channels().

Patch 4 adds HW tests in rss_drv.py (devices without dynamic table
sizing are skipped):
  resize_periodic - fold/unfold with a non-default [3,2,1,0]
    sub-table (user_size=4), verifying exact content preservation
    (main + ctx)
  resize_below_user_size_reject - periodic sub-table with user_size
    between big and small device table sizes; verifies that shrinking
    below user_size is rejected even when the table is periodic
    (main + ctx)
  resize_nonperiodic_reject - non-periodic table blocks channel
    reduction, with an extra periodic context to exercise
    multi-context validation (main + ctx)
  resize_nonperiodic_no_corruption - failed resize leaves table
    contents and channel count unchanged (main + ctx)

Running the tests:

  # On real hardware
  sudo NETIF=eth0 ./rss_drv.py
====================

Link: https://patch.msgid.link/20260320085826.1957255-1-bjorn@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoselftests: rss_drv: Add RSS indirection table resize tests
Björn Töpel [Fri, 20 Mar 2026 08:58:24 +0000 (09:58 +0100)] 
selftests: rss_drv: Add RSS indirection table resize tests

Add resize tests to rss_drv.py. Devices without dynamic table sizing
are skipped via _require_dynamic_indir_size().

resize_periodic: set a periodic 4-entry table, shrink channels to
fold, grow back to unfold. Check the exact pattern is preserved. Has
main and non-default context variants.

resize_below_user_size_reject: send a periodic table with user_size
between the big and small device table sizes. Verify that shrinking
below user_size is rejected even though the table is periodic. Has
main and non-default context variants.

resize_nonperiodic_reject: set a non-periodic table (equal N), verify
that channel reduction is rejected.

resize_nonperiodic_no_corruption: verify a failed resize leaves both
the indirection table contents and the channel count unchanged.

Signed-off-by: Björn Töpel <bjorn@kernel.org>
Link: https://patch.msgid.link/20260320085826.1957255-5-bjorn@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agobnxt_en: Resize RSS contexts on channel count change
Björn Töpel [Fri, 20 Mar 2026 08:58:23 +0000 (09:58 +0100)] 
bnxt_en: Resize RSS contexts on channel count change

bnxt_set_channels() previously rejected channel changes that alter the
RSS table size when RSS contexts exist, because non-default context
sizes were locked at creation.

Replace the rejection with the new resize helpers.

RSS table size only changes on P5 chips with older firmware; newer
firmware always uses the largest table size.

Signed-off-by: Björn Töpel <bjorn@kernel.org>
Link: https://patch.msgid.link/20260320085826.1957255-4-bjorn@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoethtool: Add RSS indirection table resize helpers
Björn Töpel [Fri, 20 Mar 2026 08:58:22 +0000 (09:58 +0100)] 
ethtool: Add RSS indirection table resize helpers

The core locks ctx->indir_size when an RSS context is created. Some
NICs (e.g. bnxt) change their indirection table size based on the
channel count, because the hardware table is a shared resource. This
forces drivers to reject channel changes when RSS contexts exist.

Add driver helpers to resize indirection tables:

ethtool_rxfh_indir_can_resize() checks whether the default context
indirection table can be resized.

ethtool_rxfh_indir_resize() resizes the default context table in
place. Folding (shrink) requires the table to be periodic at the new
size; non-periodic tables are rejected. Unfolding (grow) replicates
the existing pattern. Sizes must be multiples of each other.

ethtool_rxfh_ctxs_can_resize() validates all non-default RSS contexts
can be resized.

ethtool_rxfh_ctxs_resize() applies the resize.

Signed-off-by: Björn Töpel <bjorn@kernel.org>
Link: https://patch.msgid.link/20260320085826.1957255-3-bjorn@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoethtool: Track user-provided RSS indirection table size
Björn Töpel [Fri, 20 Mar 2026 08:58:21 +0000 (09:58 +0100)] 
ethtool: Track user-provided RSS indirection table size

Track the number of indirection table entries the user originally
provided (context 0/default as well!).

Replace IFF_RXFH_CONFIGURED with rss_indir_user_size: the flag is
redundant now that user_size captures the same information.

Add ethtool_rxfh_indir_lost() for drivers that must reset the
indirection table.

Convert bnxt and mlx5 to use it.

Signed-off-by: Björn Töpel <bjorn@kernel.org>
Link: https://patch.msgid.link/20260320085826.1957255-2-bjorn@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoteam: use netdev_from_priv()
Qingfang Deng [Fri, 20 Mar 2026 07:56:04 +0000 (15:56 +0800)] 
team: use netdev_from_priv()

Use the new netdev_from_priv() helper to access the net device from
struct team.

Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Link: https://patch.msgid.link/20260320075605.490832-2-dqfext@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: add netdev_from_priv() helper
Qingfang Deng [Fri, 20 Mar 2026 07:56:03 +0000 (15:56 +0800)] 
net: add netdev_from_priv() helper

Add a helper to get netdev from private data pointer, so drivers won't
have to store redundant netdev in priv.

Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Link: https://patch.msgid.link/20260320075605.490832-1-dqfext@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agolib: Move crypto library tests to Runtime Testing menu
Eric Biggers [Sun, 22 Mar 2026 03:24:38 +0000 (20:24 -0700)] 
lib: Move crypto library tests to Runtime Testing menu

Currently the kconfig options for the crypto library KUnit tests appear
in the menu:

    -> Library routines
      -> Crypto library routines

However, this is the only content of "Crypto library routines".  I.e.,
it is empty when CONFIG_KUNIT=n.  This is because the crypto library
routines themselves don't have (or need to have) prompts.

Since this usually ends up as an unnecessary empty menu, let's remove
this menu and instead source the lib/crypto/tests/Kconfig file from
lib/Kconfig.debug inside the "Runtime Testing" menu:

    -> Kernel hacking
      -> Kernel Testing and Coverage
        -> Runtime Testing

This puts the prompts alongside the ones for most of the other lib/
KUnit tests.  This seems to be a much better match to how the kconfig
menus are organized.

Acked-by: Randy Dunlap <rdunlap@infradead.org>
Tested-by: Randy Dunlap <rdunlap@infradead.org>
Link: https://lore.kernel.org/r/20260322032438.286296-1-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Remove 'struct sm3_state'
Eric Biggers [Sat, 21 Mar 2026 04:09:35 +0000 (21:09 -0700)] 
crypto: sm3 - Remove 'struct sm3_state'

Update one driver that used sizeof(struct sm3_state) to use
sizeof(struct sm3_ctx) instead.  Then, remove struct sm3_state and
SM3_STATE_SIZE.

This completes the replacement of struct sm3_state with struct sm3_ctx.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-13-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Remove the original "sm3_block_generic()"
Eric Biggers [Sat, 21 Mar 2026 04:09:34 +0000 (21:09 -0700)] 
crypto: sm3 - Remove the original "sm3_block_generic()"

Since the architecture-optimized SM3 code was migrated into lib/crypto/,
sm3_block_generic() is no longer called.  Remove it.  Then, since this
frees up the name, rename sm3_transform() to sm3_block_generic()
(matching the naming convention used in other hash algorithms).

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-12-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Remove sm3_base.h
Eric Biggers [Sat, 21 Mar 2026 04:09:33 +0000 (21:09 -0700)] 
crypto: sm3 - Remove sm3_base.h

Remove include/crypto/sm3_base.h, since it's no longer used.  The
corresponding logic was reimplemented in a central place in lib/crypto/.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-11-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agolib/crypto: x86/sm3: Migrate optimized code into library
Eric Biggers [Sat, 21 Mar 2026 04:09:32 +0000 (21:09 -0700)] 
lib/crypto: x86/sm3: Migrate optimized code into library

Instead of exposing the x86-optimized SM3 code via an x86-specific
crypto_shash algorithm, instead just implement the sm3_blocks() library
function.  This is much simpler, it makes the SM3 library functions be
x86-optimized, and it fixes the longstanding issue where the
x86-optimized SM3 code was disabled by default.  SM3 still remains
available through crypto_shash, but individual architectures no longer
need to handle it.

Tweak the prototype of sm3_transform_avx() to match what the library
expects, including changing the block count to size_t.  Note that the
assembly code actually already treated this argument as size_t.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-10-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agolib/crypto: riscv/sm3: Migrate optimized code into library
Eric Biggers [Sat, 21 Mar 2026 04:09:31 +0000 (21:09 -0700)] 
lib/crypto: riscv/sm3: Migrate optimized code into library

Instead of exposing the riscv-optimized SM3 code via a riscv-specific
crypto_shash algorithm, instead just implement the sm3_blocks() library
function.  This is much simpler, it makes the SM3 library functions be
riscv-optimized, and it fixes the longstanding issue where the
riscv-optimized SM3 code was disabled by default.  SM3 still remains
available through crypto_shash, but individual architectures no longer
need to handle it.

Tweak the prototype of sm3_transform_zvksh_zvkb() to match what the
library expects, including changing the block count to size_t.
Note that the assembly code already treated it as size_t.

Note: to see the diff from arch/riscv/crypto/sm3-riscv64-glue.c to
lib/crypto/riscv/sm3.h, view this commit with 'git show -M10'.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-9-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agolib/crypto: arm64/sm3: Migrate optimized code into library
Eric Biggers [Sat, 21 Mar 2026 04:09:30 +0000 (21:09 -0700)] 
lib/crypto: arm64/sm3: Migrate optimized code into library

Instead of exposing the arm64-optimized SM3 code via arm64-specific
crypto_shash algorithms, instead just implement the sm3_blocks() library
function.  This is much simpler, it makes the SM3 library functions be
arm64-optimized, and it fixes the longstanding issue where the
arm64-optimized SM3 code was disabled by default.  SM3 still remains
available through crypto_shash, but individual architectures no longer
need to handle it.

Tweak the SM3 assembly function prototypes to match what the library
expects, including changing the block count from 'int' to 'size_t'.
sm3_ce_transform() had to be updated to access 'x2' instead of 'w2',
while sm3_neon_transform() already used 'x2'.

Remove the CFI stubs which are no longer needed because the SM3 assembly
functions are no longer ever indirectly called.

Remove the dependency on KERNEL_MODE_NEON.  It was unnecessary, because
KERNEL_MODE_NEON is always enabled on arm64.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-8-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Replace with wrapper around library
Eric Biggers [Sat, 21 Mar 2026 04:09:29 +0000 (21:09 -0700)] 
crypto: sm3 - Replace with wrapper around library

Reimplement the "sm3" crypto_shash on top of the SM3 library, closely
mirroring the other hash algorithms (e.g. SHA-*).

The result, after later commits migrate the architecture-optimized SM3
code into the library as well, is that crypto/sm3.c will be the single
point of integration between crypto_shash and the actual SM3
implementations, simplifying the code.

Note: to see the diff from crypto/sm3_generic.c to crypto/sm3.c, view
this commit with 'git show -M10'.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-7-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agolib/crypto: tests: Add KUnit tests for SM3
Eric Biggers [Sat, 21 Mar 2026 04:09:28 +0000 (21:09 -0700)] 
lib/crypto: tests: Add KUnit tests for SM3

Add a KUnit test suite for the SM3 library.  It closely mirrors the test
suites for the other cryptographic hash functions.  The actual test and
benchmark logic is already in hash-test-template.h; this just wires it
up for SM3 in the usual way.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-6-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agolib/crypto: sm3: Add SM3 library API
Eric Biggers [Sat, 21 Mar 2026 04:09:27 +0000 (21:09 -0700)] 
lib/crypto: sm3: Add SM3 library API

Add a straightforward library API for SM3, mirroring the ones for the
other hash algorithms.  It uses the existing generic implementation of
SM3's compression function in lib/crypto/sm3.c.  Hooks are added for
architecture-optimized implementations, which later commits will wire up
to the existing optimized SM3 code for arm64, riscv, and x86.

Note that the rationale for this is *not* that SM3 should be used, or
that any kernel subsystem currently seems like a candidate for switching
from the sm3 crypto_shash to SM3 library.  (SM3, in fact, shouldn't be
used.  Likewise you shouldn't use MD5, SHA-1, RC4, etc...)

Rather, it's just that this will simplify how the kernel's existing SM3
code is integrated and make it much easier to maintain and test.  SM3 is
one of the only hash algorithms with arch-optimized code that is still
integrated in the old way.  By converting it to the new lib/crypto/ code
organization, we'll only have to keep track of one way of doing things.
The library will also get a KUnit test suite (as usual for lib/crypto/),
so it will become more easily and comprehensively tested as well.

Skip adding functions for HMAC-SM3 for now, though.  There's not as much
point in adding those right now.

Note: similar to the other hash algorithms, the library API uses
'struct sm3_ctx', not 'struct sm3_state'.  The existing 'struct
sm3_state' and the sm3_block_generic() function which uses it are
temporarily kept around until their users are updated by later commits.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-5-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Rename CRYPTO_SM3_GENERIC to CRYPTO_SM3
Eric Biggers [Sat, 21 Mar 2026 04:09:26 +0000 (21:09 -0700)] 
crypto: sm3 - Rename CRYPTO_SM3_GENERIC to CRYPTO_SM3

The kconfig options for generic crypto API modules have traditionally
*not* had a "_GENERIC" suffix.  Also, the "_GENERIC" suffix will make
even less sense once the architecture-optimized SM3 code is moved into
lib/crypto/ and the "sm3" crypto_shash is reimplemented on top of that.

Thus, rename CRYPTO_SM3_GENERIC to CRYPTO_SM3.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-4-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Remove sm3_zero_message_hash and SM3_T[1-2]
Eric Biggers [Sat, 21 Mar 2026 04:09:25 +0000 (21:09 -0700)] 
crypto: sm3 - Remove sm3_zero_message_hash and SM3_T[1-2]

Remove these, since they are unused.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-3-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agocrypto: sm3 - Fold sm3_init() into its caller
Eric Biggers [Sat, 21 Mar 2026 04:09:24 +0000 (21:09 -0700)] 
crypto: sm3 - Fold sm3_init() into its caller

Fold sm3_init() into its caller to free up the name for use in a library
API mirroring the other hash function APIs.

Acked-by: Ard Biesheuvel <ardb@kernel.org>
Link: https://lore.kernel.org/r/20260321040935.410034-2-ebiggers@kernel.org
Signed-off-by: Eric Biggers <ebiggers@kernel.org>
4 months agonet: b44: always select CONFIG_FIXED_PHY
Arnd Bergmann [Fri, 20 Mar 2026 15:49:19 +0000 (16:49 +0100)] 
net: b44: always select CONFIG_FIXED_PHY

When CONFIG_FIXED_PHY=m but CONFIG_B44=y, the kernel fails to link:

ld.lld: error: undefined symbol: fixed_phy_unregister
>>> referenced by b44.c
>>>               drivers/net/ethernet/broadcom/b44.o:(b44_remove_one) in archive vmlinux.a

ld.lld: error: undefined symbol: fixed_phy_register_100fd
>>> referenced by b44.c
>>>               drivers/net/ethernet/broadcom/b44.o:(b44_register_phy_one) in archive vmlinux.a

The fixed phy support is small enough that just always enabling it
for b44 is the simplest solution, and it avoids adding ugly #ifdef
checks.

Fixes: 10d2f15afba2 ("net: b44: register a fixed phy using fixed_phy_register_100fd if needed")
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Link: https://patch.msgid.link/20260320154927.674555-1-arnd@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: airoha: add RCU lock around dev_fill_forward_path
Qingfang Deng [Fri, 20 Mar 2026 09:43:15 +0000 (17:43 +0800)] 
net: airoha: add RCU lock around dev_fill_forward_path

Since 0417adf367a0 ("ppp: fix race conditions in ppp_fill_forward_path")
dev_fill_forward_path() should be called with RCU read lock held. This
fix was applied to net, while the Airoha flowtable commit was applied to
net-next, so it hadn't been an issue until net was merged into net-next.

Fixes: a8bdd935d1dd ("net: airoha: Add wlan flowtable TX offload")
Signed-off-by: Qingfang Deng <dqfext@gmail.com>
Acked-by: Lorenzo Bianconi <lorenzo@kernel.org>
Link: https://patch.msgid.link/20260320094315.525126-1-dqfext@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonfc: microread: Drop unused include
Andy Shevchenko [Fri, 20 Mar 2026 21:52:29 +0000 (22:52 +0100)] 
nfc: microread: Drop unused include

This driver includes the legacy header <linux/gpio.h> but does
not use any symbols from it. Drop the inclusion.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Reviewed-by: Simon Horman <horms@kernel.org>
Link: https://patch.msgid.link/20260320215230.3236005-1-andriy.shevchenko@linux.intel.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoieee802154: atusb: drop redundant device reference
Johan Hovold [Thu, 5 Mar 2026 10:43:13 +0000 (11:43 +0100)] 
ieee802154: atusb: drop redundant device reference

Driver core holds a reference to the USB interface and its parent USB
device while the interface is bound to a driver and there is no need to
take additional references unless the structures are needed after
disconnect.

Drop the redundant device reference to reduce cargo culting, make it
easier to spot drivers where an extra reference is needed, and reduce
the risk of memory leaks when drivers fail to release it.

Signed-off-by: Johan Hovold <johan@kernel.org>
Reviewed-by: Miquel Raynal <miquel.raynal@bootlin.com>
Acked-by: Stefan Schmidt <stefan@datenfreihafen.org>
Link: https://patch.msgid.link/20260305104313.15898-1-johan@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agoMerge branch 'net-stmmac-improve-pcs-support'
Jakub Kicinski [Tue, 24 Mar 2026 00:32:21 +0000 (17:32 -0700)] 
Merge branch 'net-stmmac-improve-pcs-support'

Russell King says:

====================
net: stmmac: improve PCS support

This series is the next of the three part series sorting out the PCS
support in stmmac, building on part 2:

net: stmmac: qcom-ethqos: further serdes reorganisation

Similar patches have been posted previously. This series does away with
the common SerDes PHY support, instead using a flag to indicate whether
2500Mbps mode is supported (STMMAC_FLAG_SERDES_SUPPORTS_2500M.) At this
time, I have no plans to resurect the common SerDes PHY support - the
generic PHY layer implementations are just too random to consider that,
and I certainly do not want the extra work of fixing that.

The reasoning here is that these patches should be safe to merge and
should not impact qcom-ethqos in any way.

We can then figure out how to work around qcom-ethqos hacks without
having to keep re-posting these same patches time and time again.
====================

Link: https://patch.msgid.link/abrNYVfZ1Iwff2EI@shell.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: stmmac: use integrated PCS for BASE-X modes
Russell King (Oracle) [Wed, 18 Mar 2026 16:06:31 +0000 (16:06 +0000)] 
net: stmmac: use integrated PCS for BASE-X modes

dwmac-qcom-ethqos supports SGMII and 2500BASE-X using the integrated
PCS, so we need to expand the PCS support to include support for
BASE-X modes.

Add support to the prereset configuration to detect 2500BASE-X, and
arrange for stmmac_mac_select_pcs() to return the integrated PCS if
its supported_interfaces bitmap reports support for the interface mode.

This results in priv->hw->pcs now being write-only, so remove it.

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPj-0000000DYAv-2JcZ@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: stmmac: add BASE-X support to integrated PCS
Russell King (Oracle) [Wed, 18 Mar 2026 16:06:26 +0000 (16:06 +0000)] 
net: stmmac: add BASE-X support to integrated PCS

The integrated PCS supports 802.3z (BASE-X) modes when the Synopsys
IP is coupled with an appropriate SerDes to provide the electrical
interface. The PCS presents a TBI interface to the SerDes for this.
Thus, the BASE-X related registers are only present when TBI mode is
supported.

dwmac-qcom-ethqos added support for using 2.5G with the integrated PCS
by calling dwmac_ctrl_ane() directly.

Add support for the following to the integrated PCS:
- 1000BASE-X protocol unconditionally.
- 2500BASE-X if the coupled SerDes supports 2.5G speed.
- The above without autonegotiation.
- If the PCS supports TBI, then optional BASE-X autonegotiation for each
  of the above.

Reviewed-by: Maxime Chevallier <maxime.chevallier@bootlin.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPe-0000000DYAp-1qpV@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: stmmac: add support for reading inband SGMII status
Russell King (Oracle) [Wed, 18 Mar 2026 16:06:21 +0000 (16:06 +0000)] 
net: stmmac: add support for reading inband SGMII status

Report the link, speed and duplex for SGMII links, read from the
SGMII, RGMII and SMII status and control register.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPZ-0000000DYAj-1MdI@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: stmmac: add struct stmmac_pcs_info
Russell King (Oracle) [Wed, 18 Mar 2026 16:06:16 +0000 (16:06 +0000)] 
net: stmmac: add struct stmmac_pcs_info

We need to describe one more register (offset and field bitmask) to
the PCS code. Move the existing PCS offset and interrupt enable bits
to a new struct and pass that in to stmmac_integrated_pcs_init().

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPU-0000000DYAd-0ssk@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agonet: stmmac: move default_an_inband to plat_stmmacenet_data
Russell King (Oracle) [Wed, 18 Mar 2026 16:06:11 +0000 (16:06 +0000)] 
net: stmmac: move default_an_inband to plat_stmmacenet_data

Move the default_an_inband flag from struct mdio_bus_data to struct
plat_stmmacenet_data. This is to allow platforms that do not use the
integrated MDIO bus to enable inband mode.

Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Link: https://patch.msgid.link/E1w2tPP-0000000DYAX-0TKw@rmk-PC.armlinux.org.uk
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
4 months agotracing: Pretty-print enum parameters in function arguments
Donglin Peng [Mon, 9 Feb 2026 07:19:49 +0000 (15:19 +0800)] 
tracing: Pretty-print enum parameters in function arguments

Currently, print_function_args() prints enum parameter values
in decimal format, reducing trace log readability.

Use BTF information to resolve enum parameters and print their
symbolic names (where available). This improves readability by
showing meaningful identifiers instead of raw numbers.

Before:
  mod_memcg_lruvec_state(lruvec=0xffff..., idx=5, val=320)

After:
  mod_memcg_lruvec_state(lruvec=0xffff..., idx=5 [NR_SLAB_RECLAIMABLE_B], val=320)

Cc: Steven Rostedt <rostedt@goodmis.org>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Link: https://patch.msgid.link/20260209071949.4040193-1-dolinux.peng@gmail.com
Signed-off-by: Donglin Peng <pengdonglin@xiaomi.com>
Signed-off-by: Steven Rostedt (Google) <rostedt@goodmis.org>