Stefan Hajnoczi [Wed, 11 Jun 2025 15:39:53 +0000 (11:39 -0400)]
Merge tag 'pull-vfio-20250611' of https://github.com/legoater/qemu into staging
vfio queue:
* Fixed newly added potential issues in vfio-pci
* Added support to report vfio-ap configuration changes
* Added prerequisite support for vfio-user
* Added first part for VFIO live update support
Stefan Hajnoczi [Wed, 11 Jun 2025 15:39:30 +0000 (11:39 -0400)]
Merge tag 'pull-request-2025-06-11' of https://gitlab.com/thuth/qemu into staging
* Remove aarch64 job from travis.yml
* Remove deprecated s390-ccw-virtio-4.1 machine
* Add memlock functional test
* Various other small updates and fixes
* tag 'pull-request-2025-06-11' of https://gitlab.com/thuth/qemu:
scripts/meson-buildoptions: Sort coroutine_backend choices lexicographically
MAINTAINERS: Update Akihiko Odaki's affiliation
MAINTAINERS: Update the paths to the testing documentation files
tests/vm/README: fix documentation path in tests/vm/README
tests/functional: add memlock tests
tests/functional: add skipLockedMemoryTest decorator
tests/functional: Speed up the avr_mega2560 test
tests/functional: Use the 'none' machine for the VNC test
hw/s390x/s390-virtio-ccw: Remove the deprecated 4.1 machine type
travis.yml: Remove the aarch64 job
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
* tag 'hw-misc-20250610' of https://github.com/philmd/qemu: (24 commits)
hw/net/i82596: Factor configure function out
hw/net/i82596: Update datasheet URL
hw/misc/stm32_rcc: Fix stm32_rcc_write() arguments order
hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class
hw/gpio/aspeed: Fix definition of AspeedGPIOClass
hw/virtio/virtio-pmem: Fix definition of VirtIOPMEMClass
hw/virtio/virtio-mem: Fix definition of VirtIOMEMClass
tests/unit/test-char: Avoid using g_alloca()
backends/tpm: Avoid using g_alloca()
hw/gpio/pca9552: Avoid using g_newa()
hw/core/cpu: Move CacheType to general cpu.h
accel/hvf: Fix TYPE_HVF_ACCEL instance size
tests/functional: Add a test for the Arduino UNO machine
MAINTAINERS: Update Akihiko Odaki's affiliation
pc-bios: ensure installed ROMs don't have execute permissions
hw/ppc/e500: Use SysBusDevice API to access TYPE_CCSR's internal resources
hw/net/fsl_etsec: Set default MAC address
hw/ppc/e500: Move clock and TB frequency to machine class
hw/hyperv/balloon: Consolidate OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES
hw/core/resetcontainer: Consolidate OBJECT_DECLARE_SIMPLE_TYPE
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Stefan Hajnoczi [Wed, 11 Jun 2025 15:37:13 +0000 (11:37 -0400)]
Merge tag 'pull-loongarch-20250610' of https://github.com/gaosong715/qemu into staging
pull-loongarch_20250610
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# =jC/2
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# gpg: Signature made Tue 10 Jun 2025 03:04:45 EDT
# gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF
# gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20250610' of https://github.com/gaosong715/qemu:
hw/loongarch/virt: Remove global variables about memmap tables
hw/loongarch/virt: Remove global variables about initrd
target/loongarch: add check for fcond
hw/loongarch/virt: inform guest of kvm
hw/intc/loongarch_extioi: Fix typo issue about register EXTIOI_COREISR_END
hw/intc/loongarch_pch: Convert to little endian with ID register
hw/loongarch/virt: Fix big endian support with MCFG table
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Steve Sistare [Tue, 10 Jun 2025 15:39:29 +0000 (08:39 -0700)]
vfio/pci: vfio_notifier_cleanup
Move event_notifier_cleanup calls to a helper vfio_notifier_cleanup.
This version is trivial, and does not yet use the vdev and nr parameters.
No functional change.
Steve Sistare [Tue, 10 Jun 2025 15:39:27 +0000 (08:39 -0700)]
vfio/pci: pass vector to virq functions
Pass the vector number to vfio_connect_kvm_msi_virq and
vfio_remove_kvm_msi_virq, so it can be passed to their subroutines in
a subsequent patch. No functional change.
Steve Sistare [Tue, 10 Jun 2025 15:39:26 +0000 (08:39 -0700)]
vfio/pci: vfio_notifier_init
Move event_notifier_init calls to a helper vfio_notifier_init.
This version is trivial, but it will be expanded to support CPR
in subsequent patches. No functional change.
Steve Sistare [Tue, 10 Jun 2025 15:39:24 +0000 (08:39 -0700)]
vfio-pci: skip reset during cpr
Do not reset a vfio-pci device during CPR, and do not complain if the
kernel's PCI config space changes for non-emulated bits between the
vmstate save and load, which can happen due to ongoing interrupt activity.
Steve Sistare [Tue, 10 Jun 2025 15:39:21 +0000 (08:39 -0700)]
vfio/container: recover from unmap-all-vaddr failure
If there are multiple containers and unmap-all fails for some container, we
need to remap vaddr for the other containers for which unmap-all succeeded.
Recover by walking all address ranges of all containers to restore the vaddr
for each. Do so by invoking the vfio listener callback, and passing a new
"remap" flag that tells it to restore a mapping without re-allocating new
userland data structures.
Steve Sistare [Tue, 10 Jun 2025 15:39:20 +0000 (08:39 -0700)]
vfio/container: mdev cpr blocker
During CPR, after VFIO_DMA_UNMAP_FLAG_VADDR, the vaddr is temporarily
invalid, so mediated devices cannot be supported. Add a blocker for them.
This restriction will not apply to iommufd containers when CPR is added
for them in a future patch.
Steve Sistare [Tue, 10 Jun 2025 15:39:19 +0000 (08:39 -0700)]
vfio/container: restore DMA vaddr
In new QEMU, do not register the memory listener at device creation time.
Register it later, in the container post_load handler, after all vmstate
that may affect regions and mapping boundaries has been loaded. The
post_load registration will cause the listener to invoke its callback on
each flat section, and the calls will match the mappings remembered by the
kernel.
The listener calls a special dma_map handler that passes the new VA of each
section to the kernel using VFIO_DMA_MAP_FLAG_VADDR. Restore the normal
handler at the end.
Steve Sistare [Tue, 10 Jun 2025 15:39:18 +0000 (08:39 -0700)]
vfio/container: discard old DMA vaddr
In the container pre_save handler, discard the virtual addresses in DMA
mappings with VFIO_DMA_UNMAP_FLAG_VADDR, because guest RAM will be
remapped at a different VA after in new QEMU. DMA to already-mapped
pages continues.
Steve Sistare [Tue, 10 Jun 2025 15:39:17 +0000 (08:39 -0700)]
vfio/container: preserve descriptors
At vfio creation time, save the value of vfio container, group, and device
descriptors in CPR state. On qemu restart, vfio_realize() finds and uses
the saved descriptors.
During reuse, device and iommu state is already configured, so operations
in vfio_realize that would modify the configuration, such as vfio ioctl's,
are skipped. The result is that vfio_realize constructs qemu data
structures that reflect the current state of the device.
Steve Sistare [Tue, 10 Jun 2025 15:39:16 +0000 (08:39 -0700)]
vfio/container: register container for cpr
Register a legacy container for cpr-transfer, replacing the generic CPR
register call with a more specific legacy container register call. Add a
blocker if the kernel does not support VFIO_UPDATE_VADDR or VFIO_UNMAP_ALL.
This is mostly boiler plate. The fields to to saved and restored are added
in subsequent patches.
Steve Sistare [Tue, 10 Jun 2025 15:39:15 +0000 (08:39 -0700)]
migration: lower handler priority
Define a vmstate priority that is lower than the default, so its handlers
run after all default priority handlers. Since 0 is no longer the default
priority, translate an uninitialized priority of 0 to MIG_PRI_DEFAULT.
CPR for vfio will use this to install handlers for containers that run
after handlers for the devices that they contain.
John Levon [Sat, 7 Jun 2025 00:10:35 +0000 (17:10 -0700)]
vfio: add per-region fd support
For vfio-user, each region has its own fd rather than sharing
vbasedev's. Add the necessary plumbing to support this, and use the
correct fd in vfio_region_mmap().
Rorie Reyes [Mon, 9 Jun 2025 16:44:18 +0000 (12:44 -0400)]
s390: implementing CHSC SEI for AP config change
Handle interception of the CHSC SEI instruction for requests
indicating the guest's AP configuration has changed.
If configuring --without-default-devices, hw/s390x/ap-stub.c
was created to handle such circumstance. Also added the
following to hw/s390x/meson.build if CONFIG_VFIO_AP is
false, it will use the stub file.
Rorie Reyes [Mon, 9 Jun 2025 16:44:17 +0000 (12:44 -0400)]
hw/vfio/ap: Storing event information for an AP configuration change event
These functions can be invoked by the function that handles interception
of the CHSC SEI instruction for requests indicating the accessibility of
one or more adjunct processors has changed.
Rorie Reyes [Mon, 9 Jun 2025 16:44:16 +0000 (12:44 -0400)]
hw/vfio/ap: store object indicating AP config changed in a queue
Creates an object indicating that an AP configuration change event
has been received and stores it in a queue. These objects will later
be used to store event information for an AP configuration change
when the CHSC instruction is intercepted.
Rorie Reyes [Mon, 9 Jun 2025 16:44:15 +0000 (12:44 -0400)]
hw/vfio/ap: notification handler for AP config changed event
Register an event notifier handler to process AP configuration
change events by queuing the event and generating a CRW to let
the guest know its AP configuration has changed
Zhenzhong Duan [Wed, 11 Jun 2025 02:42:28 +0000 (10:42 +0800)]
vfio/pci: Fix instance_size of VFIO_PCI_BASE
Currently the final instance_size of VFIO_PCI_BASE is sizeof(PCIDevice).
It should be sizeof(VFIOPCIDevice), VFIO_PCI uses same structure as
base class VFIO_PCI_BASE, so no need to set its instance_size explicitly.
This isn't catastrophic only because VFIO_PCI_BASE is an abstract class.
Fixes: d4e392d0a99b ("vfio: add vfio-pci-base class") Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: John Levon <john.levon@nutanix.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Yi Liu <yi.l.liu@intel.com> Link: https://lore.kernel.org/qemu-devel/20250611024228.423666-1-zhenzhong.duan@intel.com Signed-off-by: Cédric Le Goater <clg@redhat.com>
Akihiko Odaki [Sat, 31 May 2025 07:00:25 +0000 (16:00 +0900)]
MAINTAINERS: Update Akihiko Odaki's affiliation
My contract with Daynix Computing Ltd. will expire by the end of May,
2025. As I may contribute to QEMU for my research, use my email address
at the lab.
As I'm the only maintainer of igb and no longer financially supported to
maintain it, change its status to Odd Fixes until someone steps up.
Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250531-rsg-v1-1-e0bae1e1d90e@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 10 Jun 2025 05:37:34 +0000 (07:37 +0200)]
MAINTAINERS: Update the paths to the testing documentation files
When the testing docs were moved to a separate subfolder, the entries
in the MAINTAINERS file were missed. Update them now.
Fixes: ff41da50308 ("docs/devel: Split testing docs from the build docs and move to separate folder") Reviewed-by: Ani Sinha <anisinha@redhat.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250610053734.10417-1-thuth@redhat.com>
Haseung Bong [Sat, 7 Jun 2025 06:04:56 +0000 (15:04 +0900)]
tests/vm/README: fix documentation path in tests/vm/README
The README file in tests/vm/ points to a non-existent file,
docs/devel/testing.rst. Update the README to point to
docs/devel/testing/main.rst, which now contains information
about VM testing.
Signed-off-by: Haseung Bong <hasueng@gmail.com> Fixes: ff41da50308 ("docs/devel: Split testing docs from the build docs and move to separate folder") Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250607060456.28902-1-hasueng@gmail.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Add new tests to check the correctness of the `-overcommit memlock`
option (possible values: off, on, on-fault) by using
`/proc/{qemu_pid}/status` file to check in VmSize, VmRSS and VmLck
values:
* if `memlock=off`, then VmLck = 0;
* if `memlock=on`, then VmLck > 0 and almost all memory is resident;
* if `memlock=on-fault`, then VmLck > 0 and only few memory is resident.
Signed-off-by: Alexandr Moshkov <dtalexundeer@yandex-team.ru>
Message-ID: <20250605065908.299979-3-dtalexundeer@yandex-team.ru> Signed-off-by: Thomas Huth <thuth@redhat.com>
Used in future commit to skipping execution of a tests if the system's
locked memory limit is below the required threshold.
Signed-off-by: Alexandr Moshkov <dtalexundeer@yandex-team.ru> Reviewed-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250605065908.299979-2-dtalexundeer@yandex-team.ru> Signed-off-by: Thomas Huth <thuth@redhat.com>
Thomas Huth [Tue, 3 Jun 2025 18:47:10 +0000 (20:47 +0200)]
tests/functional: Speed up the avr_mega2560 test
We can simply check for the expected pattern on the console,
no need to wait for two seconds here to search for the pattern
in the log at the end.
While we're at it, also remove the obsolete "timeout" variable
from this test.
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com> Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250603184710.25651-1-thuth@redhat.com>
Thomas Huth [Tue, 3 Jun 2025 10:34:49 +0000 (12:34 +0200)]
tests/functional: Use the 'none' machine for the VNC test
The VNC test currently fails if the default machine ("pc" for x86)
has not been compiled into the binary. Since we also can test VNC
when QEMU just shows the default monitor, let's avoid this problem
by simply using the "none" machine (which is always available)
here instead.
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250603103449.32499-1-thuth@redhat.com>
Thomas Huth [Mon, 19 May 2025 05:47:44 +0000 (07:47 +0200)]
hw/s390x/s390-virtio-ccw: Remove the deprecated 4.1 machine type
With the upcoming release of QEMU 10.1, the s390-ccw-virtio-4.1 machine
will be older than 6 years, so according to our machine support policy,
it can be removed now. The V4_1 CPU feature group gets merged into the
minimum CPU feature group now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250519054744.36715-1-thuth@redhat.com>
only s390x and ppc64le are still part of the free OSS tier in Travis.
aarch64 has been removed sometime during the last year. Thus remove
the aarch64 job from our .travis.yml file now to avoid that someone
burns non-OSS CI credits with this job by accident now.
Signed-off-by: Thomas Huth <thuth@redhat.com>
Message-ID: <20250530115454.187727-1-thuth@redhat.com>
Andrej Kruták (1):
Add AHCI Power ON + ICC_ACTIVE into port setup code
Daniel Khodabakhsh (2):
boot: Force display of the boot menu when boot-menu-wait is a negative number
usb-hid: Support multiple USB HID devices by storing them in a linked list
Daniel Verkamp (3):
vbe: Add VBE 2.0+ OemData field to struct vbe_info
vgasrc: round up save/restore size
vbe: implement function 09h (get/set palette data)
Daniil Tatianin (1):
pciinit: don't misalign large BARs
Gerd Hoffmann (6):
limit address space used for pci devices, part two
drop obsolete acpi table code
drop acpi tables and hex includes
add romfile_loadbool()
update pci_pad_mem64 handling
ahci: add controller reset
Igor Mammedov (1):
fix smbios blob length overflow
Jiaxun Yang (1):
ahci: Fix hangs due to controller reset
Kevin O'Connor (14):
vgasrc: Use curmode_g instead of vmode_g when mode is the current video mode
vgasrc: Rename vgahw_get_linesize() to vgahw_minimum_linelength()
stdvgamodes: No need to store pelmask in vga_modes[]
stdvgamodes: Improve naming of dac palette tables
stdvga: Rename CGA palette functions
stdvga: Add comments to interface functions in stdvga.c
stdvga: Rename stdvga_toggle_intensity() to stdvga_set_palette_blinking()
stdvga: Rework stdvga palette index paging interface functions
stdvga: Rename stdvga_set_text_block_specifier() to stdvga_set_font_location()
stdvga: Rename stdvga_set_scan_lines() to stdvga_set_character_height()
stdvga: Rename stdvga_get_vde() to stdvga_get_vertical_size()
stdvga: Add stdvga_set_vertical_size() helper function
stdvgaio: Only read/write one color palette entry at a time
docs: Note v1.17.0 release
Mark Cave-Ayland (2):
esp-scsi: terminate DMA transfer when ESP data transfer completes
esp-scsi: indicate acceptance of MESSAGE IN phase data
Max Tottenham (1):
Add LBA 64bit support for reads beyond 2TB.
Steven Price (1):
vgabios: Fix generating modes list for static_functionality
nikolar via SeaBIOS (1):
kconfig: fix the check-lxdialog.sh to work with gcc 14+
hw/misc/stm32_rcc: Fix stm32_rcc_write() arguments order
The tracing function for the write case incorrectly has
parameters switched around. So order them in the correct way.
Signed-off-by: Philippe Michaud-Boudreault <philmb3487@proton.me> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <HnyjTNqwrfGusE44bnM7kuLuj13Di1VgXN-dXVHMOSnfgCUhoipOVIoVS1WQaKrJxmEDy9XJGdlQj6zVTIdJE0QVlfBhfbcckFFWRRP56uY=@proton.me> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Zhenzhong Duan [Fri, 6 Jun 2025 09:24:06 +0000 (17:24 +0800)]
hw/riscv/riscv-iommu: Remove definition of RISCVIOMMU[Pci|Sys]Class
RISCVIOMMUPciClass and RISCVIOMMUSysClass are defined with missed
parent class, class_init on them may corrupt their parent class
fields.
It's lucky that parent_realize and parent_phases are not initialized
or used until now, so just remove the definitions. They can be added
back when really necessary.
Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com> Acked-by: Alistair Francis <alistair.francis@wdc.com>
Message-ID: <20250606092406.229833-6-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Zhenzhong Duan [Fri, 6 Jun 2025 09:24:04 +0000 (17:24 +0800)]
hw/gpio/aspeed: Fix definition of AspeedGPIOClass
AspeedGPIOClass's parent is SysBusDeviceClass rather than SysBusDevice.
This isn't catastrophic only because sizeof(SysBusDevice) >
sizeof(SysBusDeviceClass).
Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and AST2500") Closes: https://lists.gnu.org/archive/html/qemu-devel/2025-06/msg00586.html Suggested-by: David Hildenbrand <david@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Message-ID: <20250606092406.229833-4-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Zhenzhong Duan [Fri, 6 Jun 2025 09:24:03 +0000 (17:24 +0800)]
hw/virtio/virtio-pmem: Fix definition of VirtIOPMEMClass
VirtIOPMEMClass's parent is VirtioDeviceClass rather than VirtIODevice.
This isn't catastrophic only because sizeof(VirtIODevice) >
sizeof(VirtioDeviceClass).
Fixes: 5f503cd9f388 ("virtio-pmem: add virtio device") Closes: https://lists.gnu.org/archive/html/qemu-devel/2025-06/msg00586.html Reported-by: David Hildenbrand <david@redhat.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>
Message-ID: <20250606092406.229833-3-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Zhenzhong Duan [Fri, 6 Jun 2025 09:24:02 +0000 (17:24 +0800)]
hw/virtio/virtio-mem: Fix definition of VirtIOMEMClass
Parent of VirtIOMEMClass is VirtioDeviceClass rather than VirtIODevice.
This isn't catastrophic only because sizeof(VirtIODevice) >
sizeof(VirtioDeviceClass).
Fixes: 910b25766b33 ("virtio-mem: Paravirtualized memory hot(un)plug") Signed-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com> Reviewed-by: David Hildenbrand <david@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250606092406.229833-2-zhenzhong.duan@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
We have pin_count <= PCA955X_PIN_COUNT_MAX. Having
PCA955X_PIN_COUNT_MAX = 16, it is safe to explicitly
allocate the char buffer on the stack, without g_newa().
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Reviewed-by: Glenn Miles <milesg@linux.ibm.com> Reviewed-by: Stefan Hajnoczi <stefanha@redhat.com>
Message-Id: <20250605193540.59874-2-philmd@linaro.org>
Fixes: c97d6d2cdf9 ("i386: hvf: add code base from Google repo") Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250606164418.98655-7-philmd@linaro.org>
Thomas Huth [Tue, 3 Jun 2025 18:40:05 +0000 (20:40 +0200)]
tests/functional: Add a test for the Arduino UNO machine
Check whether we can run a kernel that prints something to the
serial console.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Mark Cave-Ayland <mark.caveayland@nutanix.com>
Message-ID: <20250603184007.24521-1-thuth@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Akihiko Odaki [Sat, 31 May 2025 07:00:25 +0000 (16:00 +0900)]
MAINTAINERS: Update Akihiko Odaki's affiliation
My contract with Daynix Computing Ltd. will expire by the end of May,
2025. As I may contribute to QEMU for my research, use my email address
at the lab.
As I'm the only maintainer of igb and no longer financially supported to
maintain it, change its status to Odd Fixes until someone steps up.
Signed-off-by: Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250531-rsg-v1-1-e0bae1e1d90e@rsg.ci.i.u-tokyo.ac.jp> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
pc-bios: ensure installed ROMs don't have execute permissions
We have been inconsistent about whether ROMS stored in git have
execute permission set, and by default meson will preserve source
file permissions when installing files. This has caused periodic
problems in RPM packaging as executable binary files get analysed
by various tools/linters, which can trip up on the ROMs.
Tell meson explicitly that all the ROMs should be without execute
permission when installed.
Signed-off-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Helge Deller <deller@gmx.de> Tested-by: Helge Deller <deller@gmx.de> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250530152118.65030-1-berrange@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Bernhard Beschow [Fri, 23 May 2025 15:02:13 +0000 (17:02 +0200)]
hw/ppc/e500: Use SysBusDevice API to access TYPE_CCSR's internal resources
Rather than accessing the attributes of TYPE_CCSR directly, use the SysBusDevice
API which exists exactly for that purpose. Furthermore, registering the memory
region with the SysBusDevice API makes it show up in QMP's `info qom-tree`
command.
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: BALATON Zoltan <balaton@eik.bme.hu>
[balaton: rebased] Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Acked-by: Bernhard Beschow <shentey@gmail.com>
Message-ID: <619a58d1f83d2aad5b4feec930d46c64abff0977.1748012109.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The QOM type of HvBalloon is declared by OBJECT_DECLARE_SIMPLE_TYPE,
which means it doesn't need the class!
Therefore, use OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES to implement
the type, then there's no need for class definition.
Cc: "Maciej S. Szmigiero" <maciej.szmigiero@oracle.com> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Acked-by: Maciej S. Szmigiero <maciej.szmigiero@oracle.com>
Message-ID: <20250514084957.2221975-6-zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
The QOM type of ResettableContainer is defined by
OBJECT_DEFINE_SIMPLE_TYPE_WITH_INTERFACES, which means it doesn't need
the class!
Therefore, use OBJECT_DECLARE_SIMPLE_TYPE to declare the type, then
there's no need for class definition.
Cc: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Zhao Liu <zhao1.liu@intel.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <20250514084957.2221975-8-zhao1.liu@intel.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Loading firmware from the PCI host is unusual and raven is only used
by one board so this does not simplify anything but rather complicates
it. Revert to loading firmware from board code as that is the usual
way and also because raven has nothing to do with ROM so it is not a
good place for this.
Signed-off-by: BALATON Zoltan <balaton@eik.bme.hu> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-ID: <4ca4f71bf661923d9a91b7e6776a0e40726e2337.1746374076.git.balaton@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
QOM types are now registered using as TypeInfo via DEFINE_TYPES()
or type_init(). Update TYPE_SH_SERIAL, removing the empty QOM
instance_init/finalize handlers.
This was definitely wrong, because OBJECT_DEFINE_TYPE() is only
for cases where the class needs its own virtual methods or some
other per-class state in its own class struct.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20250124175053.74461-3-philmd@linaro.org>
hw/char/sh_serial: Delete fifo_timeout_timer in DeviceUnrealize
fifo_timeout_timer is created in the DeviceRealize handler,
not in the instance_init one. For parity, delete it in
DeviceUnrealize, rather than instance_finalize.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20250124175053.74461-2-philmd@linaro.org>
Bibo Mao [Wed, 30 Apr 2025 09:47:38 +0000 (17:47 +0800)]
hw/loongarch/virt: Remove global variables about memmap tables
Global variables memmap_table and memmap_entries stores UEFI memory
map table informations. It can be moved into structure
LoongArchVirtMachineState.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250430094738.1556670-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 30 Apr 2025 09:47:37 +0000 (17:47 +0800)]
hw/loongarch/virt: Remove global variables about initrd
Global variables initrd_offset and initrd_size records loading information
about initrd, it can be moved to structure loongarch_boot_info.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Message-Id: <20250430094738.1556670-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20250603024810.350510-1-gaosong@loongson.cn>
Qiang Ma [Tue, 3 Jun 2025 03:18:13 +0000 (11:18 +0800)]
hw/loongarch/virt: inform guest of kvm
Commit bab27ea2e3 ("hw/arm/virt: smbios:
inform guest of kvm") fixes the same issue
on arm.
without this patch:
[root@localhost ~]# virt-what
qemu
with this patch:
[root@localhost ~]# virt-what
kvm
Signed-off-by: Qiang Ma <maqianga@uniontech.com> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250603031813.31794-1-maqianga@uniontech.com> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Thu, 5 Jun 2025 09:28:48 +0000 (17:28 +0800)]
hw/intc/loongarch_extioi: Fix typo issue about register EXTIOI_COREISR_END
Interrupt controller extioi supports 256 vectors, register EXTIOI_COREISR
records pending interrupt status with bitmap method. Size of EXTIOI_COREISR
is 256 / 8 = 0x20 bytes, EXTIOI_COREISR_END should be EXTIOI_COREISR_START
+ 0x20 rather than 0xB20.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250605092848.1550985-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 4 Jun 2025 06:55:02 +0000 (14:55 +0800)]
hw/intc/loongarch_pch: Convert to little endian with ID register
With PCH ID register, it is defined as union type as follows:
union LoongArchPIC_ID {
struct {
uint8_t _reserved_0[3];
uint8_t id;
uint8_t version;
uint8_t _reserved_1;
uint8_t irq_num;
uint8_t _reserved_2;
} QEMU_PACKED desc;
uint64_t data;
}
And with pch driver in virt machine irq_number is parsed with little
endian method:
vec_count = ((readq(priv->base) >> 48) & 0xff) + 1
So the value of ID register should be converted to little endian.
With this patch, linux kernel passes to run on S390 big endian host
machine with TCG method.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250604065502.1114098-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Bibo Mao [Wed, 4 Jun 2025 06:55:01 +0000 (14:55 +0800)]
hw/loongarch/virt: Fix big endian support with MCFG table
With API build_mcfg(), it is not necessary with parameter structure
AcpiMcfgInfo to convert to little endian since it is directly used
with host native endian.
Here remove endian conversion before calling function build_mcfg().
With this patch, bios-tables-test passes to run on big endian host
machine S390.
Fixes: 735143f10d3e ("hw/loongarch: Add acpi ged support") Cc: qemu-stable@nongnu.org Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn>
Message-Id: <20250604065502.1114098-2-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
Stefan Hajnoczi [Sat, 7 Jun 2025 19:08:54 +0000 (15:08 -0400)]
Merge tag 'pull-10.1-maintainer-may-2025-070625-1' of https://gitlab.com/stsquad/qemu into staging
maintainer updates for May (testing, plugins)
- expose ~/.cache/qemu to container builds
- disable debug info in CI
- allow boot.S to handle target el mode selection
- new arguments for ips plugin
- cleanup assets in size_memop
- fix include guard in gdbstub
- introduce qGDBServerVersion gdbstub query
- update gdb aarch64-core.xml to support bitfields
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# gpg: Signature made Sat 07 Jun 2025 11:42:06 EDT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
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* tag 'pull-10.1-maintainer-may-2025-070625-1' of https://gitlab.com/stsquad/qemu:
gdbstub: update aarch64-core.xml
gdbstub: Implement qGDBServerVersion packet
gdbstub: assert earlier in handle_read_all_regs
include/gdbstub: fix include guard in commands.h
include/exec: fix assert in size_memop
contrib/plugins: allow setting of instructions per quantum
contrib/plugins: add a scaling factor to the ips arg
tests/qtest: Avoid unaligned access in IGB test
tests/tcg: make aarch64 boot.S handle different starting modes
gitlab: disable debug info on CI builds
tests/docker: expose $HOME/.cache/qemu as docker volume
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Update aarch64-core.xml to include field definitions for PSTATE, which
in gdb is modelled in the cpsr (current program status register)
pseudo-register, named after the actual cpsr register in armv7.
Defining the fields layout of the register allows easy inspection of for
example, the current exception level (EL):
For example. Before booting a Linux guest, EL=2, but after booting and
Ctrl-C'ing in gdb, we get EL=0:
(gdb) info registers $cpsr
cpsr 0x20402009 [ SP EL=2 BTYPE=0 PAN C ]
(gdb) cont
Continuing.
^C
Thread 2 received signal SIGINT, Interrupt.
0x0000ffffaaff286c in ?? ()
(gdb) info registers $cpsr
cpsr 0x20001000 [ EL=0 BTYPE=0 SSBS C ]
The aarch64-core.xml has been updated to match exactly the version
retrieved from upstream gdb, retrieved in 2025-05-19 from HEAD commit 9f4dc0b137c86f6ff2098cb1ab69442c69d6023d.
This commit adds support for the `qGDBServerVersion` packet to the qemu
gdbstub which could be used by clients to detect the QEMU version
(and, e.g., use a workaround for known bugs).
This packet is not documented/standarized by GDB but it was implemented
by LLDB gdbstub [0] and is helpful for projects like Pwndbg [1].
This has been implemented by Patryk, who I included in Co-authored-by
and who asked me to send the patch.
Alex Bennée [Tue, 3 Jun 2025 11:01:53 +0000 (12:01 +0100)]
contrib/plugins: allow setting of instructions per quantum
The default is we update time every 1/10th of a second or so. However
for some cases we might want to update time more frequently. Allow
this to be set via the command line through the ipq argument.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250603110204.838117-7-alex.bennee@linaro.org>
Nabih Estefan [Tue, 3 Jun 2025 11:01:51 +0000 (12:01 +0100)]
tests/qtest: Avoid unaligned access in IGB test
../tests/qtest/libqos/igb.c:106:5: runtime error: load of misaligned address 0x562040be8e33 for type 'uint32_t', which requires 4 byte alignment
Instead of straight casting the uint8_t array, we can use ldl_le_p and
lduw_l_p to assure the unaligned access works properly against
uint32_t and uint16_t.
Alex Bennée [Tue, 3 Jun 2025 11:01:50 +0000 (12:01 +0100)]
tests/tcg: make aarch64 boot.S handle different starting modes
Currently the boot.S code assumes everything starts at EL1. This will
break things like the memory test which will barf on unaligned memory
access when run at a higher level.
Adapt the boot code to do some basic verification of the starting mode
and the minimal configuration to move to the lower exception levels.
With this we can run the memory test with:
Alex Bennée [Tue, 3 Jun 2025 11:01:49 +0000 (12:01 +0100)]
gitlab: disable debug info on CI builds
Our default build enables debug info which adds hugely to the size of
the builds as well as the size of cached objects. Disable debug info
across the board to save space and reduce pressure on the CI system.
We still have a number of builds which explicitly enable debug and
related extra asserts like --enable-debug-tcg.
Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250603110204.838117-3-alex.bennee@linaro.org>
Alex Bennée [Tue, 3 Jun 2025 11:01:48 +0000 (12:01 +0100)]
tests/docker: expose $HOME/.cache/qemu as docker volume
If you want to run functional tests we should share .cache/qemu so we
don't force containers to continually re-download images. We also move
ccache to use this shared area.
Reviewed-by: Thomas Huth <thuth@redhat.com> Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-ID: <20250603110204.838117-2-alex.bennee@linaro.org>
Stefan Hajnoczi [Fri, 6 Jun 2025 13:42:58 +0000 (09:42 -0400)]
Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging
* futex: support Windows
* qemu-thread: Avoid futex abstraction for non-Linux
* migration, hw/display/apple-gfx: replace QemuSemaphore with QemuEvent
* rust: bindings for Error
* hpet, rust/hpet: return errors from realize if properties are incorrect
* rust/hpet: Drop BqlCell wrapper for num_timers
* target/i386: Emulate ftz and denormal flag bits correctly
* i386/kvm: Prefault memory on page state change
* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (31 commits)
tests/tcg/x86_64/fma: add test for exact-denormal output
target/i386: Wire up MXCSR.DE and FPUS.DE correctly
target/i386: Use correct type for get_float_exception_flags() values
target/i386: Detect flush-to-zero after rounding
hw/display/apple-gfx: Replace QemuSemaphore with QemuEvent
migration/postcopy: Replace QemuSemaphore with QemuEvent
migration/colo: Replace QemuSemaphore with QemuEvent
migration: Replace QemuSemaphore with QemuEvent
qemu-thread: Document QemuEvent
qemu-thread: Use futex if available for QemuLockCnt
qemu-thread: Use futex for QemuEvent on Windows
qemu-thread: Avoid futex abstraction for non-Linux
qemu-thread: Replace __linux__ with CONFIG_LINUX
futex: Support Windows
futex: Check value after qemu_futex_wait()
i386/kvm: Prefault memory on page state change
rust: make TryFrom macro more resilient
docs: update Rust module status
rust/hpet: Drop BqlCell wrapper for num_timers
rust/hpet: return errors from realize if properties are incorrect
...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
Peter Maydell [Mon, 19 May 2025 14:51:13 +0000 (15:51 +0100)]
target/i386: Wire up MXCSR.DE and FPUS.DE correctly
The x86 DE bit in the FPU and MXCSR status is supposed to be set
when an input denormal is consumed. We didn't previously report
this from softfloat, so the x86 code either simply didn't set
the DE bit or else incorrectly wired it up to denormal_flushed,
depending on which register you looked at.
Now we have input_denormal_used we can wire up these DE bits
with the semantics they are supposed to have.
Peter Maydell [Mon, 19 May 2025 14:51:12 +0000 (15:51 +0100)]
target/i386: Use correct type for get_float_exception_flags() values
The softfloat get_float_exception_flags() function returns 'int', but
in various places in target/i386 we incorrectly store the returned
value into a uint8_t. This currently has no ill effects because i386
doesn't care about any of the float_flag enum values above 0x40.
However, we want to start using float_flag_input_denormal_used, which
is 0x4000.
Switch to using 'int' so that we can handle all the possible valid
float_flag_* values. This includes changing the return type of
save_exception_flags() and the argument to merge_exception_flags().
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Zhao Liu <zhao1.liu@intel.com> Link: https://lore.kernel.org/r/20250519145114.2786534-3-peter.maydell@linaro.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Peter Maydell [Mon, 19 May 2025 14:51:11 +0000 (15:51 +0100)]
target/i386: Detect flush-to-zero after rounding
The Intel SDM section 10.2.3.3 on the MXCSR.FTZ bit says that we
flush outputs to zero when we detect underflow, which is after
rounding. Set the detect_ftz flag accordingly.
This allows us to enable the test in fma.c which checks this
behaviour.
Akihiko Odaki [Mon, 26 May 2025 05:29:13 +0000 (14:29 +0900)]
qemu-thread: Use futex for QemuEvent on Windows
Use the futex-based implementation of QemuEvent on Windows to
remove code duplication and remove the overhead of event object
construction and destruction.
projects / thirdparty / qemu.git / log
