Andrew Goodbody [Wed, 1 Oct 2025 10:05:10 +0000 (11:05 +0100)]
video: nexell: unsigned parameter cannot be negative
The parameter 'alpha' is declared as an unsigned type so cannot be
negative. The code to test it as being less than zero will always fail
and so is redundant and should be removed.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Stefan Bosch <stefan_b@posteo.net> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
Tom Rini [Mon, 2 Feb 2026 20:24:56 +0000 (14:24 -0600)]
Merge patch series "m68k: Add support for QEMU virt machine"
Kuan-Wei Chiu <visitorckw@gmail.com> says:
Add support for the QEMU 'virt' machine on the m68k architecture. The
QEMU virt machine models a generic system utilizing Goldfish virtual
peripherals and is capable of emulating various classic 68k CPUs.
Currently, U-Boot's m68k architecture support focuses on ColdFire
variants. This series expands support to include the classic M680x0
architecture, implementing the necessary exception vectors, startup
code, and a bootinfo parser compatible with the QEMU interface.
Drivers for Goldfish peripherals (TTY, Timer, RTC) and the QEMU
Virtual System Controller (sysreset) are also added to enable serial
console, timekeeping, and system reset functionality.
The implementation has been verified on QEMU targeting the M68040 CPU,
confirming successful hardware initialization and boot to the U-Boot
command shell. Additionally, the CI configuration was verified locally
using gitlab-ci-local "qemu_m68k_virt test.py", resulting in
PASS qemu_m68k_virt test.py.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:37 +0000 (20:18 +0000)]
MAINTAINERS: Update m68k entry
Rename the "COLDFIRE" entry to "M68K" to reflect that the architecture
support now encompasses traditional m680x0 CPUs (e.g., M68040) in
addition to ColdFire platforms.
Remove Huan Wang from the maintainers list as she is no longer active,
as suggested by Angelo Dureghello.
Add myself as a co-maintainer to assist with reviewing and testing
m68k-related patches.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:36 +0000 (20:18 +0000)]
CI: Add test jobs for QEMU m68k virt machine
Enable CI testing for the newly introduced QEMU m68k 'virt' board on
both GitLab CI and Azure Pipelines. This ensures the new M68040
architecture support is built and booted correctly in the emulated
environment.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:35 +0000 (20:18 +0000)]
board: Add QEMU m68k virt board support
Add support for the QEMU 'virt' machine on the m68k architecture. This
board emulates a generic machine based on the Motorola 68040 CPU
equipped with Goldfish virtual peripherals.
Introduce the necessary board configuration and initialization
infrastructure. The implementation includes logic to parse the QEMU
bootinfo interface, enabling dynamic detection of system RAM size to
adapt to the virtual machine's configuration.
Enable the Goldfish TTY driver for serial console output. Additionally,
enable Goldfish RTC and timer drivers to support real-time clock
functionality and nanosecond-resolution delays. Include comprehensive
documentation covering build instructions and usage examples.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Tested-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:34 +0000 (20:18 +0000)]
m68k: Add support for M68040 CPU
Add support for the Motorola 68040 architecture. Currently, m68k
support in U-Boot is primarily focused on ColdFire variants. Introduce
the necessary infrastructure to support the classic M680x0 series,
specifically targeting the M68040 as emulated by QEMU.
The implementation includes exception vectors, early startup code, and
minimal CPU initialization and relocation stubs. It also defines the
standard m68k boot information structure used for passing hardware
information to the operating system. To ensure compatibility, ColdFire-
specific library objects such as cache and interrupt handling are
excluded from the build when M68040 is selected.
Additionally, apply a specific workaround during the early memory
reservation stage. Use a manual loop to clear global data instead of
the standard memset() function, as utilizing memset() at this point was
observed to cause a hang on the QEMU platform.
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:33 +0000 (20:18 +0000)]
sysreset: Add QEMU virtual system controller driver
Introduce a new sysreset driver for the QEMU Virtual System Controller.
This device is found on QEMU "virt" machines (such as the m68k virt
target) and provides a mechanism to trigger system reset and power-off
events.
The driver maps U-Boot sysreset types to the corresponding controller
commands:
- SYSRESET_WARM / SYSRESET_COLD -> VIRT_CTRL_CMD_RESET
- SYSRESET_POWER_OFF -> VIRT_CTRL_CMD_HALT
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Simon Glass <simon.glass@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:32 +0000 (20:18 +0000)]
rtc: goldfish: Support platform data for non-DT probing
Currently, the Goldfish RTC driver exclusively relies on device tree
to retrieve the base address, failing immediately if dev_read_addr()
returns FDT_ADDR_T_NONE. This restriction prevents the driver from
being used on platforms that instantiate devices via U_BOOT_DRVINFO()
instead of device tree, such as the QEMU m68k virt machine.
Add support for platform data to address this limitation. Introduce a
new .of_to_plat hook to handle device tree parsing and populate the
platform data. Update the probe function to rely exclusively on this
platform data, enabling support for both Device Tree and manual
instantiation.
Introduce a new header file include/goldfish_rtc.h to define the
platform data structure.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:31 +0000 (20:18 +0000)]
timer: Add Goldfish timer driver
Add support for the Goldfish timer driver. This driver utilizes the
Goldfish RTC hardware to provide a nanosecond-resolution timer. This
virtual device is commonly found in QEMU virtual machines (such as the
m68k virt machine) and Android emulators.
The driver implements the standard U-Boot timer UCLASS interface,
exposing a 64-bit monotonically increasing counter with a 1GHz clock
rate derived from the RTC registers.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Tested-by: Daniel Palmer <daniel@0x0f.com> Reviewed-by: Yao Zi <me@ziyao.cc> Reviewed-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Angelo Dureghello <angelo@kernel-space.org>
Kuan-Wei Chiu [Wed, 7 Jan 2026 20:18:30 +0000 (20:18 +0000)]
serial: Add Goldfish TTY driver
Add support for the Google Goldfish TTY serial device. This virtual
device is commonly used in QEMU virtual machines (such as the m68k
virt machine) and Android emulators.
The driver implements basic console output and input polling using the
Goldfish MMIO interface.
Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Reviewed-by: Yao Zi <me@ziyao.cc> Tested-by: Daniel Palmer <daniel@0x0f.com> Acked-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com> Reviewed-by: Simon Glass <simon.glass@canonical.com> Acked-by: Angelo Dureghello <angelo@kernel-space.org>
Tom Rini [Mon, 2 Feb 2026 19:39:52 +0000 (13:39 -0600)]
Merge patch series "arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs"
This series from Dominik Haller <d.haller@phytec.de> provides a way for
TI K3 platforms to determine their boot device outside of SPL and then
adds support for the PHYTEC phyCORE-AM68x/TDA4x SoM.
Dominik Haller [Fri, 16 Jan 2026 01:41:11 +0000 (17:41 -0800)]
arm: mach-k3: j721s2: Provide a way to obtain boot device for non SPLs
Introduce get_boot_device() to obtain the booting device. Make it also
available for non SPL builds so u-boot can also know the device it
is booting from.
Marek Vasut [Thu, 29 Jan 2026 03:53:29 +0000 (04:53 +0100)]
mkimage: fit: align DTs in external data to 8 Bytes by default
Unless specified otherwise using the mkimage -B n option, align
DTs in fitImage external data to 8 Bytes, and retain alignment
of everything else to 4 Bytes. This should fulfill the DTspec
requirement, that DTs must be placed at 8 Byte aligned addresses,
even for DTs that are part of fitImage with external data. For
fitImage with embedded data, there is nothing we can do, as the
embedded data are aligned to 4 Bytes, just like any other DT
property.
Replace fdtdec_get_child_count() counting of images with counting
of padding using fdt_for_each_subnode(). This is much more useful,
as the added up padding can be passed directly to calloc() when
allocating the buffer which holds the external data. The image
count is no longer needed.
Adjust the image layouting such, that buf_ptr is incremented to
place the next image at align_size aligned offset. This is done
at the beginning of the loop, once the align_size for current
image can be determined from the current image type.
Update binman test to validate the new 8 Byte alignment.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Andrew Goodbody [Tue, 30 Sep 2025 16:43:46 +0000 (17:43 +0100)]
video: exynos: node variable should not be unsigned
THe variable 'node' is assigned a value of an int, tested for being less
than or equal to zero then passed as an argument to a function that
takes an int so 'node' should not be unsigned. Fix it.
This issue was found by Smatch.
Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org>
ARM: dts: add dtsi for exynos7870-on7xelte (Samsung Galaxy J7 Prime)
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
ARM: dts: add dtsi for exynos7870-j6lte (Samsung Galaxy J6)
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
ARM: dts: add dtsi for exynos7870-a2corelte (Samsung Galaxy A2 Core)
Add a framebuffer node to the DTSI in order to ensure that display
continues to work, as since v6.19 of devicetree-rebasing sources, it
uses Samsung's DECON (Display Enhancement CONtroller) for display, which
is, as of yet, not supported in U-Boot.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Signed-off-by: Minkyu Kang <mk7.kang@samsung.com>
David Lechner [Thu, 29 Jan 2026 20:03:41 +0000 (14:03 -0600)]
boot/fit: print error name in boot_get_fdt_fit()
Print the actual error code in a couple of places in boot_get_fdt_fit().
These are FDT error codes, not errno, so printing the string is more
helpful than printing the numeric value.
The only caller of boot_get_fdt_fit() unconditionally replaces the
returned error code (fdt_noffset) with ENOENT so the actual error would
otherwise be lost.
Signed-off-by: David Lechner <dlechner@baylibre.com>
Jonas Karlman [Thu, 29 Jan 2026 19:52:05 +0000 (19:52 +0000)]
usb: gadget: dwc2: Move dr_mode check from of_to_plat() to bind()
Rockchip RK3288 and RK3506 contain two DWC2 USB controllers, typically
one controller use dr_mode=otg and the other one use dr_mode=host.
With USB_GADGET_DWC2_OTG, DM_USB_GADGET and USB_DWC2 enabled this result
in the dwc2-udc-otg driver binding to both controllers, however only one
will probe due to use of dr_mode=host on the other one.
After the commit 6668b8e7cc68 ("dm: core: Support multiple drivers with
same compatibles") it is possible to bind one controller to the
dwc2-udc-otg driver and the other one to the dwc2_usb driver.
Move the dr_mode check from of_to_plat() to bind() to allow dm core to
bind the dwc2 host driver to dr_mode=host controllers.
Chris Morgan [Thu, 15 Jan 2026 23:01:35 +0000 (17:01 -0600)]
usb: dwc3: core: improve reset sequence
According to Synopsys Databook, we shouldn't be
relying on GCTL.CORESOFTRESET bit as that's only for
debugging purposes. Instead, let's use DCTL.CSFTRST
if we're OTG or PERIPHERAL mode.
Host side block will be reset by XHCI driver if
necessary. Note that this reduces amount of time
spent on dwc3_probe() by a long margin.
We're still gonna wait for reset to finish for a
long time (default to 1ms max), but tests show that
the reset polling loop executed at most 19 times
(modprobe dwc3 && modprobe -r dwc3 executed 1000
times in a row).
Note that this patch was submitted to Linux in 2016 [1], however I can
confirm it is needed to support gadget mode in U-Boot on my device.
While I am referencing this patch from Linux I am in fact taking the
full existing dwc3_core_soft_reset() function from Linux as it exists
in v6.19-rc5, so it may differ slightly from the information in the
2016 patch.
Chris Morgan [Thu, 15 Jan 2026 23:01:34 +0000 (17:01 -0600)]
usb: dwc3: gadget: Don't send unintended link state change
DCTL.ULSTCHNGREQ is a write-only field. When doing a read-modify-write
to DCTL, the driver must make sure that there's no unintended link state
change request from whatever is read from DCTL.ULSTCHNGREQ. Set link
state change to no-action when the driver writes to DCTL.
Note that this patch was submitted upstream in Linux in 2020 [1],
and I've confirmed I need it in U-Boot to enable gadget mode.
Chris Morgan [Thu, 15 Jan 2026 23:01:33 +0000 (17:01 -0600)]
usb: dwc3: Increase DWC3 controller halt timeout
Since EP0 transactions need to be completed before the controller halt
sequence is finished, this may take some time depending on the host and the
enabled functions. Increase the controller halt timeout, so that we give
the controller sufficient time to handle EP0 transfers.
This patch was originally submitted to Linux in 2022, but is required to
use USB gadget mode on my device in U-Boot.
Chris Morgan [Thu, 15 Jan 2026 23:01:32 +0000 (17:01 -0600)]
usb: dwc3: core: Add ip and version_type support from Linux
Add support for the ip and version_type fields from the Linux
version of the dwc3 driver. Included in this is support for a
few additional macros in the header from Linux as well.
dts: add Exynos vendor support for OF_UPSTREAM_VENDOR
When building Exynos boards, configure OF_UPSTREAM_VENDOR to build all
device trees in:
- "samsung/" for 32-bit ARM platforms.
- "exynos/" for 64-bit ARM platforms.
Signed-off-by: Kaustabh Chakraborty <kauschluss@disroot.org> Reviewed-by: Tom Rini <trini@konsulko.com>
Anshul Dalal [Thu, 22 Jan 2026 07:19:56 +0000 (12:49 +0530)]
mach-k3: am64x: add support for speed grades
With the support for common speed grade configuration added in commit 65a6b83a9b7f ("mach-k3: refactor A53 speed grade clock-rate fixup"),
this patch extends the support to AM64x SoCs.
Tom Rini [Thu, 29 Jan 2026 15:00:01 +0000 (09:00 -0600)]
Merge tag 'u-boot-stm32-20260129' of https://source.denx.de/u-boot/custodians/u-boot-stm
- spi: stm32: OSPI and QSPI optimization
- Update stm32 clock drivers to restore boot for STM32MP13/STM32MP2
board family
- Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
- Use CONFIG_STM32MP15X to discern STM32MP15xx on DH STM32MP15xx DHSOM
- Reinstate missing SPL configs for DH STM32MP15xx DHSOM
- stm32mp2 boards: read boot index from backup register
- video: simple_panel: add support for "rocktech,rk043fn48h" display
- Add .of_to_plat callback in stm32_ltdc driver
Tom Rini [Wed, 28 Jan 2026 19:26:17 +0000 (13:26 -0600)]
misc: Keep FSL_IFC available on PowerPC as well
This symbol is used on a number of PowerPC platforms as well, so make it
available there again.
Fixes: 424b324165ea ("armv7: Add CPLD support via IFC to the ls1021a-iot board.") Acked-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Dario Binacchi [Sun, 18 Jan 2026 10:48:43 +0000 (11:48 +0100)]
board: stm32mp2: read boot index from backup register
Following the 'commit 95b5a7de30f6 ("FWU: STM32MP1: Add support to
read boot index from backup register")', this patch enables reading
the boot index from backup registers on STM32MP2 platforms.
Patrice Chotard [Fri, 16 Jan 2026 19:12:06 +0000 (20:12 +0100)]
ARM: dts: stm32: Add bootph-all in ltdc node in stm32mp257f-ev1-u-boot
Add bootph-all property in ltdc node in stm32mp257f-ev1-u-boot.dtsi
to fix the following issue :
Video device 'display-controller@48010000' cannot allocate frame buffer
memory - ensure the device is set up beforen
stm32_rifsc bus@42080000: display-controller@48010000 failed to bind on
bus (-28)
stm32_rifsc bus@42080000: Some child failed to bind (-28)
initcall_run_r(): initcall initr_dm() failed
ERROR ### Please RESET the board ###
Fixes: 29ab19c2bead ("Subtree merge tag 'v6.18-dts' of dts repo [1] into dts/upstream") Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Fri, 16 Jan 2026 18:57:27 +0000 (19:57 +0100)]
clk: stm32: Update clock management for STM32MP13/25
During clock's registration, clock's name are used to establish parent -
child relation. On STM32MP13 and STM32MP25, most of SCMI clocks are parent
clocks.
Since commit fdb1bffe2827 ("clk: scmi: Postpone clock name resolution"),
all scmi clocks are named by default "scmi-%zu" until they are enabled,
it breaks clocks registration and boot process for STM32MP13/25
platforms.
Rework the STM32 core clock driver and STM32MP13/25 clock description
to use clock index instead of their real name.
Introduce struct clk_parent_data which allows to identify parent clock
either by index or by name. Name is only used for particular clocks
provided by IP which are clock provider as i2s/i2s_ckin, usb0/ck_usbo_48m,
and ltdc/ck_ker_ltdc.
STM32_GATE() and STM32_COMPOSITE_NOMUX macros are updated in order to
use parent clock index.
As STM32MP13 supports both SPL and SCMI boot, keep using an array
with clock's name for SPL.
Fixes: fdb1bffe2827 ("clk: scmi: Postpone clock name resolution") Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Tue, 16 Dec 2025 15:31:54 +0000 (16:31 +0100)]
spi: stm32-qspi: Optimize FIFO accesses using u16 or u32
FIFO accesses uses u8 only for read/write.
In order to optimize throughput, add u16 or u32 read/write
accesses when possible.
Set FIFO threshold level value accordingly.
Test performed by writing and reading 64MB on sNOR on
stm32mp157c-ev1 board:
before after ratio
Write : 428 KB/s 719 KB/s +68%
Read : 520 KB/s 3200 KB/s +615%
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Tue, 16 Dec 2025 15:31:53 +0000 (16:31 +0100)]
spi: stm32-qspi: Increase read throughput in indirect mode
When WATCHDOG_RESET() was replaced by schedule() in commit 29caf9305b6f ("cyclic: Use schedule() instead of WATCHDOG_RESET()")
we not only reset the watchdog but also call the cyclic infrastructure
which takes time and has impact on read accesses performances.
Move schedule() from _stm32_qspi_read_fifo() to _stm32_qspi_poll()
and call schedule() only every 1MB chunk of data.
Test performed by reading 64MB on sNOR on stm32mp157c-ev1 board:
before after ratio
Read : 201 KB/s 520KB/s +258%
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Patrice Chotard [Tue, 16 Dec 2025 15:31:52 +0000 (16:31 +0100)]
spi: stm32-ospi: Increase read throughput in indirect mode
Schedule() is called every u8/u16 or u32 read accesses which is overkill.
Move schedule() from stm32_ospi_read_fifo() to stm32_ospi_tx_poll()
and call schedule() only every 1MB chunk of data.
Test performed by reading 64MB on sNOR on stm32mp257f-ev1 board:
before after ratio
Read : 10.6MB/s 14.2MB/s +34%
Reviewed-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com>
Tom Rini [Wed, 28 Jan 2026 23:04:34 +0000 (17:04 -0600)]
Merge tag 'doc-2026-04-rc2' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2026-04-rc2
Documentation:
* describe QEMU VGA emulation
* development process
- Move the existing block about patch application
- Rework the custodian feedback section
- Explain when/how Custodians may edit patches
- Move Custodians section
- Make "Work flow of a Custodian" a subsection
- Document using b4 and patchwork for custodians
* develop: codingstyle: Update b4 external link
* develop: sending_patches: Update link to patchwork
Francois Berder [Mon, 19 Jan 2026 14:49:06 +0000 (15:49 +0100)]
tools: Handle realloc failure in strlist_add
If realloc fails, list->strings was set to NULL and
it would create a leak. This commit ensures that if we cannot
add a string to the list, the list stays in a good state.
Tom Rini [Tue, 20 Jan 2026 22:31:46 +0000 (16:31 -0600)]
doc: develop: process: Document using b4 and patchwork for custodians
- We already have good custodian documentation for patchwork, add a
reference and then link to it here.
- Add a reference to the existing b4 documentation, and reference it
here.
- Note and link to patchwork integration, am/shazam and ty features of
b4 as these are the most likely useful portions. Be specific about
keeping the default ${summary} as that includes important information.
Tom Rini [Tue, 20 Jan 2026 22:31:44 +0000 (16:31 -0600)]
doc: develop: codingstyle: Update b4 external link
Rather than pointing at the source code for b4, point the the official
documentation. Also, use an anonymous reference for the link, per rST
best practices.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Tue, 20 Jan 2026 20:11:45 +0000 (14:11 -0600)]
doc: develop: process: Explain when/how Custodians may edit patches
As seen with commit d503633a3676 ("Revert "doc: board: starfive: update
jh7110 common description""), it has not always been clear what is and
isn't allowed by custodians, and what the expectations are. To prevent
further unintentional conflicts, document the limited cases where
custodians are allowed to modify patches directly, and how to do that.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Tue, 20 Jan 2026 20:11:43 +0000 (14:11 -0600)]
doc: develop: process: Move the existing block about patch application
We have a long block about the expectations and feedback about a patch
applying, or not, as part of the Custodian workflow. Move this to the
Custodians section from the Workflow of a custodian section.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Tom Rini [Tue, 27 Jan 2026 21:31:49 +0000 (15:31 -0600)]
arm: Remove rel.dyn from SPL linker scripts
As of v2026.01, no platforms contain any rel.dyn sections in their xPL
phase images. Their inclusion in linker scripts initially was an
oversight as part of taking the full U-Boot linker scripts and modifying
them down. Then in commit 8b0ebe054bb3 ("arm: Update linker scripts to
ensure appended device tree is aligned") these sections were used to
force correct alignment for the device tree. This however, lead to a
different problem.
That problem is that when we do not have a separate BSS section in SPL
we instead would overlay the BSS with the rel.dyn section, in the common
linker script case. This in turn lead to creating an incorrectly sized
BSS "pad" file sometimes (depending on arbitrary changes within the rest
of the binary itself). This in turn lead to the dtb being in the wrong
location in the binary and not found at run time.
This commit fixes a few things:
- Remove the rel.dyn section from all ARM SPL linker scripts.
- In turn, this moves the dtb alignment statement in to another section.
- For ast2600 which uses CONFIG_POSITION_INDEPENDENT we need to keep the
symbols however.
Tested-by: Fabio Estevam <festevam@gmail.com> Reported-by: Fabio Estevam <festevam@gmail.com> Co-developed-by: Ilias Apalodimas <ilias.apalodimas@linaro.org> Reviewed-by: Chia-Wei, Wang <chiawei_wang@aspeedtech.com> Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Wed, 28 Jan 2026 15:21:17 +0000 (09:21 -0600)]
Merge patch series "dm: core: Support same compatible in host/gadget musb drivers"
Markus Schneider-Pargmann (TI.com) <msp@baylibre.com> says:
musb currently uses a wrapper driver that binds on the parent device of
the actual musb devices to manage the differentiation between gadget and
host modes. However in the upstream devicetree this parent devicetree
node can not be used to match the wrapper driver.
To be able to probe the musb devices in host/gadget mode directly, this
series introduces support for returning -ENODEV in bind functions
resulting in iterating the remaining drivers potentially binding to
other drivers that match the compatible.
The loop in lists_bind_fdt uses an indented style for log messages
within the loop and normal messages for errors that lead to the exit of
the function. Due to the change of the previous patch that adds support
for continuation on -ENODEV returned by bind, the log message should be
indented.
Signed-off-by: Markus Schneider-Pargmann (TI) <msp@baylibre.com>
dm: core: Support multiple drivers with same compatibles
Currently once a driver matched the compatible string of a device, other
drivers are ignored. If the first matching driver returns -ENODEV, no
other possibly matching drivers are iterated with that compatible of the
device. Instead the next compatible in the list of compatibles is
selected, assuming only one driver matches one compatible at a time.
To be able to use the bind function to return -ENODEV and continue
matching other drivers with the same compatible, move the for loop a bit
to continue the for loop after -ENODEV was returned. The loop had to be
adjusted a bit to still support the 'drv' argument properly. Some
simplifications were done as well.
The modification will only add additional loop iterations if -ENODEV is
returned. Otherwise the exit and continue conditions for the loop stay
the same and do not cause any additional iterations and should not
impact performance.
This is required for ti-musb-host and ti-musb-peripheral which both
match on the same device but differ based on the dr_mode DT property.
Depending on this property, the driver is either UCLASS_USB or
UCLASS_USB_GADGET_GENERIC. By checking the DT property in the bind
function and returning -ENODEV the other driver can probe instead.
Reviewed-by: Simon Glass <simon.glass@canonical.com> Acked-by: Dinesh Maniyam <dinesh.maniyam@altera.com> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
'found' is only used at the end of the function to print a debug
message. No need to maintain a variable if we can just return 0
immediately when a driver was bound successfully.
Reviewed-by: Simon Glass <simon.glass@canonical.com> Reviewed-by: Mattijs Korpershoek <mkorpershoek@kernel.org> Signed-off-by: Markus Schneider-Pargmann (TI.com) <msp@baylibre.com>
Alice Guo [Fri, 23 Jan 2026 07:54:06 +0000 (15:54 +0800)]
board: nxp: Rename board directory from board/freescale to board/nxp
This patch renames the board directory from board/freescale to
board/nxp because NXP now provides Board Support Packages (BSPs) and
tools for the former Freescale i.MX and other i.MX products.
All relevant references have been updated accordingly. This change does
not affect functionality.
Signed-off-by: Alice Guo <alice.guo@nxp.com> Reviewed-by: Fabio Estevam <festevam@gmail.com>
Janne Grunau [Fri, 16 Jan 2026 13:44:46 +0000 (14:44 +0100)]
configs: apple: Enable SMBIOS / sysinfo
Enable verbose SMBIOS table generation so that user space applications
can use the SMBIOS table to provide details about the system. The
desired information is chassis-type to determine whether the system is
laptop.
Adding the chassis-type property is proposed for the upstream device
trees in the Linux kernel in [1].
Enable CMD_SMBIOS as debugging aid as the platform can easily deal with
large u-boot binaries.
Tom Rini [Sun, 18 Jan 2026 19:56:10 +0000 (13:56 -0600)]
fit: Rework SPL_LOAD_FIT_ADDRESS slightly
Options which deal with memory locations and have a default value of 0x0
are dangerous, as that is often not a valid memory location. Rework
SPL_LOAD_FIT_ADDRESS as follows:
- Add SPL_HAS_LOAD_FIT_ADDRESS to guard prompting the question as the
case of loading a FIT image does not strictly require setting an
address and allows for a malloc()'d area to be used.
- For SPL_RAM_SUPPORT, select the new guard symbol if SPL_LOAD_FIT is
enabled because in that case an address must be provided.
- Update defconfigs for these new changes. Largely this means some
defconfigs need to enable SPL_HAS_LOAD_FIT_ADDRESS to maintain their
current status. In the case of sandbox, we also need to set
SPL_LOAD_FIT_ADDRESS to 0x0.
Anshul Dalal [Tue, 20 Jan 2026 04:34:28 +0000 (10:04 +0530)]
Kconfig: select SPL_USE_TINY_PRINTF_POINTER_SUPPORT for K3
Since the commit 1e24e84db41a ("tiny-printf: Handle formatting of %p
with an extra Kconfig"), SPL_USE_TINY_PRINTF_POINTER_SUPPORT has been
made mandatory in order to use %p which would earlier have defaulted to
a 'long' print.
Without this config symbol, k3_sysfw_dfu_download fails to set the
correct value for the DFU string with:
Tom Rini [Mon, 12 Jan 2026 17:05:11 +0000 (11:05 -0600)]
bootm: Remove BOOTM_NETBSD from defaults
After talking with someone from the NetBSD project, platforms that do
not boot with a device tree (and so would be using our BOOTM_NETBSD
support) a very few in number. So we can remove this option from being
enabled by default and save a little space in most places with platforms
that need it still being able to re-enable it, if needed. Ideally, in a
few years we can instead just remove the code entirely.
scsi: ufs: renesas: Remove register control helper function
After refactoring the code, ufs_renesas_reg_control() is no longer needed,
because all operations are simple and can be called directly. Remove the
ufs_renesas_reg_control() helper function, and call udelay() directly.
Ported from Linux kernel commit 855bde8ce5bc ("scsi: ufs: renesas: Remove register control helper function")
with replaced readl_poll_timeout_atomic() with readl_poll_sleep_timeout().
scsi: ufs: renesas: Add register read to remove save/set/restore
Add support for returning read register values from
ufs_renesas_reg_control(), so ufs_renesas_set_phy() can use the existing
ufs_renesas_write_phy() helper. Remove the now unused code to save to,
set, and restore from a static array inside ufs_renesas_reg_control().
Ported from Linux kernel commit 5129aa627599 ("scsi: ufs: renesas: Add register read to remove save/set/restore")
scsi: ufs: renesas: Replace init data by init code
Since initialization of the UFS controller on R-Car S4-8 ES1.0 requires
only static values, the driver uses initialization data stored in the const
ufs_param[] array. However, other UFS controller variants (R-Car S4-8
ES1.2) require dynamic values, like those obtained from E-FUSE. Refactor
the initialization code to prepare for this.
This also reduces kernel size by almost 30 KiB.
Ported from Linux kernel commit c4e83573c3d0 ("scsi: ufs: renesas: Replace init data by init code")
Tom Rini [Tue, 27 Jan 2026 15:29:03 +0000 (09:29 -0600)]
Revert a number of incorrect commits
As part of debugging the appended device tree failure, I inadvertently
committed some changes as I was debugging to master, and not a private
branch, and pushed them as part of the release.
Tom Rini [Mon, 26 Jan 2026 16:28:32 +0000 (10:28 -0600)]
arm: spl: Correct alignment of .rel.dyn section
With commit 0535e46d55d7 ("scripts/dtc: Update to upstream version v1.7.2-35-g52f07dcca47c") we now require the correct, 8 byte alignment
of a device tree in order to work with it ourselves. This has exposed a
number of issues. In the case of using arch/arm/cpu/u-boot-spl.lds for
an xPL phase and having the BSS be overlayed with the dynamic
relocations sections (here, .rel.dyn) we had missed adding the comment
about our asm memset requirements. Then, when adjusting ALIGN statements
we later missed this one. In turn, when we use objcopy to create our
binary image we end up in the situation where
where the BSS must start out 8 byte aligned as
well as end 8 byte aligned because for appended device tree the
requirement is that the whole BSS (which we add as padding to the
binary) must be 8 byte aligned. Otherwise we end up with the situation
where __bss_end (where we look for the device tree at run time) is
aligned but the size of the BSS we add
Fixes: 7828a1eeb2a1 ("arm: remove redundant section alignments") Fixes: 52caad0d14a3 ("ARM: Align image end to 8 bytes to fit DT alignment") Reported-by: Fabio Estevam <festevam@gmail.com> Tested-by: Fabio Estevam <festevam@gmail.com> Signed-off-by: Tom Rini <trini@konsulko.com>
--- Cc: Ilias Apalodimas <ilias.apalodimas@linaro.org> Cc: Marek Vasut <marek.vasut@mailbox.org>
Tom Rini [Mon, 26 Jan 2026 15:09:16 +0000 (09:09 -0600)]
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sunxi
Some improvements for some boards' DRAM setup, to allow boards with
"odd" DRAM sizes (1.5GB or 3GB), and to support the T113-s4 with double
the co-packaged DRAM. Support for a new board (X96Q TV box), and a fix
for the DT name prefix. Also we support the new AXP318W PMIC, which is
used on new boards with the A733 SoC. There are some preliminary support
patches for this SoC, but they are not quite ready yet - though maybe I
push some uncontroversial ones a bit later still.
J. Neuschäfer [Tue, 20 Jan 2026 15:20:38 +0000 (16:20 +0100)]
board: sunxi: Add X96Q support
The X96Q is a set-top box with an H313 SoC, AXP305 PMIC, 1 or 2 GiB RAM,
8 or 16 GiB eMMC flash, 2x USB A, Micro-SD, HDMI, Ethernet, audio/video
output, and infrared input.
This commit adds a defconfig and some documentation. The devicetree is
already in dts/upstream.
The CONFIG_DRAM_SUNXI_* settings are chosen such that the register
values in the DRAM PHY's MMIO space are as close as possible to those
observed when booting with the preinstalled vendor U-Boot. The DRAM
clock frequency of 600 MHz was reported in the vendor U-Boot's output.
Signed-off-by: J. Neuschäfer <j.ne@posteo.net> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Yixun Lan [Tue, 13 Jan 2026 04:01:55 +0000 (12:01 +0800)]
power: regulator: add AXP318W support
The PMIC is also known as AXP819 in vendor pmu code
For DCDC6, 8, 9, the underlying hardware support more than two levels
voltage step tuning, but for now only first two levels are implemented
in this driver, hence highest voltage will be limited at seccond level.
It actual meets board requirement in current design, and we've verified
it in Radxa Cubie A7A board.
Following are detail explanation of voltage tuning stpes for those DCDCs:
DCDC | voltage range | units | steps | implemented
6 | 0.5 - 1.2 | 10 mV | 71 | Y
. | 1.22 - 1.54 | 20 mV | 17 | Y
. | 1.8 - 2.4 | 20 mV | 31 | N
. | 2.44 - 2.76 | 40 mV | 9 | N
--------------------------------------------------
8/9 | 0.5 - 1.2 | 10 mV | 71 | Y
. | 1.22 - 1.84 | 20 mV | 32 | Y
. | 1.9 - 3.4 | 100mV | 16 | N
Signed-off-by: Yixun Lan <dlan@gentoo.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Bohdan Chubuk [Sun, 23 Nov 2025 20:43:46 +0000 (22:43 +0200)]
sunxi: avoid double vendor prefix when CONFIG_OF_UPSTREAM is enabled
When CONFIG_OF_UPSTREAM is enabled, the device tree name provided by SPL
already includes the vendor directory (e.g., "allwinner/board-name").
The existing logic in misc_init_r() unconditionally prepends "allwinner/"
for ARM64 builds, resulting in an incorrect path like
"allwinner/allwinner/board-name.dtb".
This patch modifies the logic to only prepend the vendor prefix if
CONFIG_OF_UPSTREAM is NOT enabled. This ensures compatibility with both
legacy builds and the new upstream devicetree structure.
Signed-off-by: Bohdan Chubuk <chbgdn@gmail.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Andre Przywara [Tue, 21 Oct 2025 23:53:34 +0000 (00:53 +0100)]
sunxi: dram: detect non-power-of-2 sized DRAM chips
Some boards feature an "odd" DRAM size, where the total RAM is 1.5GB or
3GB. Our existing DRAM size detection routines can only detect power-of-2
sized configuration, and on those boards the DRAM size is overestimated,
so this typically breaks the boot quite early.
There doesn't seem to be an easy explicit way to detect those odd-sized
chips, but we can test whether the later part of the memory behaves like
memory, by verifying that a written pattern can be read back.
Experiments show that there is no aliasing effect here, as all locations
in the unimplemented range always return some fixed pattern, and cannot
be changed.
Also so far all those boards use a factor of 3 of some lower power-of-2
number, or 3/4th of some higher number. The size detection routine
discovers the higher number, so we can check for some memory cells beyond
75% of the detected size to be legit.
Add a routine the inverts all bits at a given location in memory, and
reads that back to prove that the new value was stored.
Then test the memory cell at exactly 3/4th of the detected size, and cap
the size of the memory to 75% when this test fails. For good measure
also make sure that memory just below the assumed memory end really
works.
This enables boards which ship with such odd memory sizes.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Lukas Schmid [Sun, 26 Oct 2025 11:41:17 +0000 (12:41 +0100)]
sunxi: extend R528/T113-s3/D1(s) DRAM initialisation
The T113-s4 SoC is using the same die as the T113-s3, but comes with
256MiB of co-packaged DRAM. Besides the doubled size, the DRAM chip
seems to be connected slightly differently, which requires to use a
different pin remapping.
Extend the DRAM initialisation code to add support for the T113-S4 aka
T113M4020DC0 by checking the SoC's CHIPID, which is stored in the first
word of the SID efuses.
Signed-off-by: Lukas Schmid <lukas.schmid@netcube.li> Tested-by: John Watts <contact@jookia.org> Reviewed-by: John Watts <contact@jookia.org> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Signed-off-by: Andre Przywara <andre.przywara@arm.com>