Michal Simek [Wed, 26 Feb 2025 22:35:45 +0000 (16:35 -0600)]
xilinx: dfu: Fill directly update_info.dfu_string
Directly fill update_info.dfu_string to prepare platforms to switch
from using dfu_alt_info variable to dfu_string which contains description
for capsule update when switch is done.
Luke Wang [Tue, 25 Mar 2025 08:29:14 +0000 (16:29 +0800)]
mmc: mmc_boot: Support Sandisk and Micron eMMC BOOT/RPMB hardware partition resizing
Current mmc bootpart-resize command only support Samsung eMMC BOOT/RPMB
hardware partition resizing. Add Sandisk and Micron eMMC BOOT/RPMB hardware
partition resizing support. The commands and parameters for resizing
partitions are different for each manufacturer. Select the corresponding
function according to CID.
Signed-off-by: Luke Wang <ziniu.wang_1@nxp.com> Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Simon Glass [Sun, 16 Feb 2025 12:55:59 +0000 (05:55 -0700)]
mmc: Avoid uniniting twice
Each MMC device has a child which ihs a block device. At present we call
mmc_deinit() when the block device is removed.
But the MMC struct (i.e. struct mmc) is attached to the MMC's device,
not its child.
So at present, when an MMC device is removed, mmc_deinit() is called
twice, once for the MMC device and once for its block device. This
results in a double call to cyclic_unregister().
Fix this by adding a 'remove' method to the uclass and calling
mmc_deinit() from there.
Also drop the call to device_probe() within the block-device's probe()
method. The device is already in the process of being probed, so this
call does nothing.
Signed-off-by: Simon Glass <sjg@chromium.org> Fixes: c822c1a50bd ("mmc: call device_probe() after scanning") Signed-off-by: Peng Fan <peng.fan@nxp.com>
Jonas Karlman [Thu, 23 Jan 2025 21:48:48 +0000 (21:48 +0000)]
mmc: sdhci: Fix possible Synchronous Abort using PIO mode
When MMC_SDHCI_SDMA=y or MMC_SDHCI_ADMA=y and PIO mode is used
dma_unmap_single() is called on an unmapped address, 0x0. This may
result in a Synchronous Abort:
Peng Fan [Mon, 20 Jan 2025 04:30:09 +0000 (12:30 +0800)]
mmc: Optimize eMMC erase speed
Per JESD84-B51 6.6.9 Erase:
The host can erase a contiguous range of Erase Groups. Starting the erase
process is a three steps sequence. First the host defines the start address
of the range using the ERASE_GROUP_START (CMD35) command, next it defines
the last address of the range using the ERASE_GROUP_END (CMD36) command and
finally it starts the erase process by issuing the ERASE (CMD38) command
with argument bits set to zero. See Table 11 for the arguments supported by
CMD38. The address field in the erase commands is an Erase Group address,
in byte units for densities up to 2GB, and in sector units for densities
greater than 2GB. The Device will ignore all LSB's below the Erase Group
size, effectively rounding the address down to the Erase Group boundary.
So choose 2GB bytes as check condition.
If the erase size is larger that 2GB, use 2GB to avoid breaking non high
capacity cards. If erase size is less than 2GB and larger than a grp, use
'grpcnt * mmc->erase_grp_size' to cover all the sectors, else use
the number of sectors.
Marek Vasut [Sat, 18 Jan 2025 03:09:53 +0000 (04:09 +0100)]
mmc: Simplify poll CD logic in case cyclic framework is enabled
Simplify 90cc07fd786d ("mmc: Poll CD in case cyclic framework is enabled")
according to suggestions by Rasmus. The struct cyclic_info is zero-size in
case CONFIG_CYCLIC is not enabled and does not add any size to struct mmc,
so it can unconditionally be part of that structure. This allows clean up
of all the other conditionals in mmc.c which can now be unconditionally
present, as they also add no extra space.
Suggested-by: Rasmus Villemoes <ravi@prevas.dk> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Peng Fan <peng.fan@nxp.com>
The option MMC_SDHCI_ADMA_FORCE_32BIT is only tested or used when
MMC_SDHCI_ADMA or SPL_MMC_SDHCI_ADMA is enabled. And for
MMC_SDHCI_ADMA_64BIT the same is true except we also require
MMC_SDHCI_ADMA_FORCE_32BIT to be disabled.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Jaehoon Chung <jh80.chung@samsung.com> Acked-by: Peng Fan <peng.fan@nxp.com>
Daniel Golle [Sat, 29 Mar 2025 23:23:51 +0000 (23:23 +0000)]
image-fit-sig: skip in tools build if key is missing
Skip signature verification in case no public key was given in order to
allow using fit_check_sign also to validate uImage.FIT images without
signatures. Guarded by USE_HOSTCC macro the behavior on target is
unchanged.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
As current design, only Manager CPU called armv8_setup_psci() before
jump to next stage(such as Linux Kernel), Subordinate CPUs also need
setup psci vector to handle trap request which comes from higher EL
level.
Signed-off-by: Xu Zhang <423756212@qq.com>
[trini: Guard with !CONFIG_XPL_BUILD check]
Add support for the LCD interfaces (LCDIF1/2). When probed, these
interfaces request numerous clocks and power domains, attach the bridge
and look for a panel in order to retrieve its capabilities and
properties.
There is a similar existing driver in the upper folder for other i.MX
targets, I discovered this driver a bit late. It is not targeting the
i.MX8MP and I have no idea how different can the LCDIF be on this SoC,
but I did not manage to get it work, especially because it is not fully
compliant with the device-model, especially on the clocks/power
management side which is all ad-hoc. This is normal though, it was
contributed more than ten years ago.
Add support for the LVDS Display Bridge (LDB) found on i.MX8MP.
When attached, the bridge driver looks for panels connected to one of
its two outputs and adapts its own configuration to use them. There is
currently no support for merged/split displays.
Note regarding the clock configuration:
The LDB output clock should be absolutely identical to the LCDIF output
clock so both blocks can talk to each other synchronously. However, the
LDB clock has an internal divisor of 7 (respectively 3.5 in dual
configuration) which means the LDB input clock must be explicitly set
once we know the configuration.
This driver was tested on i.MX8MP using a single panel connected to the
LVDS2 interface.
video: imx: Fix Makefile in order to be able to add other imx drivers
The IPUv3 is one IP part of the imx world, there are others, and
selecting the whole imx/ folder based on such a specific Kconfig symbol
is sub-optimal. Let's always enter the imx/ folder, and then selectively
compile parts of the folder based on the configuration.
These are all the clocks needed to get an LCD panel working, going
through one of the LCDIF and the LDB. The media AXI and APB clocks are
also described.
clk: Ensure the parent clocks are enabled while reparenting
Reparenting a clock C with a new parent P means that C will only
continue clocking if P is already clocking when the mux is updated. In
case the parent is currently disabled, failures (stalls) are likely to
happen.
This is exactly what happens on i.MX8 when enabling the video
pipeline. We tell LCDIF clocks to use the VIDEO PLL as input, while the
VIDEO PLL is currently off. This all happens as part of the
assigned-clocks handling procedure, where the reparenting happens before
the enable() calls. Enabling the parents as part of the reparenting
procedure seems sane and also matches the logic applied in other parts
of the CCM.
It is very surprising that such an uclass, specifically designed to
handle resources that may be shared by different devices, is not keeping
the count of the number of times a power domain has been
enabled/disabled to avoid shutting it down unexpectedly or disabling it
several times.
Doing this causes troubles on eg. i.MX8MP because disabling power
domains can be done in recursive loops were the same power domain
disabled up to 4 times in a row. PGCs seem to have tight FSM internal
timings to respect and it is easy to produce a race condition that puts
the power domains in an unstable state, leading to ADB400 errors and
later crashes in Linux.
CI tests using power domains are slightly updated to make sure the count
of on/off calls is even and the results match what we *now* expect.
As we do not want to break existing users while stile getting
interesting error codes, the implementation is split between:
- a low-level helper reporting error codes if the requested transition
could not be operated,
- a higher-level helper ignoring the "non error" codes, like EALREADY and
EBUSY.
test: dm: test-fdt: Add checks for uclass_get_device_by_endpoint()
This is a new DM core helper. There is now a graph endpoint
representation in the sandbox test DTS, so we can just use it to verify
the helper proper behavior.
Suggested-by: Simon Glass <sjg@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
dm: core: Add a helper to retrieve devices through graph endpoints
There are already several helpers to find a udevice based on its
position in a device tree, like getting a child or a node pointed by a
phandle, but there was no support for graph endpoints, which are very
common in display pipelines.
Add a new helper, named uclass_get_device_by_endpoint() which enters the
child graph reprensentation, looks for a specific port, then follows the
remote endpoint, and finally retrieves the first parent of the given
uclass_id.
This is a very handy and straightforward way to get a bridge or a panel
handle.
Reviewed-by: Simon Glass <sjg@chromium.org> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
Andre Przywara [Tue, 25 Mar 2025 17:47:44 +0000 (17:47 +0000)]
common: console: move break; statement
In console_setfile(), there is some #ifdef'ed code, updating monitor
functions for a U-Boot proper build. This is called inside a switch/case
statement, but the closing "break;" is inside the #ifdef section.
This doesn't look right: we should not fall through to the error case
for an SPL/TPL build.
Move the "break" to be always effective, solving a compiler warning about
an untagged implicit fallthrough.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Tom Rini [Thu, 10 Apr 2025 21:04:09 +0000 (15:04 -0600)]
Merge patch series "*** Add Ethernet boot support for AM62Ax + phyCORE-AM62 SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:
Add general ethernet boot support for AM62Ax SoC.
Some of the work is based on TI's downstream u-boot patches found in
[1], patches touching code in mach-k3 and *.yaml board config files.
Also, provide defconfigs and device tree changes for phyCORE-AM62x and
phyCORE-AM62Ax to support booting via ethernet.
Nathan Morrisson [Tue, 25 Mar 2025 03:58:23 +0000 (04:58 +0100)]
board: phytec: phycore_am62ax: Share ethernet resources with boot r5 core
During the U-Boot SPL R5 boot stage the code is running on the MAIN R5
core, which means a host ID of 36 is used for DM/TIFS communication,
see [1]. In order to enable Ethernet boot update the DMA resources used
to be shared with the MAIN R5 core instead of the MCU R5 core.
Wadim Egorov [Tue, 25 Mar 2025 03:58:18 +0000 (04:58 +0100)]
configs: Add phycore_am62x_r5_ethboot_defconfig
Provide a defconfig for booting the phycore-am62x via Ethernet.
We need a separate defconfig because the AM62x has not enough internal
SRAM to support all boot sources.
Wadim Egorov [Tue, 25 Mar 2025 03:58:17 +0000 (04:58 +0100)]
arm: dts: k3-am625-phyboard-lyra-rdk: Add boot phase tag to phy_gmii_sel
Add bootph-all tag to phy_gmii_sel node. This is needed for booting via
Ethernet. While at it, drop main_pktdma reg redefinitions which are already
provided by the top-level SoC device tree file.
Signed-off-by: Wadim Egorov <w.egorov@phytec.de> Tested-by: Daniel Schultz <d.schultz@phytec.de>
Tom Rini [Thu, 10 Apr 2025 20:21:46 +0000 (14:21 -0600)]
Merge patch series "scsi: ensure writes are flushed to disk"
Caleb Connolly <caleb.connolly@linaro.org> says:
SCSI devices like UFS may maintain their own cache to speed up writes,
however this is lost on board reset (and may be lost on device removal
or reset by OS drivers).
Currently this can be worked around by "waiting for a while" after
writing data to disk, but of course this is not an acceptable solution.
Ideally U-Boot would have a mechanism to flush caches during board
reset, but until that logic is hooked up let's be sure that all writes
are actually propagated to the storage device so that we don't lose data
on board reset.
The same logic was already implemented just for the AHCI backend, this
duplicated logic has been removed and support for the SYNC_CACHE command
is added to AHCI.
This is particularly noticeable during capsule updates, since the update
file is deleted and the board is reset immediately afterwards which
resulted in the same capsule update being applied over and over again.
This specifically fixes Qualcomm SDM845 devices with UFS 2.1, but likely
all UFS devices that use a cache.
Caleb Connolly [Wed, 26 Mar 2025 12:24:10 +0000 (13:24 +0100)]
ata: ahci: implement SCSI_SYNC_CACHE
The SCSI layer now issues a SYNC_CACHE command after every write to
ensure there is no data loss due to a board reset after write.
Implement support for this command and remove the same logic from the
ATA write path to be consistent with other SCSI backends.
Ranges are not supported and the whole cache will be flushed in all
cases.
This was done per iteration in ata_scsiop_read_write(), but it's not
clear why this was the case, calling it once for the entire write ought
to achieve the same result.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Caleb Connolly [Wed, 26 Mar 2025 12:24:09 +0000 (13:24 +0100)]
scsi: sync cache on write
We don't have a mechanism to safely shutdown block devices prior to a
baord reset or driver removal. Prevent data loss by synchronizing the
SCSI cache after every write.
In particular this solves the issue of capsule updates looping on some
devices because the board resets immediately after deleting the capsule
file and this write wouldn't be flushed in time.
This may impact NAND wear, but should be negligible given the usecases
for disk write in U-Boot.
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Patrice Chotard [Fri, 28 Mar 2025 16:31:15 +0000 (17:31 +0100)]
dtc: introduce label relative path references
Since introduction of OF_UPSTREAM flag, U-Boot's dtc must be able
to compile Kernel's device tree.
Since kernel commit 7de129f5389b ("ARM: dts: stm32: stm32mp151a-prtt1l:
Fix QSPI configuration"), label relative path references has been
introduced. These label relative path references is not supported
by current U-Boot dtc version 1.5.0: (see mailing list discussion [1]).
In order to support such label relative patch references
adds following commit from upstream DTC tree:
Signed-off-by: Patrice Chotard <patrice.chotard@foss.st.com> Cc: Tom Rini <trini@konsulko.com> Cc: Simon Glass <sjg@chromium.org> Reviewed-by: Tom Rini <trini@konsulko.com> Reviewed-by: Simon Glass <sjg@chromium.org>
Tom Rini [Tue, 1 Apr 2025 16:21:25 +0000 (10:21 -0600)]
env: mmc: Fix test for ENV_IS_EMBEDDED
The symbol "ENV_IS_EMBEDDED" is an environment internal define and not a
real CONFIG symbol. The IS_ENABLED() macro is still valid to use here,
so update the check.
Raymond Mao [Thu, 27 Mar 2025 23:10:44 +0000 (16:10 -0700)]
tools: add pkg-config for preload_check_sign
The cflags and ldflags of preload_check_sign depend on the openssl
package thus pkg-config is needed to get the location where openssl
is installed.
This fix a potential build failure when openssl is not from the
distro and installed in a varied place.
Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Andrew Goodbody [Fri, 28 Mar 2025 16:30:37 +0000 (16:30 +0000)]
test/py: memtest: Fix test for non-trivial parameters
When using non-trivial values for parameters for this test it
will cause a spurious failure as the test passes a decimal value
to the mtest command which will interpret it as hexadecimal and
result in failure as below.
test/py/tests/test_memtest.py:66: in test_memtest_ddr
assert expected_response in response
E AssertionError: assert 'Tested 16 iteration(s) with 0 errors.' in 'Refusing to do empty test\r\nmtest - simple RAM read/write test\r\n\r\nUsage:\r\nmtest [start [end [pattern [iterations]]]]'
----------------------------- Captured stdout call -----------------------------
U-Boot> mtest 134217728 0x8001000 90 0x10
Refusing to do empty test
mtest - simple RAM read/write test
Usage:
mtest [start [end [pattern [iterations]]]]
The fix is to ensure that all the parameters to the mtest command are
passed as hexadecimal values.
Fixes: 22efc1cf276c ("test/py: memtest: Add tests for mtest command") Signed-off-by: Andrew Goodbody <andrew.goodbody@linaro.org> Reviewed-by: Love Kumar <love.kumar@amd.com>
Simon Glass [Fri, 28 Mar 2025 13:02:20 +0000 (07:02 -0600)]
patman: Show base commit on each patch when no cover letter
If a series is sent without a cover letter, there is no indication of
the base commit. Add support for this, since single patches of small
series may not always have a cover letter.
Simon Glass [Thu, 27 Feb 2025 19:27:30 +0000 (12:27 -0700)]
patman: Show the base commit and branch
It is helpful to know which commit patches are based on, even if that
commit might not be available to readers. Add a tag for this in the
cover letter.
Also add the local-branch name since that may be useful to the writer.
Tom Rini [Thu, 10 Apr 2025 16:54:03 +0000 (10:54 -0600)]
Dockerfile: Add fdisk
We had previously gotten this package through a chain of dependencies
with guestfs-tools. Now that we no longer install that package, install
fdisk (for sfdisk) directly.
Fixes: eb1b90ec57a4 ("Dockerfile: Update to drop virt-make-fs packages") Signed-off-by: Tom Rini <trini@konsulko.com>
Tom Rini [Tue, 8 Apr 2025 20:21:41 +0000 (14:21 -0600)]
Dockerfile: Download the Arm FVP and extract it
There are some reference platforms from Arm which are not found in QEMU
but instead in the FVP tool. As we can make use of this in CI later on,
download and extract it in our Dockerfile today.
Tom Rini [Tue, 28 Jan 2025 23:02:05 +0000 (17:02 -0600)]
Dockerfile: Update to gcc-14.2.0 and clang-18
Outside of changing versions here the other visible change is that we
tell grub that riscv64 does not have "large model" support. Without this
change the resulting mkimage is non-functional. This is known upstream
already.
phy: phy-qcom-qusb2: Fix USB PHY power on sequence
Recent addition of support for SDM660 inadvertently broke USB PHY power
on sequence on RB1/RB2 and others with following error:
starting USB...
Bus usb@4e00000: QUSB2PHY pll lock failed: status reg = 0
qcom-qusb2-phy phy@1613000: PHY: Failed to power on phy@1613000: -16.
Can't power on PHY0
probe failed, error -16
No USB controllers found
The root cause was the addition of flag se_clk_scheme_default which was
configured correctly for SDM660 but incorrect for all other supported
SoC. Fix that by properly assignment as per upstream Linux driver.
Fixes: 475497dc3c15 ("phy: Add SDM660 support to Qualcomm QUSB2 phy") Signed-off-by: Sumit Garg <sumit.garg@oss.qualcomm.com>
Reviewed-by: Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250410080027.208674-3-sumit.garg@kernel.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Currently the msm_sdhci doesn't yet support DLL configurations which are
required to enable bus speeds greater that 100MHz. So disable HS200 mode
support as of now as it requires bus speeds of 200MHz.
This should fix eMMC issues reported on RB1/RB2 although it should fix
issues for all Qcom platforms but it's not seen there as mostly SD cards
available don't support HS200 mode. The SD cards usually works in high
speed mode whose performance remains unaffected by this change. It only
affects RB1/RB2 as eMMC flash on these support HS200 mode but the U-Boot
driver currently is incapable of supporting that.
Be sure to use the u-boot-nodtb.bin image, as the Snapdragon platform
prioritizes the embedded Device Tree Blob (DTB) when present, rather
than the external one. The external DTB—modified by LK—is the version
required by the DB820c.
Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Reviewed-by: Christopher Obbard <christopher.obbard@linaro.org>
Reviewed-by: Link: https://lore.kernel.org/r/20250407175617.3494506-1-jorge.ramirez@oss.qualcomm.com Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
Caleb Connolly [Mon, 31 Mar 2025 10:43:18 +0000 (12:43 +0200)]
mach-snapdragon: of_fixup: fix condition check in ft_board_setup()
The fdt_node_check_compatible() function returns 0 on success which is
pretty confusing, and we were using it wrong!
Invert the condition check and refactor things to be more readable.
Additionally, add the check for the RB1 which needs the same fixup as
the RB2.
Reported-by: Sam Day <me@samcday.com> Fixes: e64503f1fcdf ("mach-snapdragon: implement ft_board_setup() for USB role selection") Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Tested-by: Sam Day <me@samcday.com> Link: https://lore.kernel.org/r/20250331104327.321339-1-caleb.connolly@linaro.org Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
On v5 & v7 controllers, multiple mapping for different
Execution Environment exists, if the mapping owner is for
a different Execution Environment we can only read and
not write any data.
To allow us to find a Write mapping for our Execution
Environment, we can overwritte a mapping if we encounter
a new one which we own.
Implement this logic, the result is the same mapping
table as in Linux.
Neil Armstrong [Fri, 28 Mar 2025 08:53:22 +0000 (09:53 +0100)]
spmi: msm: factor out channel mapping for v5 & v7
The handling of the table mapping for V5 & V7 needs more work
to handle the duplicate read-only & read-write mappings,
so to make code cleaner add a switch/case and move the
v5 & v7 mapping handler in a separate function.
Neil Armstrong [Fri, 28 Mar 2025 08:53:21 +0000 (09:53 +0100)]
spmi: msm: use real number of channels for v5 & v7
The SPMI_MAX_CHANNELS_Vx are only the maximum channels supported
by the controller, but the real number of channels mapped on this
system can be read from a register, so take this info.
This allows no to overlap on the second controller present on
the V7 SPMI arbiter, otherwise we would also parse the mapping
of the second SPMI bus and we would bet the wrong IDs.
Rui Miguel Silva [Thu, 27 Feb 2025 09:45:49 +0000 (09:45 +0000)]
mach-snapdragon: of_fixup: fix property length at writing
The length of a property includes '\0' in a string type one, so
the length passed by needs to have that in account, if not,
when getting the property value it will fail because it
has the wrong size.
Caleb Connolly [Mon, 24 Mar 2025 18:17:40 +0000 (19:17 +0100)]
qcom_defconfig: enable fastboot
Enable fastboot support over USB, using MMC as the backend. This will be
the internal eMMC on devices that have it, or the sdcard slot on devices
with UFS (if available).
We don't use a fixed address for the fastboot buffer because it's
allocated at runtime per-board. Entering fastboot mode should be done by
executing "run fastboot" or manually running:
Caleb Connolly [Mon, 24 Mar 2025 18:17:39 +0000 (19:17 +0100)]
mach-snapdragon: enable DM_USB_GADGET by default
This is required for gadget modes to work on most platforms. It must be
disabled for dragonboard410c since that doesn't use dwc3. USB on other
MSM8916 platforms isn't supported by qcom_defconfig anyway.
Zixun LI [Mon, 31 Mar 2025 16:26:07 +0000 (18:26 +0200)]
usb: gadget: atmel: Add SAM9X60 support
Compared to SAM9X5 the only difference is the DPRAM memory from the
USB High Speed Device Port (UDPHS) hardware block was increased,
so we can reuse the same endpoint data.
usb: gadget: f_mass_storage: Fix NULL dereference in fsg_add()
fsg_common_init() can fail when memory is low. In that case, it returns
PTR_ERR().
fsg_add() does not check for failure, and thus dereferences an invalid
fsg_common later, which crashes.
Verify if we receive an error from fsg_common_init() and handle it
gracefully.
This happens when fsg_common_init() fails to allocate memory and calls
fsg_common_release().
fsg_common_release() then calls kfree() which frees common->luns.
However, common->luns was never allocated via kmalloc/calloc(),
resulting in a crash.
Drop the invalid kfree. The memory from common->luns will be
reclaimed when we kfree(common) later in fgs_common_release().
Michael Walle [Wed, 12 Mar 2025 07:36:55 +0000 (08:36 +0100)]
fastboot: lift restrictions on !NET_LWIP for USB
Fastboot works either over TCP, UDP or USB. The latter doesn't have
anything to do with networking, thus should work just fine with
regardless which network stack is selected. In practice, header symbols
are used inside common code paths. Add some ifdeffery to guard against
that.
This will make fastboot over USB work with the new LWIP stack.
Tom Rini [Thu, 10 Apr 2025 00:31:21 +0000 (18:31 -0600)]
CI: Disable evb-ast2600
Currently, this platform is failing in CI due to seemingly platform
specific reasons. For now, remove it from CI until the maintainers have
a chance to look in to it.
Tom Rini [Tue, 8 Apr 2025 22:24:12 +0000 (16:24 -0600)]
Merge patch series "Annotate switch/case fallthrough cases"
Andre Przywara <andre.przywara@arm.com> says:
C's implicit fallthrough behaviour in switch/case statements can lead to
subtle bugs. Quite some while ago many compilers introduced warnings in
those cases, requiring intentional fallthrough's to be annotated.
So far we were not enabling that compiler option, so many ambiguities
and some bugs in the code went unnoticed.
This series adds the required annotations in code paths that the first
stage of the U-Boot CI covers. There is a large number of cases left
in the libbz2 code. The usage of switch/case is borderline insane there,
labels are hidden in macros, and there are no breaks, but just goto's.
Upstream still uses very similar code, without any annotations. I still
am not 100% sure those are meant to fall through or not, and plan to do
further investigations, but didn't want to hold the rest of the patches
back. You can see for yourself by applying patch 18/18 and building for
sandbox64, for instance.
Because of this we cannot quite enable the warning in the Makefile yet,
but those fixes are worth regardless, and be it to increase readability.
Please note that those patches do not fix anything, really, they just add
those fallthrough annotations, so the series is not really critical.
Andre Przywara [Thu, 27 Mar 2025 15:33:12 +0000 (15:33 +0000)]
cmd: spl: annotate switch/case fallthrough
The argument parsing in the SPL configuration command uses an implicit
switch/case fallthrough when dealing with a different number of
arguments.
Add our "fallthrough;" statement-like macro before the respective labels
in the bootm code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
Andre Przywara [Thu, 27 Mar 2025 15:33:11 +0000 (15:33 +0000)]
cmd: pmic: annotate switch/case fallthrough
The argument parsing code in the pmic command uses an implicit switch/case
fallthrough to handle the common part of having one or two arguments.
Add our "fallthrough;" statement-like macro before the second branch in
the parsing code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
The raw NAND flash code uses an implicit switch/case fallthrough to
share code when dealing with different ECC modes, and also when handling
some read command.
Add our "fallthrough;" statement-like macro before the respective labels
in the NAND code, to avoid a warning when GCC's -Wimplicit-fallthrough
warning option is enabled.
This copies the fallthrough annotations that the original kernel code
gained, before this function got refactored there.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Michael Trimrachi <michael@amarulasolutions.com>
The SPI NOR code uses an implicit switch/case fallthrough when checking
different vendors to determine how to deal with extended addressig modes.
Add our "fallthrough;" statement-like macro before some label in the
4-byte addressing mode code, to avoid a warning when GCC's
-Wimplicit-fallthrough warning option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
The MMC boot mode selection for the TI AM62P series of SoCs uses an
implicit switch/case fallthrough for falling back to some default
boot mode.
Add our "fallthrough;" statement-like macro before the default branch in
the code, to avoid a warning when GCC's -Wimplicit-fallthrough warning
option is enabled.
Signed-off-by: Andre Przywara <andre.przywara@arm.com> Reviewed-by: Tom Rini <trini@konsulko.com>
projects / thirdparty / u-boot.git / log
