Marek Vasut [Sun, 23 Mar 2025 15:58:45 +0000 (16:58 +0100)]
clk: imx: Convert clock-osc-* back to osc_*
Convert clock-osc-24m back to osc_24m and clock-osc-32k back to osc_32k.
These are the clock which match clock tables in Linux. This is now
possible because the clock drivers now resolve clock names based on
clock-names DT property in the CCM DT node.
Marek Vasut [Sun, 23 Mar 2025 15:58:43 +0000 (16:58 +0100)]
clk: clk-composite: Resolve parent clock by name
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Marek Vasut [Sun, 23 Mar 2025 15:58:39 +0000 (16:58 +0100)]
clk: imx: gate2: Resolve parent clock by name
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Marek Vasut [Sun, 23 Mar 2025 15:58:37 +0000 (16:58 +0100)]
clk: clk-gate: Resolve parent clock by name
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Marek Vasut [Sun, 23 Mar 2025 15:58:33 +0000 (16:58 +0100)]
clk: clk-mux: Resolve parent clock by name
Use clock-names property which is accessible via parent clock OF node
to look up the parent clock by name instead of depending on unreliable
global clock name to perform look up.
Marek Vasut [Sun, 23 Mar 2025 15:58:31 +0000 (16:58 +0100)]
clk: clk-mux: Fold clk_register_mux()
Neither clk_register_mux_table() nor clk_hw_register_mux_table()
are called outside of clk-mux.c , fold both into clk_register_mux().
No functional change.
Marek Vasut [Sun, 23 Mar 2025 15:58:30 +0000 (16:58 +0100)]
clk: Add clk_resolve_parent_clk()
Add clk_resolve_parent_clk() to resolve parent clock udevice name
based on clock-names DT property. This is used in SoC clock drivers
to look up the clock name in clock tables, which matches a clock
name in DT clock-names property, and convert it into udevice name
which is used by U-Boot clock framework to look up parent clock in
e.g. clk_register() using uclass_get_device_by_name(UCLASS_CLK,
parent_name, &parent);
- Allow the registration and enablement of the i.MX UART clocks via DM,
without the need of manually calling init_uart_clk().
- Remove duplicated 'mmc dev ${mmcdev}' commands.
- Rework some of the RAM related Kconfig symbols for phycore_imx8mp.
Marek Vasut [Wed, 19 Mar 2025 22:07:52 +0000 (23:07 +0100)]
usb: dwc3: gadget: Fix match_ep callback for NXP UUU tool
The UUU tool excepts the interrupt-in endpoint to be ep1in, otherwise
it crashes. This is a result of the previous hard-coded EP setup in
drivers/usb/gadget/epautoconf.c which did special-case EP allocation
for SPL builds, and which was since converted to this callback, but
without the special-case EP allocation in SPL part.
This reinstates the SPL part in an isolated manner, only for NXP iMX
SoCs, only for SPL builds, and only for the ep1in interrupt-in endpoint.
spl_perform_fixups is redundant in the current implementation. SPLs call
dram_init during spl_enable_cache in arch/arm/mach-k3/common.c. In
U-Boot, dram_init and dram_init_banksize are automatically called in
init_sequence_f. Therefore, SPLs and U-Boot always determine the correct
RAM size. During Linux boot, fdt_fixup_memory_banks adjusts the RAM size
in the Linux device tree, ensuring correct RAM usage.
dram_init() calls get_ram_size() for the Verdin AM62, which determines
the correct RAM size through read/write operations. However, due to the
K3 bootflow placing ATF in RAM and requiring cache coherence, calling
get_ram_size() with caches enabled prevents ATF boot. Removing this call
restores ATF boot functionality.
This fixes a regression introduced in commit 4164289db882 ("board:
verdin-am62: fix missing memory fixup call") which prevents some of our
Verdin AM62 modules from booting.
Tom Rini [Sat, 15 Mar 2025 01:29:16 +0000 (19:29 -0600)]
phycore_imx8mp: Rework some of the RAM related Kconfig symbols
As the code is today, we get a warning about "select" statements on
"choice" options not doing anything. In this case we can easily fix this
by dropping the select line as the following choice statement handles
things correctly. We also drop the "default false" line as false / n is
the default.
Signed-off-by: Tom Rini <trini@konsulko.com> Reviewed-by: Teresa Remmet <t.remmet@phytec.de>
Adam Ford [Tue, 18 Mar 2025 23:38:37 +0000 (18:38 -0500)]
configs: imx8mp_beacon: Select SPL_CLK_IMX8MP
In preparation to remove manual references for enabling some clocks,
enable SPL_CLK_IMX8MP which automatically enables SPL_CCF and
SPL_CLK_COMPOSITE_CCF which permit various drivers to activate
their respective clocks automatically.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:36 +0000 (18:38 -0500)]
clk: imx: select SPL_CLK_COMPOSITE_CCF when SPL_CLK_IMX8MP
If SPL_CLK_IMX8MP is selected alone, it causes a build error.
The clock composite is required when using the clock framework, so
select it when SPL_CLK_IMX8MP is enabled. This is already being
done outside of SPL.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:33 +0000 (18:38 -0500)]
serial: mxc: Support bulk enabling clocks
Depending on the platform, there may be multiple clock sources
required to enable a UART. Use the bulk functions to get and
enable the clocks when the UART probes. This can facilitate
the removal of functions to manually enable the clock.
This is made dependent on CLK_CCF which is used on imx6q,
imx8m[mnqp], several imxrt, imx9. If/when the UART clock
registration is done for older boards, this limitation
could be updated.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:30 +0000 (18:38 -0500)]
clk: imx6q: Register UART clocks
In order to use the driver model and clock system to enable UART
clocks from the serial driver, it's necessary to register the UART
clocks. With the helper function to check for imx6qp vs other
variants, the UART can register for both scenarios.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
Adam Ford [Tue, 18 Mar 2025 23:38:29 +0000 (18:38 -0500)]
clk: imx6q: Properly handle imx6qp ECSPI clk_sels
The ECSPI clock has the ability to select between pll3_60m and
osc on the imx6qp, where it's fixed on other variants. Fix this
by adding using a helper function to determine SoC variant and
register the clock accordingly.
Signed-off-by: Adam Ford <aford173@gmail.com> Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com> Reviewed-by: Peng Fan <peng.fan@nxp.com>
The Ouya microconsole is build on Nvidia Tegra 3 (T33) SoC, featuring a
quad-core 1.7 GHz ARM Cortex-A9 CPU and a ULP GeForce GPU, paired with 1GB
of DDR3 RAM and 8GB of internal flash storage. Running a modified Android
4.1 (Jelly Bean) OS with a custom launcher, it aimed for open-source gaming
via a digital storefront.
This implementation is mostly based on upstream Linux device tree and
fragments of work done by previous developers.
Co-developed-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Peter Geis <pgwipeout@gmail.com> Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
Svyatoslav Ryhel [Fri, 14 Mar 2025 10:29:28 +0000 (12:29 +0200)]
pinctrl: tegra20: fix function naming mismatches
The names used for displaya, displayb and i2c1 do not align with their
corresponding Linux counterparts. This inconsistency can cause pins to be
configured incorrectly, potentially breaking existing functionality.
Svyatoslav Ryhel [Thu, 13 Mar 2025 09:02:35 +0000 (11:02 +0200)]
pinctrl: tegra: adjust pin state lists
Modify the pin state lists for lock, io-reset, rcv-sel, and e-io-hv
properties by repositioning the default value to the end. This change
addresses conflicts with device tree representations of TEGRA_PIN_DISABLE
and TEGRA_PIN_ENABLE.
Svyatoslav Ryhel [Thu, 13 Mar 2025 08:48:06 +0000 (10:48 +0200)]
pinctrl: tegra: adjust default values of pins
The current default pin and drive values were more of temporary
placeholders. They have to be replaced with accurate default values as
specified in the TRM and header file.
Align TF700T bindings with existing upstream device trees. OF_UPSTREAM
migration is possible already but resulting size of binary exceeds maximum
allowed size with full size trees.
Svyatoslav Ryhel [Sat, 15 Feb 2025 17:49:23 +0000 (19:49 +0200)]
ARM: tegra: lg_x3: upgrade video bindings
Upgrade LG P895 and P880 device tree bindings according to preliminary
upstream Linux tree. Once Linux catches up, LG X3 can be switched to
OF_UPSTREAM without regressions.
Svyatoslav Ryhel [Thu, 13 Mar 2025 07:59:12 +0000 (09:59 +0200)]
video: edid: guard standard timings EDID expansion behind kconfig
Since EDID only indicates supported standard timings, a large table with
detailed timing information is necessary, consuming significant space. To
mitigate this, the table is made configurable via kconfig, allowing it to
be excluded when not needed.
Paul Barker [Fri, 28 Feb 2025 12:47:54 +0000 (12:47 +0000)]
net: phy: ksz90x1: Load skew values from device tree
Various signal skew values may be set in the device tree for the ksz9131
Ethernet PHY. For example, the RZ/G2L board requires non-default values
for rxc-skew-psec & txc-skew-psec.
This is based on the ksz9131 phy driver in Linux v6.11.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Paul Barker [Fri, 28 Feb 2025 12:47:52 +0000 (12:47 +0000)]
net: phy: Port set/clear bits from Linux
To simply porting phy drivers from Linux to U-Boot, define
phy_set_bits() and phy_clear_bits() functions with a similar API to
those used in Linux.
The U-Boot versions of these functions include the `devad` argument
which is not present in the Linux versions, to keep them aligned with
the other phy functions in U-Boot.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Paul Barker [Tue, 11 Mar 2025 20:57:45 +0000 (20:57 +0000)]
reset: rzg2l-usbphy-ctrl: Connect up vbus regulator
Bind the USB VBUS regulator driver under the USB PHY reset driver for
the Renesas RZ/G2L and related SoCs. This additional bind is needed as
the corresponding device tree node does not contain a compatible string.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Tom Rini [Tue, 18 Mar 2025 19:12:51 +0000 (13:12 -0600)]
Merge patch series "pxe: Precursor series for supporting read_all() in extlinux / PXE"
Simon Glass <sjg@chromium.org> says:
This series includes some patches related to allowing read_all() to be
used with the extlinux / PXE bootmeths.
These patches were split out from the stb4 series, since it will need to
have additional patches for LWIP, to avoid breaking PXE booting when
LWIP is used.
Simon Glass [Thu, 6 Mar 2025 00:25:23 +0000 (17:25 -0700)]
net: Provide a function to run network operations
Add a new netboot_run() function which can be used for simple network
operations, such as loading a file. Put the implementation in an
internal function, used by the existing code.
Place this function into the net/ code, so that it does not need the
command line to be available.
Document which network operations are supported, i.e. a limited subset,
for now.
For the one board which uses lwip, it is not quite clear how to avoid
using the cmdline interface. This will need some discussion.
Simon Glass [Thu, 6 Mar 2025 00:25:21 +0000 (17:25 -0700)]
net: Refactor part of netboot_common() into a function
Move the core code for starting an netboot operation into a separate
function, so that we can (with additional work) move towards calling it
from outside the file.
Simon Glass [Thu, 6 Mar 2025 00:25:20 +0000 (17:25 -0700)]
net: Return the size from parse_args()
Rather than setting global variables, return the size, if provided. For
tftput, use the addr argument to store the save address, to avoid adding
yet another parameter.
Simon Glass [Thu, 6 Mar 2025 00:25:11 +0000 (17:25 -0700)]
boot: Support compressed booti images in bootm
A compressed booti image relies on the compression-format's header at
the start to indicate which compression algorithm is used.
We don't support this elsewhere in U-Boot, so assume that a compressed
file is always a booti file. Once it is compressed, a check is made to
make sure that it actually is.
Simplify the implementation by adding a new function which returns the
booti image-type if compression is detected.
Simon Glass [Thu, 6 Mar 2025 00:25:10 +0000 (17:25 -0700)]
boot: Support booti format in bootm
At present the booti format is handled separately, in its own command.
Provide a way to boot uncompressed booti images within the bootm code,
so that eventually we can boot these images without CONFIG_CMDLINE
Update bootm_init() to attach the images for all formats which use them.
Simon Glass [Thu, 6 Mar 2025 00:25:09 +0000 (17:25 -0700)]
boot: arm: riscv: sandbox: Add a format for the booti file
Arm invented a new format for arm64 and something similar is also used
with RISC-V. Add this to the list of supported formats and provide a way
for the format to be detected on both architectures.
Update the genimg_get_format() function to support this.
Fix up switch() statements which don't currently mention this format.
Booti does not support a ramdisk, so this can be ignored.
Simon Glass [Thu, 6 Mar 2025 00:25:08 +0000 (17:25 -0700)]
boot: Convert IMAGE_FORMAT into an enum
Use an enum so it is clearer that these options are related. Update
genimg_get_format(), tidy up the function comment and move it to the
header file, since it is exported.
Simon Glass [Thu, 6 Mar 2025 00:25:06 +0000 (17:25 -0700)]
boot: Pass just the FDT argument to label_process_fdt()
Since this function only adjusts one element of the bootm command, pass
just that. This will make it easier to refactor things to remove the
bootm command.
Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de>
Simon Glass [Thu, 6 Mar 2025 00:25:01 +0000 (17:25 -0700)]
bootstd: Correct display of kernel version
The address of the bzImage is not recorded in the bootflow, so we cannot
actually locate the version at present. Handle this case, to avoid
showing invalid data.
Simon Glass [Thu, 6 Mar 2025 00:25:00 +0000 (17:25 -0700)]
x86: Move the bootm state for zimage into cmd/
Rather than holding the state in the implementation code, move it to the
command code. The state is now passed to the implementation functions
and can there (with future work) be pass in from bootstd, without going
through the commands.
Simon Glass [Thu, 6 Mar 2025 00:24:58 +0000 (17:24 -0700)]
x86: Move x86 zboot state into struct bootm_info
This structure is supposed to handle any type of booting
programmatically, i.e. without needing a command to be executed. Move
the x86-specific members into it and use it instead of
struct zboot_state. Provide a macro so access is possible without adding
lots of #ifdefs to the code.
This will allow the struct to be used for all four types of booting
(bootm, bootz, booti and zboot).
Call bootm_init() to init the state, to match other boot methods.
Note that some rationalisation could be performed on this. But this
is tricky since addresses are stored as strings in several places. Also
some strings combine multiple arguments into one. So to keep this task
somewhat manageable, we content ourselves with just getting everything
into the same struct
Tom Rini [Tue, 18 Mar 2025 14:12:40 +0000 (08:12 -0600)]
Merge patch series "vepxpress64: disable CRC32 by default and add FVP with TF-A guide"
Harrison Mutai <harrison.mutai@arm.com> says:
This patch introduces two updates to the vexpress64 project:
- Disable CRC32 by default to prevent aborts in a standard FVP setup.
- Add a guide for running FVP with TF-A, providing a clear starting point for
users.
Tom Rini [Tue, 18 Mar 2025 14:14:13 +0000 (08:14 -0600)]
Merge patch series "*** Various Improvements for phyCORE-AM62/A SoMs ***"
Wadim Egorov <w.egorov@phytec.de> says:
This patch series syncs the phyCORE-AM62Ax feature-wise with our other
K3-based SoMs by adding SoM overlay handling and capsule updates. It
also introduces support for USBDFU boot and includes various minor fixes.
projects / thirdparty / u-boot.git / log
