- Convert imx6q-lxr and imxrt1050 to OF_UPSTREAM.
- Fix potential memory leak on ]imx/imx8/imx8m]image.
- Restrict DDR_SI_TEST to only Siemens Capricorn board.
- Fix CONFIG_BOOTCOUNT_ALTBOOTCMD on Data Modul and DH imx8m boards.
Marek Vasut [Sat, 22 Feb 2025 17:13:26 +0000 (18:13 +0100)]
ARM: imx: Introduce DH i.MX6 DHSOM board specific defconfigs
Move content of dh_imx6_defconfig into dh_imx6.config. Retain legacy
dh_imx6_defconfig as multi-config for all DH i.MX6 DHSOM based boards.
Introduce separate imx6_dhcom_drc02_defconfig, imx6_dhcom_pdk2_defconfig
and imx6_dhcom_picoitx_defconfig for each i.MX6 DHSOM based board, to
make build for those boards easier. No functional change.
Marek Vasut [Fri, 21 Feb 2025 17:07:16 +0000 (18:07 +0100)]
ARM: imx: Fix CONFIG_BOOTCOUNT_ALTBOOTCMD update on Data Modul i.MX8M Mini eDM SBC
The environment is missing quotes for string variable, add them.
Fixes: 940135eea5df ("Kconfig: Move CONFIG_BOOTCOUNT_ALTBOOTCMD to Kconfig") Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Tom Rini <trini@konsulko.com>
Liya Huang [Fri, 31 Jan 2025 00:52:43 +0000 (08:52 +0800)]
siemens: common: Make DDR_SI_TEST depend on TARGET_CAPRICORN
The DDR_SI_TEST config option is only relevant to the i.MX8 Capricorn
board.
Make DDR_SI_TEST depend on DDR_SI_TEST so that it does not show up
on other targets.
Peng Fan [Sat, 22 Feb 2025 12:17:11 +0000 (20:17 +0800)]
imx8mm: imx8mm_evk: fix BOOTSTD boot
Select BOOTSTD_FULL and BOOTSTD_BOOTCOMMAND
Correct DEFAULT_FDT_FILE
Correct env file for imx8mm_evk_fspi_defconfig
Fixes: 364ba68ed1a ("imx: imx8mm_evk: Switch to BOOTSTD") Reported-by: Ludwig Nussel <ludwig.nussel@siemens.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Peng Fan [Sat, 22 Feb 2025 12:17:10 +0000 (20:17 +0800)]
imx8mq: imx8mq_evk: fix DEFAULT_FDT_FILE
The CONFIG_DEFAULT_FDT_FILE should be imx8mq_evk.dtb for this board
Fixes: 7050bd925f7 ("imx: imx8mq_evk: Switch to BOOTSTD") Reported-by: Ludwig Nussel <ludwig.nussel@siemens.com> Signed-off-by: Peng Fan <peng.fan@nxp.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:28 +0000 (21:33 +0100)]
net: miiphybb: Use container_of() in bb_miiphy_getbus()
Replace the name based look up in bb_miiphy_getbus() with trivial
container_of() call. This works because the struct bb_miiphy_bus
always embeds the matching struct mii_dev . This also makes the
code much simpler and more efficient.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 22 Feb 2025 20:33:27 +0000 (21:33 +0100)]
net: designware: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:26 +0000 (21:33 +0100)]
net: sh_eth: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:25 +0000 (21:33 +0100)]
net: ravb: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 22 Feb 2025 20:33:24 +0000 (21:33 +0100)]
arm: mvebu: a38x: Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
Allocate bb_miiphy using bb_miiphy_alloc() and fill in callbacks
currently listed in bb_miiphy_buses[] array. This is a temporary
duplication of assignment to avoid breakage, which will be removed
in follow up patches. At this point, the bb_miiphy callbacks can
reach these accessors by doing container_of() on struct mii_dev.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Introduce bb_miiphy_alloc()/bb_miiphy_free() wrappers to allocate and free
struct bb_miiphy_bus. Make struct bb_miiphy_bus wrap struct mii_dev, which
will become useful later in bb_miiphy_bus accessors, which would be able
to access struct bb_miiphy_bus using container_of, even if the PHY stack
only passes in the inner struct mii_dev .
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 22 Feb 2025 20:33:21 +0000 (21:33 +0100)]
net: designware: Extract bbmiiphy initialization into dedicated function
Pull the bbmiiphy initialization code from designware_eth_probe() into
dedicated function, dw_bb_mdio_init(), just like all the other MDIO
initialization functions.
Keep check for "snps,bitbang-mii" in the designware_eth_probe(), so the
driver can initialize this MDIO only in case the property is present,
and initialize regular DW MDIO in case it is not present.
The dw_bb_mdio_init() allocates its own MDIO instance, because thus far
code gated behind "snps,bitbang-mii" did depend on allocation of MDIO bus
by the other two MDIO bus options and then rewrote the newly allocated
MDIO bus callbacks, which is wrong, instead allocate proper MDIO bus with
the correct callbacks outright.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:18 +0000 (21:33 +0100)]
arm: mvebu: a38x: Call bb_miiphy init directly in driver probe
All the resources needed by this .init callback should already
be available by the time probe function runs, simply call the
init callback directly and set the bb_miiphy init callback to
NULL. This shouldn't break anything on this hardware, but would
be nice if someone could double-check and test that.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:17 +0000 (21:33 +0100)]
net: designware: Reorder bb_miiphy functions
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:16 +0000 (21:33 +0100)]
arm: mvebu: a38x: Reorder bb_miiphy functions
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:15 +0000 (21:33 +0100)]
net: sh_eth: Reorder bb_miiphy functions
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com>
Marek Vasut [Sat, 22 Feb 2025 20:33:14 +0000 (21:33 +0100)]
net: ravb: Reorder bb_miiphy functions
Move the bb_miiphy functions before MDIO registration. This is a
preparatory patch, the functions will be referenced around the MDIO
registration in the follow up patches. No functional change.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 22 Feb 2025 20:33:12 +0000 (21:33 +0100)]
net: sh_eth: Drop empty init callback
The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Marek Vasut [Sat, 22 Feb 2025 20:33:11 +0000 (21:33 +0100)]
net: ravb: Drop empty init callback
The init function does nothing, the bb_miiphy_init() already checks
whether the .init callback is assigned, and if not, skips calling it.
Remove the empty init function. The entire init callback will be
removed in follow up patches.
Reviewed-by: Paul Barker <paul.barker.ct@bp.renesas.com> Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
The clk_stub, regulator, and pinctrl fixes enable the sdcard on the RB5
dev board (and sm8250 devices broadly). clk_stub is only enabled in
qcom_defconfig and the others are qcom specific so these shouldn't
affect other platforms.
Lastly, a small ufetch fix from Sam which gets color rendering correctly
on U-Boots framebuffer video device.
Sam Day [Mon, 3 Feb 2025 16:42:20 +0000 (16:42 +0000)]
cmd: ufetch: use 3-bit colour ANSI codes
Currently, the 8-bit escapes are being used, which aren't supported by
vidconsole_escape_char. Since the current usage maps directly to the
3-bit equivalents anyway, let's use those instead.
With this change, the fetch output looks as fetching in the vidconsole
as it does over serial!
Signed-off-by: Sam Day <me@samcday.com> Tested-by: Alexey Minnekhanov <alexeymin@postmarketos.org> Tested-by: Ferass El Hafidi <funderscore@postmarketos.org>
Caleb Connolly [Mon, 10 Feb 2025 16:27:25 +0000 (16:27 +0000)]
clk: add stub clock driver
Add a stub clock driver which can be used to bind clock controllers
which aren't required for the platform to boot, but which are needed for
U-Boot drivers to work.
In addition, add a NOP parent driver to allow for binding the parent
nodes of the clock.
Initially this driver supports a Qualcomm platform where the MMC driver
tries to fetch the RPM clock controller, which is not actually required
for the device to work.
This module is a color active matrix LCD module incorporating
Oxide TFT (Thin Film Transistor). It is composed of a color TFT-LCD
panel, driver ICs, a control circuit and power supply circuit, and
a backlight unit. Graphics and texts can be displayed on a 1536x2048
dots panel with (16,777,216) colors by using MIPI DUAL DSI interface,
supplying +3.3V DC supply voltage for TFT-LCD panel driving and
supplying DC supply voltage for LED Backlight.
Svyatoslav Ryhel [Mon, 18 Nov 2024 06:42:43 +0000 (08:42 +0200)]
video: add TI LP855x backlight driver
Add support for National Semiconductor/TI LP8550/1/2/3/5/6/7
LED Backlight. Driver is based on Linux version but is
reworked and optimised for U-Boot DM framework. Currently
only register driven backlight control is supported, PWM
driver backlight control may be added later if needed.
Tom Rini [Tue, 25 Feb 2025 17:11:32 +0000 (11:11 -0600)]
Merge patch series "Remove "saveenv" functionality from am57xx evms"
Anurag Dutta <a-dutta@ti.com> says:
Previously saved environment introduce discrepancies and may lead to
incompatibilities without default settings. This series removes the saved
environment functionality on am57xx evms so that the default configuration
is always loaded
Anurag Dutta [Sat, 8 Feb 2025 04:39:38 +0000 (10:09 +0530)]
configs: am57xx: Remove saved environments
Saved environments lead to inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.
Anurag Dutta [Sat, 8 Feb 2025 04:39:37 +0000 (10:09 +0530)]
configs: am57xx_hs: Remove saved environments
Saved environments cause inconsistencies leading to conflicts
with the default environment that U-boot should update during
development. Remove the previously saved environment so that
the default environment is always loaded.
Please pull the SoCFPGA changes for next from u-boot-socfpga, containing
boot support for the Altera SoCFPGA Agilex 5 platform in U-Boot. The
changes include:
1. Board-specific configurations and setup required to enable Agilex 5
operation in U-Boot.
2. Integration of cache coherency unit (CCU) initialization routine,
including CCU conguration in DT.
3. Clock, firewall (configured in DT), SMMU, low level initialization
specific to Agilex 5.
4. Integration of memory initialization routine, including DDR setup.
This patch set has been tested on Agilex 5 devkit with QSPI boot
(UBI/UBIFS) and RAM boot (TFTP & ARM DS debugger).
Automatically start watchdog timer for Agilex5. This
configuration is enabled by default in the Kconfig,
hence removing this configuration from Agilex5 defconfig.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tien Fong Chee [Tue, 18 Feb 2025 08:35:09 +0000 (16:35 +0800)]
arm: socfpga: soc64: Add support for board_boot_order()
Add board_boot_order() to retrieve the list of boot devices from
spl-boot-order property in device tree. This board_boot_order()
would be used for all Intel SOC64 devices.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: armv8: Improve SPL data save and restore implementation
Introduce a new symbol in the beginning of .data section in
the common ARMv8 linker script and use that as a reference
for data save and restore.
Previously, the code would rely on calculating the start of
the .data section address via data size, however, we observed
that the data size does not really reflect the SPL mapped
addresses.
In our case, the binman_sym section size was not included in
the data size, which will result in a wrong address for the
.data start section, which prevents us from properly saving
and restoring SPL data.
This approach skips the calculation for the starting address
of the .data section, and instead just defines the beginning
address of the .data section and calling the symbol as needed,
in which we think as a simpler and much more robust method.
Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: socfpga: smc: Add memory coherency support to mailbox command
As cache is enabled in U-Boot and disabled in ATF(BL31). We need to
perform cache flush of buffers that are shared between U-Boot and
ATF using secure monitor calls.
Signed-off-by: Mahesh Rao <mahesh.rao@altera.com> Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tien Fong Chee [Tue, 18 Feb 2025 08:34:59 +0000 (16:34 +0800)]
arm: socfpga: agilex5: Add SMMU initialization
Allow non-secure accesses only with SMMU peripherals. This would protect
the content in DDR secure region from accidentally modified by SMMU
peripherals.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
Tien Fong Chee [Thu, 8 Aug 2024 08:47:39 +0000 (16:47 +0800)]
arm: socfpga: agilex5: Enable cache flush for system memory cache in CCU
set/way instructions "dc cisw" which is used by the "dcache flush" command
only flushing CPU data caches from L1 -> L2 -> L3 to system memory cache in
cache coherency unit, hence this patch enables data flush from system
memory cache of CCU into DDR memory.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
These firewall configure settings are needed to disable firewall on
respective hardware component so both secure and non-secure transactions
are allowed.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: socfpga: Add handoff data support for SoCFPGA Agilex5 device
Agilex5 supports both HPS handoff data and DDR handoff data.
Existing HPS handoff functions are restructured to support both existing
devices and Agilex5 device.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com>
arm: socfpga: agilex5: Add warm reset mask for Agilex5
There are 5 L4 watchdogs and one SDM triggered warm reset bit
in Agilex5 reset manager "stat" register where bit 16:20 for L4
watchdogs. Assigning value 1 to these bits in the register address
will initiate SDM to trigger warm reset.
Introducing new warm reset mask for Agilex5 to trigger warm reset
to all five L4 watchdogs.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Alif Zakuan Yuslaimi <alif.zakuan.yuslaimi@altera.com> Reviewed-by: Tien Fong Chee <tien.fong.chee@altera.com>
drivers: clk: agilex5: Configure intosc as boot_clk source
Some customers prefer to minimize the use of external oscillators,
especially when using the FPGA first configuration mode.
By enabling the configuration of the HPS internal oscillator as
the boot_clk source instead of the default external oscillator,
(HPS_OSC_CLK) in non-secure boot scenarios, this allows them
to eliminate the need for an additional oscillator device and
a dedicated HPS pin, simplifying board layout and routing.
arm: socfpga: agilex5: Add new driver model for system manager in Agilex5
Initial creation of new system manager driver.
Add supports for the SOCFPGA System Manager Register block which
aggregates different peripheral function into one area.
On 64 bit ARM parts, the system manager only can be accessed during
EL3 mode, this driver model provide user the high level access
to system register and abstract user from low level access.
The base address of system manager can be retrieved
using DT framework through the System Manager driver.
Signed-off-by: Tien Fong Chee <tien.fong.chee@altera.com> Signed-off-by: Boon Khai Ng <boon.khai.ng@altera.com>
projects / thirdparty / u-boot.git / log
