Raymond Mao [Fri, 18 Jul 2025 14:16:17 +0000 (07:16 -0700)]
bloblist: add API for applying blobs with specified tag
Add an API to search for the blobs with specified tag and use the
hook function to apply the blob data.
Add a helper function to return the inline header size as according
to recent spec[1] updates, the actual data can be following an inline
header instead of following the TE header immediately.
Raymond Mao [Fri, 18 Jul 2025 14:16:16 +0000 (07:16 -0700)]
bloblist: fix a potential negative size for memmove
It causes a panic when blob is shrunk and 'new_alloced' is less than
'next_ofs'. The data area that needs to be moved should end up at
'hdr->used_size'.
Fixes: 1fe59375498f ("bloblist: Support resizing a blob") Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@amd.com>
Raymond Mao [Fri, 18 Jul 2025 14:16:14 +0000 (07:16 -0700)]
bloblist: add blob type for DT overlay
Add blob type for DT overlay according to the update of Firmware
Handoff spec[1].
Add an inline header to represent the 'subtype' in a DT overlay
blob payload.
[1] Add Transfer Entry for Devicetree Overlay
https://github.com/FirmwareHandoff/firmware_handoff/pull/74
Signed-off-by: Raymond Mao <raymond.mao@linaro.org> Reviewed-by: Tom Rini <trini@konsulko.com> Tested-by: Michal Simek <michal.simek@amd.com>
Tom Rini [Mon, 27 Apr 2026 14:05:40 +0000 (08:05 -0600)]
Merge branch 'casey/qcom-main-13Apr2026' of https://source.denx.de/u-boot/custodians/u-boot-snapdragon
Various Qualcomm additions this cycle:
* USB superspeed support for 1 platform
* Initial support for the Milos platform and the Fairphone Gen 6
(chainloaded from ABL)
* Improved support for booting with OP-TEE on supported platforms
* Initial basic power domain support
Notably there is a generic change to the device core, missing power
domains will no longer cause a device to fail probe and instead will
just print a warning. This shouldn't affect any existing platforms.
Aswin Murugan [Tue, 24 Mar 2026 17:59:13 +0000 (23:29 +0530)]
qcom_defconfig: Disable EFI_HAVE_RUNTIME_RESET in qcom_defconfig
Qualcomm platforms rely on the kernel to manage specialized reboot modes
such as EDL, bootloader entry, and other vendor-specific reset flows.
Allowing U-Boot to override these via EFI runtime reset services leads to
incorrect behavior when the kernel issues advanced reboot requests.
Now that EFI_HAVE_RUNTIME_RESET is exposed as a user-configurable Kconfig
option, disable it for qcom_defconfig so that the kernel retains full
control over reboot handling on Qualcomm SoCs.
This ensures that EFI runtime reboot callbacks are not registered on
these platforms, preventing conflicts with kernel-managed PSCI reset
paths.
Aswin Murugan [Tue, 24 Mar 2026 17:59:12 +0000 (23:29 +0530)]
efi_loader: make EFI_HAVE_RUNTIME_RESET a user-selectable option
Expose EFI_HAVE_RUNTIME_RESET as a proper Kconfig boolean with a prompt
so platforms can explicitly enable or disable advertising the EFI reset
runtime service.
The current PSCI-based EFI runtime reset implementation is always
enabled whenever CONFIG_PSCI_RESET is selected, but it does not support
passing the additional arguments required for specialized reset modes.
As a result, reboot requests such as bootloader mode or EDL mode cannot
be propagated correctly and instead fall back to a normal reboot.
By making EFI_HAVE_RUNTIME_RESET user-configurable, platforms that
depend on extended PSCI reset can now explicitly disable EFI runtime
reset handling even when CONFIG_PSCI_RESET is enabled, ensuring
that the kernel retains full control of advanced reboot paths.
Default behavior for existing platforms remains unchanged.
dts: qcs6490-rb3gen2: Remove USB controller dr_mode override
Remove the USB controller dr_mode override from the u-boot device
tree. The upstream Linux device tree already configures the USB
controller with dr_mode = "otg", which supports both host and
peripheral modes including fastboot.
The previous override to "host" mode prevented fastboot from working
as it requires peripheral mode support. By removing this override,
the upstream OTG configuration is inherited, enabling fastboot while
maintaining host mode capability through the usb-role-switch
property.
Luca Weiss [Wed, 18 Mar 2026 12:46:30 +0000 (13:46 +0100)]
regulator: qcom-rpmh-regulator: add support for PM7550 regulators
Add the PM7550 regulator data found on Qualcomm Milos devices.
The tables are imported from the Linux driver (tag v7.0-rc4). The SMPS
regulators were not added now.
Sumit Garg [Tue, 27 Jan 2026 06:23:41 +0000 (11:53 +0530)]
board/qualcomm: Introduce TF-A and OP-TEE config fragment
Recently upstream TF-A/OP-TEE has started gaining support for Qcom
platforms. RB3Gen2 being the first one and more to come. U-Boot in
corresponding boot flow is packaged as a position independent executable.
So, lets add a generic U-Boot config fragment for Qcom platforms to
support TF-A/OP-TEE based TrustZone stack. Build command:
$ ./scripts/kconfig/merge_config.sh \
configs/qcom_defconfig \
board/qualcomm/tfa-optee.config
$ make -j`nproc` DEVICE_TREE=qcom/qcs6490-rb3gen2
For more information refer here:
https://trustedfirmware-a.readthedocs.io/en/latest/plat/qti/rb3gen2.html
Sumit Garg [Tue, 27 Jan 2026 06:23:40 +0000 (11:53 +0530)]
mach-snapdragon: of_fixup: Add OP-TEE DT fixup support
Add support for OP-TEE live tree DT fixup support which enables U-Boot
OP-TEE driver to be probed. As well as the EFI DT fixup protocol allows
the live tree fixup to be carried over to the OS for the OP-TEE driver
in the OS to probe as well.
Note that this fixup only gets applied if OP-TEE support is detected via
checking for OP-TEE message UID.
Sumit Garg [Tue, 27 Jan 2026 06:23:39 +0000 (11:53 +0530)]
tee: optee: Export OP-TEE message UID check API
OP-TEE message UID check API can be useful to know whether OP-TEE
is enabled on not assuming the corresponding SMC call is properly
handled if OP-TEE is not supported.
This API can be used by platform code to know OP-TEE presence and
on that basis OP-TEE DT node can be added as part of DT fixups for
the OP-TEE driver probe to happen for both U-Boot and Linux.
drivers: sysreset: Add sysreset op that can take arguments
Add a 'request_arg' op to struct sysreset_ops to enable sysreset drivers
to receive arguments given to the 'reset' command. Process the
request_arg() op before the usual request() op.
arm: psci: Add API to check for support of specific PSCI function
Add an API to check if a specific PSCI function is supported or not.
This is based on the psci_features() function present in Linux kernel
(drivers/firmware/psci/psci.c).
arch: arm: mach-snapdragon: Auto-detect USB SSPHY driver support
Automatically detect super-speed USB PHY driver availability and
skip the USB speed fixup if driver is available, eliminating the need
for manual configuration.
Previously, U-Boot unconditionally limited USB to high-speed mode
on all Qualcomm platforms because most lacked super-speed PHY
drivers.
This change implements runtime detection that checks if a PHY
driver exists for the super-speed PHY node referenced by the DWC3
controller. The fixup is automatically skipped when a compatible
driver is found, allowing the hardware to operate at full
capability. Platforms without super-speed PHY drivers continue to
receive the fixup automatically.
Add support for the Qualcomm QMP USB3-DP Combo PHY found on
SC7280 and QCM6490 platforms. This driver currently implements
USB3 super-speed functionality of the combo PHY.
The QMP Combo PHY is a dual-mode PHY
that can operate in either USB3 mode or DisplayPort mode. This
initial implementation focuses on USB3 mode to enable Super-Speed
USB support.
Taken from Linux commit 3d25d46a255a ("pmdomain: qcom: rpmhpd: Add rpmhpd support for SM8750")
This patch is dependent on this patch: https://lore.kernel.org/u-boot/20251112164204.1557934-1-aswin.murugan@oss.qualcomm.com/
Enabled and tested the driver on Qualcomm RB3 Gen2 (QCS6490) board.
drivers: usb: dwc3: Add delay after core soft reset
Add a 100 ms delay after clearing the core soft reset bit to ensure
the DWC3 controller has sufficient time to complete its reset
sequence before subsequent register accesses.
Without this delay, USB initialization can fail on some Qualcomm
platforms, particularly when using super-speed capable PHYs like
the QMP USB3-DP Combo PHY on SC7280/QCM6490.
Taken from Linux commit f88359e1588b ("usb: dwc3: core: Do core softreset when switch mode")
Allocate a 1 MiB LMB region for fdtoverlay_addr_r when
CONFIG_OF_LIBFDT_OVERLAY is enabled, allowing runtime application of
DT overlays on Snapdragon platforms.
This is useful for Android-based boot flows where the final DT passed
to the kernel must contain modified /firmware/android/fstab entries.
One use case is redirecting system and vendor partitions to microSD
storage instead of internal eMMC without rebuilding the base DTB.
The allocation is conditional on CONFIG_OF_LIBFDT_OVERLAY and has no
effect on boards that do not enable overlay support.
Aswin Murugan [Fri, 13 Feb 2026 11:10:08 +0000 (16:40 +0530)]
mach-snapdragon: Remove RPMH power domain DT fixup code
Remove the device tree fixup code that was stripping power-domains
properties from device tree nodes. This fixup was a temporary
workaround needed when RPMH power domain driver support was not
available in U-Boot.
Now that RPMH power domain driver support has been added, the power
domain properties can be preserved in the device tree, allowing proper
power domain management. If a suitable power domain driver is not found
for the power-controller node, it will be handled with a warning in
dev_power_domain_ctrl().
Aswin Murugan [Fri, 13 Feb 2026 11:10:07 +0000 (16:40 +0530)]
power-domain: Add warning when power-domain driver is missing
Update dev_power_domain_ctrl() to log a warning if the power-domain
driver is not found (-ENODEV). Return 0 in this case to allow continued
execution, while preserving error handling for other failures.
power-domain: Add QCOM RPMH Power Domain Driver Support
Added support for Qualcomm RPMH power domain driver, responsible
for managing power domains on Qualcomm SoCs. This is a port of
the Linux RPMHPD driver [1] and sa8775p related changes. The
power domain driver currently has support to power on and off
MMCX power domain of sa8775p; support for other soc entries power
domains are stubbed, in future, the required soc support can be
added.
usb: gadget: rcar: Add support for RZ/G2L (R9A07G044)
The Renesas RZ/G2L (and RZ/G2LC) USBHS controller requires the
CNEN bit in the SYSCFG register to be set for function operation.
Additionally, its CFIFO is byte-addressable.
Introduce a new renesas_usbhs_driver_param structure for the
RZ/G2L SoC and link it via the udevice_id data pointer. Update
usbhs_probe() to accept the udevice pointer to retrieve these
parameters during initialization.
This alignment follows the logic used in the Linux kernel
renesas_usbhs driver.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
usb: gadget: rcar: Add support for reset controller
Some Renesas SoCs, such as the RZ/G2L, require the USBHS core to
be explicitly deasserted from reset before register access is
possible.
Update the OTG probe to handle a bulk reset controller. To maintain
hardware stability, the reset is deasserted after clocks are
enabled in probe(), and asserted before clocks are disabled
in remove().
Update the error paths in probe to ensures clocks are disabled
if the reset initialization fails.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
usb: gadget: rcar: Fix gadget registration lifecycle in remove
The driver currently fails to unregister the USB gadget when the
device is removed or the driver is unbound. This leads to dangling
pointers in the UDC core and potential memory corruption.
Add a call to usb_del_gadget_udc() in the remove path to ensure
a clean teardown of the gadget interface.
Reviewed-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Signed-off-by: Michele Bisogno <micbis.openwrt@gmail.com>
Levi Shafter [Fri, 17 Apr 2026 22:45:09 +0000 (16:45 -0600)]
Makefile: fix host CPP pollution in cmd_gen_envp
Commit 2956a84ba701 ("Makefile: don't use CFLAGS for environment text
file") switched cmd_gen_envp to use $(cpp_flags) so that KCPPFLAGS would
be honored when preprocessing the environment text file. However,
cpp_flags also includes $(PLATFORM_CPPFLAGS), which carries
architecture-specific flags such as -march=armv8-a+crc set by
arch/arm/Makefile for CONFIG_ARM64_CRC32=y targets. These flags are
appropriate for cross-compiled object files but cause the host CPP
invocation to fail on x86 build machines:
cc1: error: bad value ('armv8-a+crc') for '-march=' switch
KBUILD_CPPFLAGS already accumulates the user-supplied KCPPFLAGS via
"KBUILD_CPPFLAGS += $(KCPPFLAGS)", providing the behaviour 2956a84
intended without pulling in target architecture flags. Use it directly.
Fixes: 2956a84ba701 ("Makefile: don't use CFLAGS for environment text file") Signed-off-by: Levi Shafter <levi.shafter@elder-tomes.com> Reviewed-by: Simon Glass <sjg@chromium.org>
tools/asn1_compiler.c: In function ‘tokenise’:
tools/asn1_compiler.c:442:37: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
442 | dir = bsearch(&tokens[tix], directives,
| ^
tools/asn1_compiler.c: In function ‘main’:
tools/asn1_compiler.c:632:11: warning:
assignment discards ‘const’ qualifier from pointer target type
[-Wdiscarded-qualifiers]
632 | p = strchr(grammar_name, '.');
| ^
Marek Vasut [Mon, 20 Apr 2026 01:23:07 +0000 (03:23 +0200)]
common: update: Fix TFTP return value handling
The net_loop() returns 1 on success, but update_load() returns 0 on
success. Do not assign rv which is the return value of update_load()
to net_loop(), instead assign net_loop() return value to a temporary
variable and then update rv only if the temporary variable is negative.
This way the update_load() now correctly returns 0 on tftp success and
1 only on failure.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
It might still be a positive number due to the call to sqfs_disk_read.
This only happens when reading a file from an uncompressed squashfs.
I found this by trying to boot using the extlinux bootmethod, where
positive values are treated as errors.
Signed-off-by: Michael Zimmermann <sigmaepsilon92@gmail.com> Acked-by: Richard Genoud <richard.genoud@bootlin.com> Reviewed-by: Simon Glass <sjg@chromium.org>
net: zynq_gem: Clear stale speed bits in NWCFG before setting new ones
Commit ecba4380ad26 ("net: zynq_gem: Update the MDC clock divisor in the
probe function") changed zynq_gem_init() from a direct register write to
a read-modify-write pattern in order to preserve MDC clock divider bits.
However, the old speed selection bits (SPEED100/SPEED1000) are never
cleared before OR-ing in the new value.
When the PHY renegotiates at a different speed between successive calls
to zynq_gem_init() (e.g. link flapping from 1 Gbps to 100 Mbps on a
marginal cable), both SPEED100 and SPEED1000 end up set simultaneously
in NWCFG. This confuses the GEM hardware and no frames are received.
Fix by explicitly clearing both speed bits before merging the new
configuration, so only the currently negotiated speed is ever active.
Michal Simek [Thu, 16 Apr 2026 17:32:02 +0000 (19:32 +0200)]
fpga: xilinx: Add option to skip bitstream ID check
Add environment variable 'fpga_skip_idcheck' that when set to '1' or
'y' allows bypassing the device ID validation during bitstream loading.
This is useful for loading bitstreams on devices whose ID codes are not
yet recorded in the SOC driver.
Reinitialize RX BDs and rewrite rxqbase on every init instead of only
on the first init. This ensures a clean BD state on every init for all
GEM configurations.
For AMD Versal Gen 2 10GBE this is required since the USX block
resets the RX DMA pointer to rxqbase on each init, so BDs must be
rebuilt each time to stay in sync with hardware.
net: zynq_gem: add SPEED_10000 case in clock rate selection
Add SPEED_10000 case in the speed switch with the fixed 150 MHz
tx_clk rate. Without this, clk_rate stays 0 for 10000 Mbps and
clk_set_rate(0) on a fixed clock aborts initialization.
Michal Simek [Tue, 7 Apr 2026 08:07:11 +0000 (10:07 +0200)]
cmd: fpga: Fix wrong preprocessor guard for loadb help text
The help text for the "fpga loadb" command was incorrectly guarded by
CONFIG_CMD_FPGA_LOADP instead of CONFIG_CMD_FPGA_LOADB. This meant the
loadb help text would only be shown when LOADP was enabled, rather than
when LOADB was enabled.
Fix the preprocessor condition to use the correct config option.
Michal Simek [Tue, 7 Apr 2026 10:34:24 +0000 (12:34 +0200)]
board: xilinx: zynqmp: Register alternate FPGA device for zu63dr_SE
The zu63dr_SE and zu67dr_SE devices share the same silicon ID code
0x046D7093 and cannot be distinguished at runtime. The SOC driver
reports zu67dr_SE for this ID, which causes fpga loadb to reject
zu63dr_SE bitstreams.
Register zu63dr_SE as an alternate FPGA device when zu67dr_SE is
detected. This allows users to load either bitstream by selecting
the appropriate device number:
- Device 0 (zu67dr_SE): fpga loadb 0 ${loadaddr} ${filesize}
- Device 1 (zu63dr_SE): fpga loadb 1 ${loadaddr} ${filesize}
Pranav Sanwal [Fri, 27 Mar 2026 12:10:14 +0000 (17:40 +0530)]
arm: versal2: Map PCIe DBI and config regions when PCIe is enabled
The AMD Versal Gen 2 PCIe host controller places its DBI registers
(0x100000000000, 1 MB) and config space (0x100000100000, 255 MB)
above 1 TB. Without MMU entries covering these ranges, U-Boot faults
when the PCIe driver accesses them.
The two regions are merged into a single entry as these are
contiguous and share identical MMU attributes. Add this
entry under a CONFIG_IS_ENABLED(PCIE_DW_AMD) guard so it is only
included when the PCIe driver is configured. VERSAL2_MEM_MAP_USED is
adjusted from 5 to 6 accordingly, keeping the DRAM bank index correct.
Add support for the DesignWare-based PCIe host controller found in
AMD Versal2 SoCs. This enables PCIe functionality (e.g. NVMe storage)
on boards such as the VEK385.
The driver builds on the existing pcie_dw_common infrastructure and
adds Versal2-specific handling: it maps the SLCR register region to
mask and clear TLP interrupt status bits, parses dbi/config/atu/slcr
register regions from device tree, and supports an optional PERST#
GPIO on child nodes for endpoint reset sequencing. The outbound iATU
is programmed for the non-prefetchable memory window from device tree
ranges.
Padmarao Begari [Fri, 27 Mar 2026 10:10:32 +0000 (15:40 +0530)]
clk: versal: Fix out-of-bounds parent id for DUMMY_PARENT
When a clock parent entry is DUMMY_PARENT (0xFFFFFFFE), masking it
with CLK_PARENTS_ID_MASK (0xFFFF) produces the value 0xFFFE (65534).
This value is stored in parent->id and later used as a clock array
index in versal_clock_get_parentid(). Since clock_max_idx is
typically 228, accessing clock[65534] is out-of-bounds, and the
garbage value read is used as a clock ID in subsequent clock rate
calculations, eventually causing U-Boot to crash. This is observed
as a crash during "clk dump" on AMD Versal Gen 2.
Fix this by setting parent->id = 0 for DUMMY_PARENT entries.
Michal Simek [Mon, 23 Mar 2026 16:09:15 +0000 (17:09 +0100)]
net: xilinx: Reject broadcast and multicast packets in AXI Ethernet MAC
Set the XAE_RAF_BCSTREJ_MASK bit in the Reset and Address Filter (RAF)
register during hardware initialization to make the MAC drop incoming
frames with broadcast destination address. This avoids unnecessary
broadcast traffic processing by the CPU.
Additionally, when IPv6 is not enabled (CONFIG_IPV6), also set the
XAE_RAF_MCSTREJ_MASK bit to reject multicast frames. Multicast
rejection is skipped when IPv6 is configured because IPv6 Neighbor
Discovery and DHCPv6 rely on multicast.
Expose the RAF register (offset 0x0) in struct axi_regs which was
previously hidden in a reserved array.
Tom Rini [Wed, 22 Apr 2026 22:52:40 +0000 (16:52 -0600)]
Merge patch series "test: Refactor FIT test for clarity and extensibility"
Simon Glass <sjg@chromium.org> says:
This series reworks the FIT test (test_fit.py) to make it easier to
maintain and extend. It fixes the buildconfigspec so the test actually
runs on sandbox, avoids unnecessary U-Boot restarts, renames the main
test for easier selection, adds a missing-kernel check, fixes Python
warnings, converts the test to use a class, splits into separate test
functions, and adds Sphinx documentation.
Simon Glass [Mon, 13 Apr 2026 12:59:59 +0000 (06:59 -0600)]
test: Add documentation for the FIT test
Add a Sphinx automodule page for test_fit.py so it appears in the pytest
documentation alongside the other test modules. The index already uses a
glob pattern, so this is picked up automatically.
Simon Glass [Mon, 13 Apr 2026 12:59:52 +0000 (06:59 -0600)]
test: fit: Drop the fit_signature buildconfigspec
The test_fit test requires buildconfigspec('fit_signature') but does
not exercise signature verification. The ITS template includes a
signature-1 node, but mkimage only needs TOOLS_FIT_SIGNATURE (a host
tool option) to handle it, not CONFIG_FIT_SIGNATURE in the U-Boot
binary.
Since sandbox does not enable CONFIG_FIT_SIGNATURE, the test is silently
skipped on every run. Change the marker to buildconfigspec('fit') which
is all the test actually needs.
Gregor Herburger [Mon, 13 Apr 2026 15:24:54 +0000 (17:24 +0200)]
cli: flush stdin before enabling cli
Currently there is no possibility to flush stdin after autocommands are
executed. If in the bootcmd the stdin is changed, e.g. from nulldev to
serial, it could happen that junk characters sit in the fifo and appear
on the cli.
Add a option to clear stdin before starting the CLI.
Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Reviewed-by: Simon Glass <sjg@chromium.org>
Gregor Herburger [Mon, 13 Apr 2026 15:24:53 +0000 (17:24 +0200)]
console: add console_flush_stdin()
Add a common helper console_flush_stdin() to drain all pending
characters from stdin. This consolidates the open-coded
while (tstc()) getchar() pattern that appeared in multiple places
across the tree.
Signed-off-by: Gregor Herburger <gregor.herburger@linutronix.de> Reviewed-by: Alexander Sverdlin <alexander.sverdlin@siemens.com> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Reviewed-by: Simon Glass <sjg@chromium.org>
board: ti: cape_detect: Add overlay name lookup table for extension boards
Some extension boards have EEPROM part numbers that do not directly match
their devicetree overlay filenames. Introduce a static name_mapping table
and a set_cape_overlay() helper that translates the part number and version
strings read from the EEPROM into the correct overlay filename.
When no entry matches, fall back to the existing behavior of constructing
the overlay name as "<part_number>-<version>.dtbo" directly from the
EEPROM content.
Add an initial entry mapping BB-GREEN-HDMI revision 00A0 to
am335x-bone-hdmi-00a0.dtbo.
configs: aquila-am69: Set ENV_MMC_EMMC_HW_PARTITION and ENV_RELOC_GD_ENV_ADDR
Set CONFIG_ENV_MMC_EMMC_HW_PARTITION=1 to store the environment in the
eMMC first hardware boot partition instead of defaulting to 0 (user
data area), where the rootfs and data partitions normally reside,
risking corruption. This keeps the full boot stack self-contained in
the eMMC hardware boot partition.
Enable CONFIG_ENV_RELOC_GD_ENV_ADDR so that gd->env_addr is adjusted by
the relocation offset during U-Boot relocation. Without it, gd->env_addr
keeps pointing to the pre-relocation address of the default
environment, leading to incorrect environment access before env_load()
completes.
Philip Molloy [Wed, 1 Apr 2026 09:31:56 +0000 (09:31 +0000)]
board: adi: Fix exception when using standalone SoM
Although less common, ADSP SoM boards can be operated standalone without
a carrier board. The SoM can be powered over USB-C by moving the jumper
on JP1.
The board configuration needs to be heavily refactored to reduce the
number of defconfigs and leverage the devicetree. The TI DP83867
support, which is dependent on that configuration, needs to be removed.
Until then this change allows the same U-Boot binary to work correctly
both with carrier boards and the standalone SoM.
The carrier board initialization code in somcrr_ezkit.c and
somcrr_ezlite.c calls gpio_hog_lookup_name() to find ethernet
control GPIOs, but does not check if the lookup succeeds before
using the returned pointers.
When running on a standalone SoM without a carrier board, these
GPIO hogs do not exist in the device tree. The gpio_hog_lookup_name()
function returns -ENODEV and sets the pointer to NULL, but the code
continues to call dm_gpio_set_value() with uninitialized pointers,
causing a synchronous abort exception:
Marek Vasut [Thu, 19 Feb 2026 00:33:25 +0000 (01:33 +0100)]
gunzip: Implement chunked decompression
The current gzwrite() implementation is limited to 4 GiB compressed
input buffer size due to struct z_stream_s { uInt avail_in } member,
which is of type unsigned int. Current gzwrite() implementation sets
the entire input buffer size as avail_in and performs decompression
of the whole compressed input buffer in one round, which limits the
size of input buffer to 4 GiB.
Rework the decompression loop to use chunked approach, and decompress
the input buffer in up to 4 GiB - 1 kiB avail_in chunks, possibly in
multiple decompression rounds. This way, the compressed input buffer
size is limited by gzwrite() function 'len' parameter type, which is
unsigned long.
In case of sandbox build, include parsing of 'gzwrite_chunk'
environment variable, so the chunked approach can be thoroughly tested
with non default chunk size. For non-sandbox builds, the chunk size is
4 GiB - 1 kiB.
The gzwrite test case is extended to test various chunk sizes during
gzwrite decompression test.
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
virtio: mmio: Return error codes on probe failures
Currently, virtio_mmio_probe() returns 0 when it encounters an invalid
magic value, an unsupported version, or a dummy device (ID 0). In
U-Boot's driver model, returning 0 indicates a successful probe. This
causes the system to incorrectly register and activate invalid or
placeholder devices, potentially leading to undefined behavior or
crashes later on.
Update the probe function to return appropriate error codes (-ENODEV
for invalid magic values and dummy devices, and -ENXIO for unsupported
versions). This fix correctly instructs the DM to abort the binding
process.
Fixes: fdc4aca89ecb ("virtio: Add virtio over mmio transport driver") Signed-off-by: Kuan-Wei Chiu <visitorckw@gmail.com> Acked-by: Daniel Palmer <daniel@thingy.jp>
- Convert TQMA7 boards to SPL.
- Use second Ethernet MAC also from fuse on i.MX dhelectronics boards.
- Add support for Toradex Verdin iMX95.
- Drop SPL_POWER_LEGACY from imx8m boards.
- Increase the Aquantia Ethernet PHY reset timeout.
configs: libretech-cc_defconfig: enable EFI Capsule on Disk
Everything is in place to allow this board to support EFI Capsule updates.
Enable everything needed to support Capsule updates, as well as Capsule
on Disk. All this allows updating U-Boot on eMMC directly from linux using
fwupd. Also enable DFU_MMC, which is a requirement for EFI Capsule flashing
to eMMC/SD to work.
configs: libretech-ac_defconfig: enable EFI Capsule on Disk
Everything is already in place for EFI capsule updates, so enabling
Capsule on Disk is fairly trivial. This allows updating U-Boot on SPI
flash from Linux using fwupd's Capsule support.
Previously, Amlogic SoCs defined their own reset_cpu() implementation
that essentially just did what the sysreset PSCI driver already
supports. To reduce duplication (and allow for EFI Capsule on Disk
support), make use of it instead of a board-specific reset_cpu.
This does not affect SPL, as in that stage we do not actually have PSCI
(BL31 is not loaded yet at that point). Also, boards that don't select
PSCI support in their config will not have it enabled.
arm: mach-meson: provide reset_cpu only when SYSRESET is disabled
This is in preparation of enabling SYSRESET across all Amlogic boards by
default. SYSRESET brings its own reset_cpu implementation which will
conflict with the one defined in board-common.c.
SPL however will not have SYSRESET enabled (due to overhead in the final
image, as we have very little space to work with), and thus will still
need that reset_cpu to be defined. Furthermore, some boards do not enable
PSCI support in U-Boot, so they may still need this implementation.
Guard reset_cpu inside #ifdef to only compile it in when SYSRESET is not
enabled.
Neil Armstrong [Wed, 22 Apr 2026 08:48:58 +0000 (10:48 +0200)]
clk: meson: do not fail when setting SD_EMMC_x_CLK0
Since Linux v7.0, the MMC controllers has the following properties:
assigned-clocks = <&clkc CLKID_SD_EMMC_x_CLK0>;
assigned-clock-rates = <24000000>;
Which causes mmc controllers to fail in probe.
Make sure we do not fail until we properly implement rate setup.
Marek Vasut [Sun, 29 Mar 2026 23:11:36 +0000 (01:11 +0200)]
ufs: core: Fix heap corruption due to out of bounds write
The ufshcd_read_string_desc() can perform out of bounds write and
corrupt heap in case the input utf-16 string contains code points
which convert to anything more than plain 7-bit ASCII string.
This occurs because utf16_to_utf8(dst, src, size) in U-Boot behaves
differently than Linux utf16s_to_utf8s(..., maxlen), but the porting
process did not take that into consideration. The U-Boot variant of
the function converts up to $size utf-16 fixed-length 16-bit input
characters into as many 1..4 Byte long variable-length utf-8 output
characters. That means for 16 Byte input, the output can be up to 64
Bytes long. The Linux variant converts up utf-16 input into up to
$maxlen Bytes worth of utf-8 output, but stops at the $maxlen limit.
That means for 16 Byte input with maxlen=32, the processing will stop
after writing 32 output Bytes.
In case of U-Boot, use of utf16_to_utf8() leads to potential corruption
of data past the $size Bytes and therefore corruption of surrounding
content on the heap.
The fix is as simple, allocate buffer that is sufficient to fit the
utf-8 string. The rest of the code in ufshcd_read_string_desc() does
correctly limit the buffer to fit into the DMA descriptor afterward.
Peng Fan [Tue, 21 Apr 2026 13:41:27 +0000 (21:41 +0800)]
imx8mq: phanbell: enable SPL DM
Switch the Phanbell i.MX8MQ SPL to full Driver Model (DM) boot flow by
moving early device initialization into devicetree and enabling the
required SPL DM subsystems.
Mark GPIO, USDHC, pinctrl, and regulator nodes with bootph-pre-ram so
they are available during SPL. With DM handling MMC and power rails,
remove legacy board-specific USDHC, GPIO, and pad setup code from SPL.
Update the SPL initialization sequence to use spl_early_init(), clears
BSS earlier, and explicitly enables USDHC clocks before handing off to
board_init_r().
Peng Fan [Tue, 21 Apr 2026 13:41:26 +0000 (21:41 +0800)]
imx8mq: kontron: migrate PITX-IMX8M to DM PMIC framework
Migrate the Kontron PITX-IMX8M board from the legacy power framework
to the DM PMIC infrastructure.
The SPL power initialization is converted to use DM_PMIC_PFUZE100,
dropping all legacy I2C, GPIO, pinmux, and MMC setup code that is
now handled through the device tree and driver model instead.
Key changes:
- Switch PFUZE100 access to DM PMIC APIs
- Enable SPL OF_CONTROL and mark required nodes with bootph*
- Remove legacy I2C and power configuration
- Enable SPL DM, pinctrl, regulator, and PMIC support
- Adjust SPL stack placement for DM usage
Peng Fan [Tue, 21 Apr 2026 13:41:22 +0000 (21:41 +0800)]
imx8mq: evk: Migrate to DM PMIC framework
Migrate the i.MX8MQ EVK board to the Driver Model (DM) PMIC framework.
This replaces legacy PMIC handling with DM_PMIC and enables proper
device-model support during SPL.
As part of this transition, enable CONFIG_SPL_DM and the required
DM subsystems such as I2C, PINCTRL, MMC, GPIO, and regulators so the
SPL boot flow continues to work correctly.
Board-specific SPL code is simplified accordingly by removing legacy
I2C, USDHC, and PMIC handling, relying instead on device tree
descriptions and DM drivers.
Switch PFUZE100 object linkage to be phase-aware and fix build issues
when using driver model PMIC support.
The PFUZE100 helper code is reworked to:
- Build pfuze.o only when CONFIG_(SPL_)DM_PMIC_PFUZE100 is enabled
- Use CONFIG_IS_ENABLED(DM_PMIC_PFUZE100) for proper DM/non-DM selection
- Align function signatures and implementations with DM PMIC APIs
- Use udevice-based pmic access for DM and legacy pmic for non-DM
- Avoid mixing struct pmic and struct udevice in the same build
configuration
No functional change intended beyond fixing DM support and build
consistency.
Peng Fan [Tue, 21 Apr 2026 13:41:20 +0000 (21:41 +0800)]
mx6: sabreauto/sd: Exclude power_init_board from SPL build
To mx6sabreauto and mx6sabresd, power_init_board is called in board_r phase.
After CONFIG_SPL_DM_PMIC_PFUZE100 included, there will be build error to build
power_init_board() when CONFIG_SPL_DM_PMIC_PFUZE100 is not enabled.
Peng Fan [Tue, 21 Apr 2026 13:41:19 +0000 (21:41 +0800)]
imx8mq: Correct signed_hdmi firmware position
signed_hdmi_imx8m.bin is already signed and has a IVT header. It should not
be put in u-boot-spl-mkimage.signed.bin. Move it to head of flash.bin
following NXP imx-mkimage. Keeping it in u-boot-spl-mkimage.signed.bin also
consumes a lot of TCM space which is not expected.
While moving it to head of flash.bin, other changes are required,
u-boot.itb is put at sector 768 per defconfig, so u-boot.itb binman
offset should be updated and it should be moved out from binman section.
Also binman symbol address are updated, so need to subtract u-boot-spl
image_pos + CONFIG_SPL_TEXT_BASE to find the correct location of ddr phy
firmware.
Because there is 1KB padding in HDMI firmware, use 32KB when burning
flash.bin to sd card.
Peng Fan [Tue, 21 Apr 2026 13:41:18 +0000 (21:41 +0800)]
imx8mq: cm: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().
Peng Fan [Tue, 21 Apr 2026 13:41:17 +0000 (21:41 +0800)]
imx8mq: pico: drop redundant gd clearing in board_init_f
The global data (gd) area is already zeroed in
board_init_f_init_reserve() before board_init_f() is called.
Remove the duplicate gd clearing from board_init_f().
projects / thirdparty / u-boot.git / log
