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16 months agoMerge tag 'efi-2025-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Tom Rini [Mon, 17 Mar 2025 14:00:40 +0000 (08:00 -0600)] 
Merge tag 'efi-2025-04-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi

Pull request efi-2025-04-rc5

CI:

* https://source.denx.de/u-boot/custodians/u-boot-efi/-/pipelines/25196

UEFI:

* Export _start symbol from crt0_*_efi stubs
* Move .dynamic out of .text in EFI
* scripts/Makefile.lib: Preserve the .dynstr section as well

Documentation:

* net: miiphybb: Convert documentation to rst

16 months agoMerge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh
Tom Rini [Mon, 17 Mar 2025 13:59:39 +0000 (07:59 -0600)] 
Merge branch 'master' of https://source.denx.de/u-boot/custodians/u-boot-sh

These are mainly DBSC5 DRAM controller specific fixes and updates for
current release. There is the long overdue BL31 start V4H board code as
well, that should be in the current release to make the V4H White Hawk
board usable with SPL, and a fallback U-Boot PSCI implementation
enablement to make sure the board always boots. And finally, there are
two comment fixes.

16 months agoqcom_defconfig: enable SYSRESET_QCOM_PSHOLD
Sam Day [Sat, 25 Jan 2025 19:59:27 +0000 (19:59 +0000)] 
qcom_defconfig: enable SYSRESET_QCOM_PSHOLD

MSM8916 devices use this instead of PSCI.

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250125-msm8916-sysreset-v1-3-62073932ff0e@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agosysreset: qcom-pshold: remove ARCH_IPQ40XX dependency
Sam Day [Sat, 25 Jan 2025 19:59:20 +0000 (19:59 +0000)] 
sysreset: qcom-pshold: remove ARCH_IPQ40XX dependency

Depending on ARCH_IPQ40XX is too restrictive, as this architecture is
explicitly armv7. This driver is also used on msm8916 devices, which
have cortex-a53 armv8 cores.

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250125-msm8916-sysreset-v1-2-62073932ff0e@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agomach-snapdragon: use PSCI sysreset driver
Sam Day [Sat, 25 Jan 2025 19:59:15 +0000 (19:59 +0000)] 
mach-snapdragon: use PSCI sysreset driver

Drop the `board_reset` function from mach-snapdragon board code, and
instead use the standard PSCI sysreset driver.

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250125-msm8916-sysreset-v1-1-62073932ff0e@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoqcom_defconfig: enable PINCTRL_QCOM_SC7280
Caleb Connolly [Wed, 22 Jan 2025 15:02:52 +0000 (16:02 +0100)] 
qcom_defconfig: enable PINCTRL_QCOM_SC7280

Acked-by: Christopher Obbard <christopher.obbard@linaro.org>
Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-2-8bdba72e6366@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agopinctrl: qcom: add sc7280 pinctrl driver
Caleb Connolly [Wed, 22 Jan 2025 15:02:51 +0000 (16:02 +0100)] 
pinctrl: qcom: add sc7280 pinctrl driver

Introduce a pinctrl driver for SC7280/QCM6490, this is used by the RB3
Gen 2, FairPhone 5 and other devices.

Tested-by: Christopher Obbard <christopher.obbard@linaro.org>
Link: https://lore.kernel.org/r/20250122-pinctrl-sc7280-v1-1-8bdba72e6366@linaro.org
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agomach-snapdragon: handle platforms without PSCI support
Sam Day [Mon, 27 Jan 2025 14:48:55 +0000 (14:48 +0000)] 
mach-snapdragon: handle platforms without PSCI support

Most MSM8916 devices shipped without PSCI support. The history is quite
nuanced (a good overview can be found in [1]), but the end result is
that the upstream DTs for this SoC pretend that PSCI exists, and it's
expected that the bootloader handles the case where it doesn't. This is
codified by the de-facto bootloader for MSM8916 devices, lk2nd [2].

So we handle it here by deleting the /psci node if we detect the absence
of PSCI. We need to do this early to ensure sysreset works correctly,
since the PSCI firmware driver is PRE_RELOC and binds the PSCI sysreset
driver.

Additionally, show_psci_version is updated to check that PSCI exists.
Currently this banner outputs "PSCI: 65535.65535" on devices without
PSCI support, which isn't very useful :)

[1]: https://github.com/msm8916-mainline/linux/issues/388
[2]: https://github.com/msm8916-mainline/lk2nd/blob/8183ea2/lk2nd/smp/spin-table/spin-table.c#L237

Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250127-qcom-handle-absent-psci-v1-1-e762f2db938c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agomach-snapdragon: support parsing memory info from external FDT
Sam Day [Thu, 23 Jan 2025 12:12:14 +0000 (12:12 +0000)] 
mach-snapdragon: support parsing memory info from external FDT

qcom_parse_memory is updated to return a -ENODATA error if the passed
FDT does not contain a /memory node, or that node is incomplete (size=0)

board_fdt_blob_setup first tries to call qcom_parse_memory with the
internal FDT (if present+valid). If that fails, it tries again with the
external FDT (again, if present+valid).

When booting with an internal FDT from upstream, it's likely that this
change results in a slight performance hit, since virtually all upstream
qcom DTs lack a fully specified memory node. The impact should be
negligible, though.

qcom_parse_memory was given a detailed docstring adapted from Caleb's
original commit message that introduced the function.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Link: https://lore.kernel.org/r/20250123-qcom-parse-memory-updates-v3-1-c5332b81ea9f@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agorng: msm: keep core clock disabled when PRNG not in use
Sam Day [Wed, 12 Feb 2025 07:01:55 +0000 (07:01 +0000)] 
rng: msm: keep core clock disabled when PRNG not in use

This is how the kernel does it. APQ8016E TRM also states that this clock
can be turned off when no random numbers are needed.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-5-645cf8d3fd3c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoclk/qcom: apq8016: improve clk_enable logging
Sam Day [Wed, 12 Feb 2025 07:01:47 +0000 (07:01 +0000)] 
clk/qcom: apq8016: improve clk_enable logging

Properly warn when an unknown clock is enabled.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-4-645cf8d3fd3c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agorng: msm: don't enable PRNG if it's already enabled
Sam Day [Wed, 12 Feb 2025 07:01:39 +0000 (07:01 +0000)] 
rng: msm: don't enable PRNG if it's already enabled

msm_rng_enable is supposed to skip writing to LFSR_CFG + CONFIG
registers in the PRNG_ block if PRNG_CONFIG_HW_ENABLE is already set.
The logic to test for this was inverted.

Without this fix, the driver was causing SError aborts on my MSM8916
device. Stephan Gerhold suggested this was probably because TZ has
marked this as a protected register, since it would also be using it for
RNG.

Fixes: 033ec636fcb ("rng: Add Qualcomm MSM PRNG driver")
Suggested-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-3-645cf8d3fd3c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoclk/qcom: apq8016: add PRNG_AHB_CLK
Sam Day [Wed, 12 Feb 2025 07:01:33 +0000 (07:01 +0000)] 
clk/qcom: apq8016: add PRNG_AHB_CLK

This clock needs to be enabled for the msm-rng driver to work on
MSM8916, otherwise accessing the PRNG register block causes a data
abort.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-2-645cf8d3fd3c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoclk/qcom: apq8016: use BIT macro for clk en_vals
Sam Day [Wed, 12 Feb 2025 07:01:27 +0000 (07:01 +0000)] 
clk/qcom: apq8016: use BIT macro for clk en_vals

This reads a little bit nicer (IMO), and is consistent with the kernel.

Signed-off-by: Sam Day <me@samcday.com>
Reviewed-by: Heinrich Schuchardt <xypron.glpk@gmx.de>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250212-msm-rng-fixes-v2-1-645cf8d3fd3c@samcday.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoconfigs: add qcom_ipq9574_mmc_defconfig
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:05 +0000 (12:15 +0530)] 
configs: add qcom_ipq9574_mmc_defconfig

Introduce a defconfig for the Qualcomm IPQ9574 SoC based RDPs.
Presently supports eMMC.

Per the flash memory layout, U-Boot size cannot exceed 756KB. With this
defconfig, u-boot.mbn size is ~480KB.

Reviewed-by: Sumit Garg <sumit.garg@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-8-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agommc: msm_sdhci: Reset clocks before reconfiguration
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:04 +0000 (12:15 +0530)] 
mmc: msm_sdhci: Reset clocks before reconfiguration

U-Boot has to reconfigure the clocks that were set in the boot
loaders. However, in IPQ9574, the clocks have to be reset before
they can be reconfigured. Hence add code to do the relevant
resets.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-7-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agopinctrl: qcom: Add ipq9574 pinctrl driver
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:03 +0000 (12:15 +0530)] 
pinctrl: qcom: Add ipq9574 pinctrl driver

Add pinctrl driver for the TLMM block found in the ipq9574 SoC.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-6-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agopinctrl: qcom: Handle get_function_mux failure
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:02 +0000 (12:15 +0530)] 
pinctrl: qcom: Handle get_function_mux failure

Presently, get_function_mux returns an unsigned int and cannot
differentiate between failure and correct function value. Change its
return type to int and check for failure in the caller.

Additionally, updated drivers/pinctrl/qcom/pinctrl-*.c to accommodate the
above return type change. Only compile test done.

Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-5-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoclk/qcom: add initial clock driver for ipq9574
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:01 +0000 (12:15 +0530)] 
clk/qcom: add initial clock driver for ipq9574

Add initial set of clocks and resets for enabling U-Boot on ipq9574
based RDP platforms.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-4-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agodts: ipq9574-rdp433-u-boot: add override dtsi
Varadarajan Narayanan [Wed, 26 Feb 2025 06:45:00 +0000 (12:15 +0530)] 
dts: ipq9574-rdp433-u-boot: add override dtsi

Add initial support for the IPQ9574 MMC based RDP platforms.
Define memory layout statically.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-3-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agodoc: board/qualcomm: document RDP building/flashing
Varadarajan Narayanan [Wed, 26 Feb 2025 06:44:59 +0000 (12:14 +0530)] 
doc: board/qualcomm: document RDP building/flashing

Introducing basic support for Qualcomm IPQxxx based RDPs.
Document the build and flashing steps.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/20250226064505.1178054-2-quic_varada@quicinc.com
Signed-off-by: Caleb Connolly <caleb.connolly@linaro.org>
16 months agoscripts/Makefile.lib: efi: Preserve the .dynstr section as well
Sam Edwards [Sat, 15 Mar 2025 22:18:11 +0000 (15:18 -0700)] 
scripts/Makefile.lib: efi: Preserve the .dynstr section as well

This section is required by .dynamic and llvm-objcopy will exit with a
fatal error if it is not also preserved in the output.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
16 months agoefi_loader: Move .dynamic out of .text in EFI
Sam Edwards [Sat, 15 Mar 2025 22:18:10 +0000 (15:18 -0700)] 
efi_loader: Move .dynamic out of .text in EFI

EFI applications need to be relocatable. Ordinarily, this is achieved
through a PE-format .reloc section, but since that requires toolchain
tricks to achieve, U-Boot's EFI applications instead embed ELF-flavored
relocation information and use it for self-relocation; thus, the
.dynamic section needs to be preserved.

Before this patch, it was tacked on to the end of .text, but this was
not proper: A .text section is SHT_PROGBITS, while the .dynamic section
is SHT_DYNAMIC. Attempting to combine them like this creates a section
type mismatch. While GNU ld doesn't seem to complain, LLVM's lld
considers this a fatal linking error.

This patch moves .dynamic out to its own section, so that the output ELF
has the correct types. (They're all mashed together when converting to
binary anyway, so this patch causes no change in the final .efi output.)

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
Cc: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
16 months agoarm: riscv: efi: Export _start symbol from crt0_*_efi stubs
Sam Edwards [Sat, 15 Mar 2025 22:18:09 +0000 (15:18 -0700)] 
arm: riscv: efi: Export _start symbol from crt0_*_efi stubs

While the _start label is only intended for use locally to populate the
(hand-written) PE header, the linker script includes ENTRY(_start) which
designates it as the entry point in the output ELF, resulting in linker
warnings under some linkers (e.g. LLVM's lld) due to _start not being a
globally-visible symbol. Since  ELF is only an intermediary build
format, and the aforementioned PE header correctly points to _start, the
ENTRY(_start) directive could easily be removed to silence this warning.

However, since some developers who are debugging EFI by analyzing the
intermediary ELF may appreciate having correct entry-point information,
this patch instead promotes the _start labels to global symbols,
silencing the linker warning and making the intermediary ELF reflect the
true entry point.

This patch doesn't affect the final output binaries in any way.

Signed-off-by: Sam Edwards <CFSworks@gmail.com>
16 months agonet: miiphybb: Convert documentation to rst
Marek Vasut [Sat, 8 Mar 2025 20:49:42 +0000 (21:49 +0100)] 
net: miiphybb: Convert documentation to rst

Convert the current miiphybb documentation to rst. Rename
the README.bitbangMII to bitbangmii.rst in the process.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Signed-off-by: Heinrich Schuchardt <heinrich.schuchardt@canonical.com>
16 months agoconfigs: starfive: Add visionfive2 cadence USB configuration
Minda Chen [Thu, 6 Mar 2025 06:20:31 +0000 (14:20 +0800)] 
configs: starfive: Add visionfive2 cadence USB configuration

Add cadence USB confiuration.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
16 months agospl: starfive: visionfive2: Disable USB overcurrent pin by default.
Minda Chen [Thu, 6 Mar 2025 06:20:30 +0000 (14:20 +0800)] 
spl: starfive: visionfive2: Disable USB overcurrent pin by default.

For some JH7110 boards, USB host overcurent pin is not reserved,
To make USB host work, overcurrent pin must be disabled. So set the
pin default disabled in spl stage.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
16 months agousb: cdns: starfive: Add cdns USB driver
Minda Chen [Thu, 6 Mar 2025 06:20:29 +0000 (14:20 +0800)] 
usb: cdns: starfive: Add cdns USB driver

Add Starfive cdns USB3 wrapper driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
Tested-by: E Shattow <lucent@gmail.com>
16 months agousb: cdns: starfive: Get dr mode from wrapper device dts node
Minda Chen [Thu, 6 Mar 2025 06:20:28 +0000 (14:20 +0800)] 
usb: cdns: starfive: Get dr mode from wrapper device dts node

Cdns core driver also get dr mode from wrapper devcie dts node
to make it is same with Starfive cdns USB Linux kernel driver,
Starfive 7110 OF_UPSTREAM is enabled

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
16 months agophy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver
Minda Chen [Thu, 6 Mar 2025 06:20:27 +0000 (14:20 +0800)] 
phy: starfive: Add Starfive JH7110 PCIe 2.0 PHY driver

Add Starfive JH7110 PCIe 2.0 PHY driver, which is generic
PHY driver and can be used as USB 3.0 driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Tested-by: E Shattow <lucent@gmail.com>
16 months agophy: starfive: Add Starfive JH7110 USB 2.0 PHY driver
Minda Chen [Thu, 6 Mar 2025 06:20:26 +0000 (14:20 +0800)] 
phy: starfive: Add Starfive JH7110 USB 2.0 PHY driver

Add Starfive JH7110 USB 2.0 PHY driver, which is generic
PHY driver.

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Tested-by: E Shattow <lucent@gmail.com>
16 months agousb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()
Minda Chen [Thu, 6 Mar 2025 06:20:25 +0000 (14:20 +0800)] 
usb: cdns3: Set USB PHY mode in cdns3_drd_update_mode()

USB PHY maybe need to set PHY mode in different USB
dr mode. So translate USB PHY mode to generic PHY mode
and call generic_phy_set_mode().

Signed-off-by: Minda Chen <minda.chen@starfivetech.com>
Reviewed-by: Marek Vasut <marex@denx.de>
16 months agoram: renesas: dbsc5: Make struct renesas_dbsc5_board_config public
Marek Vasut [Sun, 16 Mar 2025 13:51:44 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Make struct renesas_dbsc5_board_config public

Make struct renesas_dbsc5_board_config {} definition public via
include/dbsc5.h, so this structure can be defined in board files
and passed into the DBSC5 DRAM driver by overriding weak function
dbsc5_get_board_data() on board level.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoram: renesas: dbsc5: Add V4H-3/V4H-5/V4H-7 OTP based detection
Marek Vasut [Sun, 16 Mar 2025 13:51:43 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Add V4H-3/V4H-5/V4H-7 OTP based detection

Add auto-detection and handling of Renesas R-Car V4H-3 and V4H-5
in addition to V4H-7 SoC variants based on OTP fuse programming.
The V4H-3 and V4H-5 variants have reduced DRAM frequency options.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoram: renesas: dbsc5: Synchronize initialization code to rev.1.10
Marek Vasut [Sun, 16 Mar 2025 13:51:42 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Synchronize initialization code to rev.1.10

Update the DRAM initialization code to match DBSC5 initialization code
rev.1.10 , which is currently the latest version available. This makes
DRAM initialization operational on Renesas R-Car V4H R8A779G0 rev.3.0.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoram: renesas: dbsc5: Fix DBTR11 calculation
Marek Vasut [Sun, 16 Mar 2025 13:51:41 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Fix DBTR11 calculation

Reinstate missing increment by two in DBTR11 calculation based
on the original DBSC5 initialization code rev.0.80. The original
code did ... ODTLon - (js2[JS2_tODTon_min] - 1) + 1 , which was
incorrectly converted into ODTLon - js2[JS2_tODTon_min], but
should have been converted to ODTLon - js2[JS2_tODTon_min] + 2.
Add the missing +2 .

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoram: renesas: dbsc5: Fix JS1 index calculation
Marek Vasut [Sun, 16 Mar 2025 13:51:40 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Fix JS1 index calculation

The JS1 index is calculated correctly, but the limiter cannot
be the max() function because the index should be lower than
JS1_USABLEC_SPEC_HI and the max() function would unconditionally
override the JS1 index to JS1_USABLEC_SPEC_HI. Use clamp() to
limit the JS1 index instead.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoram: renesas: dbsc5: Fix bitrate MD pin parsing
Marek Vasut [Sun, 16 Mar 2025 13:51:39 +0000 (14:51 +0100)] 
ram: renesas: dbsc5: Fix bitrate MD pin parsing

Fix copy paste error in MD pin handling for 5500 Mbps and 4800 Mbps case,
each should be handled by MD[19,17] == 2 and MD[19,17] == 3 respectively.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoarm64: dts: renesas: Make OTP available in SPL on R8A779G0 V4H
Marek Vasut [Sun, 16 Mar 2025 13:51:38 +0000 (14:51 +0100)] 
arm64: dts: renesas: Make OTP available in SPL on R8A779G0 V4H

The DBSC5 DRAM controller driver needs access to OTP fuses to discern
Renesas R-Car V4H-3, V4H-5 and V4H-7 SoC variants based on OTP fuse
programming. Make OTP block DT node available in U-Boot SPL DT so the
DBSC5 driver can determine its base address and read out the OTP fuses.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoarm64: renesas: Drop stale R-Car V4H SPL implementation description
Marek Vasut [Sun, 16 Mar 2025 13:51:09 +0000 (14:51 +0100)] 
arm64: renesas: Drop stale R-Car V4H SPL implementation description

The R-Car V4H SPL implementation was originally running on the Cortex-R52
core, but this is no longer the case. Majority of the SPL now runs on the
Cortex-A76 core. Drop the stale description.

Fixes: ec53fdee5bec ("arm64: renesas: Add Renesas R-Car V4H SPL implementation")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoARM: renesas: Drop stale common Makefile description
Marek Vasut [Sun, 16 Mar 2025 13:50:41 +0000 (14:50 +0100)] 
ARM: renesas: Drop stale common Makefile description

Remove stale Makefile description, this used to be valid for the
original Makefile from which the common Makefile was made generic,
but is no longer applicable to the common Makefile.

Fixes: c7d2d7f90a91 ("ARM: renesas: Simplify board Makefiles")
Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoarm64: renesas: Enable fallback PSCI on Renesas R-Car R8A779G0 V4H White Hawk
Marek Vasut [Sun, 2 Mar 2025 22:30:02 +0000 (23:30 +0100)] 
arm64: renesas: Enable fallback PSCI on Renesas R-Car R8A779G0 V4H White Hawk

Enable fallback PSCI provider on Renesas R-Car R8A779G0 V4H White Hawk board.

This fallback PSCI provider provides basic PSCI interface which can be used
by the Linux kernel, but does not provide support for bringing up additional
CPU cores or any other functionality, except for SoC level reset.

This fallback PSCI provider is intended as a fallback in case a proper PSCI
provider is not started before the Linux kernel is started. Linux kernel on
ARMv8a will fail to boot in case a PSCI provider is not available, and this
basic fallback PSCI provider assures such a boot failure cannot occur, even
if that means the system will boot in degraded mode with only one CPU core
available, that is still sufficient to perform recovery.

In the common case, a proper PSCI provider should be started as part of
the Linux kernel fitImage, as the BL31 loadable, and replace this basic
fallback PSCI provider before the Linux kernel is started.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agoarm64: renesas: Add TFA BL31 handoff support on Renesas R-Car Gen4
Marek Vasut [Sun, 2 Mar 2025 20:59:11 +0000 (21:59 +0100)] 
arm64: renesas: Add TFA BL31 handoff support on Renesas R-Car Gen4

Implement custom U_BOOT_FIT_LOADABLE_HANDLER and armv8_switch_to_el2_prep()
handling in case the TFA was loaded. The loadables handler sets up custom
handoff structure used by Renesas TFA fork in fixed location in DRAM and
indicates the TFA has been loaded.

The custom armv8_switch_to_el2_prep() handling tests whether the TFA BL31
was previously loaded and the custom handoff structure was set up, and if
so, jumps to TFA BL31 which switches from EL3 to EL2 and then returns to
U-Boot just past bl in armv8_switch_to_el2() to finish starting the Linux
kernel.

The jump to Linux through TFA works in such a way that the custom
armv8_switch_to_el2_prep() handler configures the custom handoff structure
such that the target jump address of the TFA BL31 on exit is set to the
armv8_switch_to_el2() + 4, which is just past the bl, and just before the
U-Boot code which implements the Linux kernel boot from either EL. The
registers passed through the TFA BL31 are all the registers passed into
armv8_switch_to_el2_prep() to assure maximum compatibility with all the
boot modes. The armv8_switch_to_el2_prep() handler jumps to the TFA BL31,
which does its setup, drops EL from EL3 to EL2 and finally jumps to the
armv8_switch_to_el2() + 4 entry point, which then allows U-Boot to boot
the Linux kernel the usual way.

In order to build suitable kernel fitImage, build TFA first, upstream
is currently under review:
https://review.trustedfirmware.org/c/TF-A/trusted-firmware-a/+/35799
Or if necessary, downstream repository:
remote: https://github.com/renesas-rcar/arm-trusted-firmware.git
branch: rcar_gen4_v2.7_v4x

```
$ git clean -fqdx
$ MBEDTLS_DIR=/path/to/mbedtls/ make -j$(nproc) bl31 \
PLAT=rcar_gen4 ARCH=aarch64 LSI=V4H SPD=none \
CTX_INCLUDE_AARCH32_REGS=0 MBEDTLS_COMMON_MK=1 \
PTP_NONSECURE_ACCESS=1 LOG_LEVEL=20 DEBUG=0 \
ENABLE_ASSERTIONS=0 E=0
```

Build Linux kernel Image and device tree from current mainline Linux
kernel repository, obtain 'Image' and 'r8a779g0-white-hawk.dtb' .

Bundle the files together using provided fit-image.its fitImage description:
```
$ mkimage -f fit-image.its fitImage
```

To start the kernel fiImage generated in previous step, load fitImage
to DRAM and use the 'bootm' command to start it:
=> load 0x58000000 ... fitImage && bootm 0x58000000

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
16 months agomtd: rawnand: meson: always use OOB bytes during write
Arseniy Krasnov [Sun, 22 Dec 2024 21:23:29 +0000 (00:23 +0300)] 
mtd: rawnand: meson: always use OOB bytes during write

If 'oob_required' is not set by the caller (for example 'oobbuf' is NULL),
then driver doesn't copy OOB data from 'oob_poi' to special controller
structures, so zeroes will be written as OOB. But, generic raw NAND logic
in 'nand_base.c' already handles case when OOB is not required to write by
filling 'oob_poi' with 0xFF's. So let's remove 'oob_required' check to
always read 'oob_poi' data for OOB.

Kernel driver (drivers/mtd/nand/raw/meson_nand.c) works in the same way,
so need to keep same behaviour here.

Fixes: c2e8c4d09a7a ("mtd: rawnand: Meson NAND controller support")
Signed-off-by: Arseniy Krasnov <avkrasnov@salutedevices.com>
Reviewed-by: Michael Trimarchi <michael@amarulasolutions.com>
16 months agoMerge tag 'dm-pull-15mar25' of git://git.denx.de/u-boot-dm into next
Tom Rini [Sat, 15 Mar 2025 14:19:31 +0000 (08:19 -0600)] 
Merge tag 'dm-pull-15mar25' of git://git.denx.de/u-boot-dm into next

Sync up on test renames

16 months agotest: Make net tests depend on CONFIG_CMD_NET
Simon Glass [Sun, 9 Feb 2025 16:07:19 +0000 (09:07 -0700)] 
test: Make net tests depend on CONFIG_CMD_NET

This fails on samus_tpl as there is no 'net' command.

   => net list
   Unknown command 'net' - try 'help' !

Fix it by adding a condition for the test.

Add a blank line to keep pylint happy.

Signed-off-by: Simon Glass <sjg@chromium.org>
16 months agotest/py: Show info about module-loading
Simon Glass [Sun, 9 Feb 2025 16:07:18 +0000 (09:07 -0700)] 
test/py: Show info about module-loading

It is sometimes tricky to figure out what modules test.py is loading
when it starts up. The result can be a silent failure with no clue as to
what when wrong.

Add a section which lists the modules loaded as well as those not
found.

Signed-off-by: Simon Glass <sjg@chromium.org>
16 months agotest/py: Drop assigning ubman to cons
Simon Glass [Sun, 9 Feb 2025 16:07:17 +0000 (09:07 -0700)] 
test/py: Drop assigning ubman to cons

Now that we have a shorter name, we don't need this sort of thing. Just
use ubman instead.

Signed-off-by: Simon Glass <sjg@chromium.org>
16 months agotest/py: Drop importing utils as util
Simon Glass [Sun, 9 Feb 2025 16:07:16 +0000 (09:07 -0700)] 
test/py: Drop importing utils as util

Now that we have a shorter name, we don't need this sort of thing.
Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android
16 months agotest/py: Drop u_boot_ prefix on test files
Simon Glass [Sun, 9 Feb 2025 16:07:15 +0000 (09:07 -0700)] 
test/py: Drop u_boot_ prefix on test files

We know this is U-Boot so the prefix serves no purpose other than to
make things longer and harder to read. Drop it and rename the files.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Mattijs Korpershoek <mkorpershoek@baylibre.com> # test_android / test_dfu
16 months agotest/py: Shorten u_boot_console
Simon Glass [Sun, 9 Feb 2025 16:07:14 +0000 (09:07 -0700)] 
test/py: Shorten u_boot_console

This fixture name is quite long and results in lots of verbose code.
We know this is U-Boot so the 'u_boot_' part is not necessary.

But it is also a bit of a misnomer, since it provides access to all the
information available to tests. It is not just the console.

It would be too confusing to use con as it would be confused with
config and it is probably too short.

So shorten it to 'ubman'.

Signed-off-by: Simon Glass <sjg@chromium.org>
Link: https://lore.kernel.org/u-boot/CAFLszTgPa4aT_J9h9pqeTtLCVn4x2JvLWRcWRD8NaN3uoSAtyA@mail.gmail.com/
16 months agoconfigs: nand2_defconfig: Enable configs for nand boot
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:27 +0000 (00:18 +0800)] 
configs: nand2_defconfig: Enable configs for nand boot

Enable configs for nand boot.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: Kconfig: Add SYS_NAND_PAGE_SIZE dependency
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:32 +0000 (00:18 +0800)] 
drivers: mtd: nand: Kconfig: Add SYS_NAND_PAGE_SIZE dependency

Add SYS_NAND_PAGE_SIZE dependency for cadence NAND.
This config is needed as the SPL driver will use this parameter
to read uboot-proper image in NAND during booting.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:30 +0000 (00:18 +0800)] 
drivers: mtd: nand: Enabled Kconfig and Makefile for Cadence-SPL

Enable the Kconfig and Makefile for the Cadence-Nand
SPL support in agilex5 family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: spl: Add support for nand SPL load image
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:29 +0000 (00:18 +0800)] 
drivers: mtd: nand: spl: Add support for nand SPL load image

Add support for spl nand to load binary image from NAND
to RAM. Leverage the existing nand_spl_load_image from nand_spl_loaders.c

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: base: Add support for Hardware ECC for check bad block
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:28 +0000 (00:18 +0800)] 
drivers: mtd: nand: base: Add support for Hardware ECC for check bad block

Leverage linux code to support hardware ECC interface
to verify nand bad block.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: nand: Enabled Kconfig and Makefile for cdns-nand
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:26 +0000 (00:18 +0800)] 
drivers: nand: Enabled Kconfig and Makefile for cdns-nand

Enable the Kconfig and Makefile for the
Cadence NAND driver for the agilex5 family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Use bounce buffer
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:25 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Use bounce buffer

Enable nand to use bounce buffer. In bounce buffer,
read/write buf will use cadence->buf which has been allocated
using malloc. This will align the memory and avoid memory to be
allocated in different addresses.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Poll for desc complete status
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:24 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Poll for desc complete status

Poll for thread complete status to ensure the
descriptor processing is complete. If complete then can ensure
controller already update the descriptor status.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Flush & invalidate dma descriptor
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:23 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Flush & invalidate dma descriptor

Ensure ddr memory is updated with the data from dcache.
This would help to ensure cdma always reading the latest dma descriptor
from ddr memory.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:22 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Support cmd SET_FEATURES & GET_FEATURES

Support NAND_CMD_SET_FEATURES & NAND_CMD_GET_FEATURES.
These commands is one of the basic commands of NAND. The parameters get
from these commands will be used to set timing mode
of NAND data interface.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Add support for NAND_CMD_RESET
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:21 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Add support for NAND_CMD_RESET

Support nand reset command for Cadence Nand Driver.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:20 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Add support for NAND_CMD_PARAM

Add support for reading param page of NAND device.
These paramaters are unique and used for identification purpose.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Add support for readid command
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:19 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Add support for readid command

Add support for readid command in Cadence NAND driver.
The id is unique and used for flash identification.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: cadence: Add support for read status command
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:18 +0000 (00:18 +0800)] 
drivers: mtd: nand: cadence: Add support for read status command

Add support for read status command
in Cadence NAND driver. This status bit is important to check
whether the flash is write-protected.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodrivers: mtd: nand: Add driver for Cadence Nand
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:17 +0000 (00:18 +0800)] 
drivers: mtd: nand: Add driver for Cadence Nand

Enable driver for Cadence NAND for the family
device agilex5. This driver is leveraged from the path
/drivers/mtd/nand/raw/cadence-nand-controller.c from the
stable version 6.11.2.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agoarm: dts: agilex5: Enabled cdns-nand dts setting
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:16 +0000 (00:18 +0800)] 
arm: dts: agilex5: Enabled cdns-nand dts setting

Enable cdns-nand dts setting for the socfpga_agilex5
family device.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agodt: nand: add cadence nand dt-bindings
Dinesh Maniyam [Wed, 26 Feb 2025 16:18:15 +0000 (00:18 +0800)] 
dt: nand: add cadence nand dt-bindings

The Cadence NAND is a configurable mtd raw block which
supports multiple options for chipsets, clocking and reset structure, and
feature list.

Signed-off-by: Dinesh Maniyam <dinesh.maniyam@intel.com>
16 months agoMerge patch series "Enable USB MSC Boot for AM62, AM62A and AM62P"
Tom Rini [Fri, 14 Mar 2025 18:28:13 +0000 (12:28 -0600)] 
Merge patch series "Enable USB MSC Boot for AM62, AM62A and AM62P"

Siddharth Vadapalli <s-vadapalli@ti.com> says:

This series adds config fragment for enabling USB MSC boot and USB
Storage devices which are applicable to AM62, AM62A and AM62P SoCs.

Series has been tested on AM62A7-SK, AM625-SK and AM62P5-SK for USB MSC
boot where the bootloaders were generated in the following manner:
1. AM62A7-SK (AM62A SoC):
- tiboot3.bin
=> am62ax_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62ax_evm_a53_defconfig + am62x_a53_usbmsc.config
2. AM625-SK (AM62 SoC):
- tiboot3.bin
=> am62x_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62x_evm_a53_defconfig + am62x_a53_usbmsc.config
3. AM62P5-SK (AM62P SoC):
- tiboot3.bin
=> am62px_evm_r5_defconfig + am62x_r5_usbmsc.config
- tispl.bin and u-boot.img
=> am62px_evm_a53_defconfig + am62x_a53_usbmsc.config

The images were flashed to a USB Flash Drive and were connected to the
Type-C interface on each of the boards which supports USB MSC Boot.

Logs corresponding to this series:
1. AM62A7-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/3518cba3edc57bf52d06a7df932928ca
2. AM625-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/098568be7b482436d27fdc8adae15ce4
3. AM62P5-SK:
https://gist.github.com/Siddharth-Vadapalli-at-TI/50e29073033668e7d904a785bfbc9c0b

The following device-tree changes were made across all of the boards:
https://gist.github.com/Siddharth-Vadapalli-at-TI/2afb913838c1d4005bc059910c09ab4b

Link: https://lore.kernel.org/r/20250301080049.965438-1-s-vadapalli@ti.com
16 months agoconfigs: am62x_a53: introduce fragment for USB MSC boot
Siddharth Vadapalli [Sat, 1 Mar 2025 08:00:49 +0000 (13:30 +0530)] 
configs: am62x_a53: introduce fragment for USB MSC boot

Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
16 months agoconfigs: am62x_r5: introduce fragment for USB MSC boot
Siddharth Vadapalli [Sat, 1 Mar 2025 08:00:48 +0000 (13:30 +0530)] 
configs: am62x_r5: introduce fragment for USB MSC boot

Introduce the config fragment for enabling USB MSC boot. USB MSC boot
involves fetching the next stage of the bootloader from a USB Mass Storage
device such as a USB Flash Drive with the USB controller on the SoC acting
as the USB Host.

Signed-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>
16 months agocommon: console: Delete obsolete VIDCONSOLE_AS_{LCD, NAME} options
Dragan Simic [Sun, 2 Mar 2025 14:52:57 +0000 (15:52 +0100)] 
common: console: Delete obsolete VIDCONSOLE_AS_{LCD, NAME} options

The configuration options CONFIG_VIDCONSOLE_AS_LCD and CONFIG_VIDCONSOLE_AS_
NAME have been marked as obsolete and scheduled for deletion in late 2020.

That's already long overdue and the last remaining consumers of these options
have already migrated to using "vidconsole" in their "stdout" and "stderr"
environment variables, so let's delete these two configuration options.

Signed-off-by: Dragan Simic <dsimic@manjaro.org>
Acked-by: Soeren Moch <smoch@web.de> # tbs2910
16 months agoarm: dts: npcm7xx: correct the timer node
Jim Liu [Tue, 25 Feb 2025 01:45:05 +0000 (09:45 +0800)] 
arm: dts: npcm7xx: correct the timer node

Correct the timer node of dts

Signed-off-by: Jim Liu <JJLIU0@nuvoton.com>
16 months agoMerge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot...
Tom Rini [Fri, 14 Mar 2025 15:31:36 +0000 (09:31 -0600)] 
Merge tag 'mmu-next-14032025' of https://source.denx.de/u-boot/custodians/u-boot-tpm into next

Up to now we configure the entire memory space for U-Boot as RWX.
For modern architectures and security requirements, it's better to
map the memory properly.
This pull request adds basics support for mapping the U-Boot binary with
proper (RO, RW, RW^X) memory permissions on aarch64 right after we
relocate U-Boot in the top of DRAM.
It's worrth noting that the linker script annotations are only added for
the aarch64 architecture. We can, in the future, try to unify the linker --
at least for the architectures that have enough in common and expand this

16 months agoarm64: Enable RW, RX and RO mappings for the relocated binary
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:43 +0000 (15:54 +0200)] 
arm64: Enable RW, RX and RO mappings for the relocated binary

Now that we have everything in place switch the page permissions for
.rodata, .text and .data just after we relocate everything in top of the
RAM.

Unfortunately we can't enable this by default, since we have examples of
U-Boot crashing due to invalid access. This usually happens because code
defines const variables that it later writes. So hide it behind a Kconfig
option until we sort it out.

It's worth noting that EFI runtime services are not covered by this
patch on purpose. Since the OS can call SetVirtualAddressMap which can
relocate runtime services, we need to set them to RX initially but remap
them as RWX right before ExitBootServices.

Link: https://lore.kernel.org/u-boot/20250129-rockchip-pinctrl-const-v1-0-450ccdadfa7e@cherry.de/
Link: https://lore.kernel.org/u-boot/20250130133646.2177194-1-andre.przywara@arm.com/
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agotreewide: Add a function to change page permissions
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:42 +0000 (15:54 +0200)] 
treewide: Add a function to change page permissions

For armv8 we are adding proper page permissions for the relocated U-Boot
binary. Add a weak function that can be used across architectures to change
the page permissions

Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agoarm64: mmu_change_region_attr() add an option not to break PTEs
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:41 +0000 (15:54 +0200)] 
arm64: mmu_change_region_attr() add an option not to break PTEs

The ARM ARM (Rev L.a) on section 8.17.1 describes the cases where
break-before-make is required when changing live page tables.
Since we can use a function to tweak block and page permissions,
where BBM is not required split the existing mmu_change_region_attr()
into two functions and create one that doesn't require BBM. Subsequent
patches will use the new function to map the U-Boot binary with proper
page permissions.
While at it add function descriptions in their header files.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agoarm: Prepare linker scripts for memory permissions
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:40 +0000 (15:54 +0200)] 
arm: Prepare linker scripts for memory permissions

Upcoming patches are switching the memory mappings to RW, RO, RX
after the U-Boot binary and its data are relocated. Add
annotations in the linker scripts to and mark text, data, rodata
sections and align them to a page boundary.

It's worth noting that .efi_runtime memory permissions are left
untouched for now. There's two problems with EFI currently.

The first problem is that we bundle data, rodata and text in a single
.efi_runtime section which also must be close to .text for now.
As a result we also dont change the permissions for anything contained
in CPUDIR/start.o. In order to fix that we have to decoule .text_rest,
.text and .efi_runtime and have the runtime services on their own
section with proper memory permission annotations (efi_rodata etc).

The efi runtime regions (.efi_runtime_rel) can be relocated by the OS when
the latter is calling SetVirtualAddressMap. Which means we have to
configure those pages as RX for U-Boot but convert them to RWX just before
ExitBootServices. It also needs extra code in efi_tuntime relocation
code since R_AARCH64_NONE are emitted as well if we page align the
section.

Due to the above ignore EFI for now and fix it later once we have the
rest in place.

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on AML-S905X-CC
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agodoc: update meminfo with arch specific information
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:39 +0000 (15:54 +0200)] 
doc: update meminfo with arch specific information

Since we added support in meminfo to dump live page tables, describe
the only working architecture for now (aarch64) and add links to public
documentation for further reading.

Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agomeminfo: add memory details for armv8
Ilias Apalodimas [Thu, 20 Feb 2025 13:54:38 +0000 (15:54 +0200)] 
meminfo: add memory details for armv8

Upcoming patches are mapping memory with RO, RW^X etc permsissions.
Fix the meminfo command to display them properly

Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Signed-off-by: Ilias Apalodimas <ilias.apalodimas@linaro.org>
16 months agoMerge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians...
Tom Rini [Thu, 13 Mar 2025 22:45:19 +0000 (16:45 -0600)] 
Merge tag 'u-boot-imx-next-20250313' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx into next

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/25142

- Support Toradex i.MX6 Apalis/Colibri v1.2 SoM.
- Guard tee.bin inclusion on imx9,
- Remove unneeded regulator entry on DH i.MX6 DHCOM DRC02 devicetree.
- Add i.MX mailbox driver
- Convert ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig.
- Cope with existing optee node on imx8m.

16 months agoARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
Marek Vasut [Tue, 11 Mar 2025 01:34:18 +0000 (02:34 +0100)] 
ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02

The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
16 months agoKconfig: Introduce CONFIG_WERROR
Paul Barker [Fri, 28 Feb 2025 10:04:33 +0000 (10:04 +0000)] 
Kconfig: Introduce CONFIG_WERROR

Add a new config option under "General setup" to enable the -Werror flag
when building U-Boot. This is useful during development to help catch
mistakes.

This is based on a similar config option added to the Linux kernel by
Linus in 2021 - see Linux commit 3fe617ccafd6 ("Enable '-Werror' by
default for all kernel builds"). The modification of KBUILD_CFLAGS is
done in Makefile.extrawarn, matching where it was moved in the kernel by
Linux commit e88ca24319e4 ("kbuild: consolidate warning flags in
scripts/Makefile.extrawarn").

Signed-off-by: Paul Barker <paul.barker.ct@bp.renesas.com>
16 months agolib: rsa: add NULL check for 'algo' in
Anton Moryakov [Tue, 25 Feb 2025 13:53:27 +0000 (16:53 +0300)] 
lib: rsa: add NULL check for 'algo' in

- Check return value of fdt_getprop for NULL.
- Return -EFAULT if 'algo' property is missing.
- Prevent NULL pointer dereference in strcmp."

Triggers found by static analyzer Svace.

Signed-off-by: Anton Moryakov <ant.v.moryakov@gmail.com>
16 months agomemory: ti-gpmc: Alloc per driver private struct
Vignesh Raghavendra [Wed, 5 Mar 2025 08:41:30 +0000 (14:11 +0530)] 
memory: ti-gpmc: Alloc per driver private struct

Driver uses dev_get_priv() but never allocates it in its
declaration leading to various crashes. Fix this by explicitly
allocating the storage.

Fixes: 9b0b5648d6e4 ("memory: Add TI GPMC driver")
Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
16 months agoboard: ti: j784s4: Update Resource Management configs
Vaishnav Achath [Fri, 28 Feb 2025 05:42:22 +0000 (11:12 +0530)] 
board: ti: j784s4: Update Resource Management configs

Update rm-cfg.yaml and tifs-rm-cfg.yaml to account for the
changes added in the K3 Resource Partitioning Tool v1.18

The change enables resource sharing between A72_2 and MAIN_0_R5_0
for the BCDMA CSI RX and TX channels, J784S4 supports upto 12
CSI cameras and 16 channels would not be enough for all such use
cases for RTOS and Linux, thus sharing of resources in needed. Resource
sharing between A72 and R5 for BCDMA CSI channels allow Linux to use 32
channels at a time.

Signed-off-by: Vaishnav Achath <vaishnav.a@ti.com>
[n-francis@ti.com: rebased and sent on behalf]
Signed-off-by: Neha Malcom Francis <n-francis@ti.com>
Reviewed-by: Udit Kumar <u-kumar1@ti.com>
16 months agocmd: Drop last reference to CMD_REISERFS
Tom Rini [Thu, 27 Feb 2025 20:50:48 +0000 (14:50 -0600)] 
cmd: Drop last reference to CMD_REISERFS

While the code was removed in commit 3766a249a3c0 ("fs: drop reiserfs")
this reference in the Makefile was missed. Remove it now.

Fixes: 3766a249a3c0 ("fs: drop reiserfs")
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
16 months agomach-k3: common_fdt: create a reserved memory node
Bryan Brattlof [Thu, 27 Feb 2025 17:14:41 +0000 (11:14 -0600)] 
mach-k3: common_fdt: create a reserved memory node

Some device trees may not have a reserved-memory node. Rather than
exiting early we should create a new reserved-memory node along with
the memory carveout for the firmware we (U-Boot) have placed.

Signed-off-by: Bryan Brattlof <bb@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
16 months agotest: event: Correct usage of IS_ENABLED() macro in test/common/event.c
Tom Rini [Wed, 26 Feb 2025 20:31:09 +0000 (14:31 -0600)] 
test: event: Correct usage of IS_ENABLED() macro in test/common/event.c

This file was using IS_ENABLED() to test for CONFIG flags but omitted
the CONFIG_ prefix and so did not work as expected.

Signed-off-by: Tom Rini <trini@konsulko.com>
16 months agotools: add HOSTCFLAGS from openssl pkg-config
Raymond Mao [Wed, 26 Feb 2025 14:19:51 +0000 (06:19 -0800)] 
tools: add HOSTCFLAGS from openssl pkg-config

HOSTCFLAGS of some tools components (image-host, rsa-sign and
ecdsa-libcrypto) depend on the directory where openssl is installed.
Add them via pkg-config.
This fixes a potential build failure in tools when openssl in installed
in varied directories.

Signed-off-by: Raymond Mao <raymond.mao@linaro.org>
Reviewed-by: Peter Robinson <pbrobinson@gmail.com>
16 months agoDockerfile: Add missing 'rm -rf /tmp/coreboot-24.08'
Tom Rini [Wed, 12 Feb 2025 22:24:15 +0000 (16:24 -0600)] 
Dockerfile: Add missing 'rm -rf /tmp/coreboot-24.08'

We had missed removing the coreboot directory once done, fix this.

Signed-off-by: Tom Rini <trini@konsulko.com>
16 months agomailbox: add i.MX Messaging Unit (MU) driver
Peng Fan [Tue, 4 Mar 2025 06:57:40 +0000 (14:57 +0800)] 
mailbox: add i.MX Messaging Unit (MU) driver

This patch provides a driver for i.MX Messaging Unit (MU) using the
commom mailbox framework.

This is ported from Linux (v6.12.8) driver
drivers/mailbox/imx-mailbox.c. Its commit SHA is:
39d7d6177f0c ("mailbox: imx: use device name in interrupt name")

Signed-off-by: Viorel Suman <viorel.suman@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Alice Guo <alice.guo@nxp.com>
Reviewed-by: Ye Li <ye.li@nxp.com>
16 months agoARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02
Marek Vasut [Tue, 11 Mar 2025 01:34:18 +0000 (02:34 +0100)] 
ARM: dts: imx: Drop bogus regulator extras on DH i.MX6 DHCOM DRC02

The regulator extras should be placed in the USB H1 regulator node,
the /regulator-usb-h1-vbus. They are already present there in the
upstream DT, so delete this bogus node entirely.

Signed-off-by: Marek Vasut <marex@denx.de>
16 months agoimx8m: soc: cope with existing optee node
Vincent Stehlé [Mon, 10 Mar 2025 12:36:21 +0000 (13:36 +0100)] 
imx8m: soc: cope with existing optee node

On i.MX8M SoCs, the /firmware/optee Devicetree node is created just before
booting the OS when OP-TEE is found running. If the node already exists,
this results in an error, which prevents the OS to boot:

  Could not create optee node.
  ERROR: system-specific fdt fixup failed: FDT_ERR_EXISTS
   - must RESET the board to recover.

  failed to process device tree

On the i.MX8M systems where CONFIG_OF_SYSTEM_SETUP is defined, the
ft_add_optee_node() function is called before booting the OS. It will
create the OP-TEE Devicetree node and populate it with reserved memory
informations gathered at runtime.

On on most i.MX8M systems the Devicetree is built with an optee node if
CONFIG_OPTEE is defined. This node is indeed necessary for commands and
drivers communicating with OP-TEE, even before attempting OS boot.

The aforementioned issue can happen on the Compulab IOT-GATE-iMX8, which is
the only in-tree i.MX8M system where both CONFIG_OPTEE and
CONFIG_OF_SYSTEM_SETUP are defined (see the imx8mm-cl-iot-gate*
defconfigs).

Deal with an existing optee node gracefully at runtime to fix this issue.

Signed-off-by: Vincent Stehlé <vincent.stehle@arm.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
Cc: Stefano Babic <sbabic@denx.de>
Cc: Fabio Estevam <festevam@gmail.com>
Cc: Tom Rini <trini@konsulko.com>
Cc: Tim Harvey <tharvey@gateworks.com>
16 months agotoradex: apalis/colibri imx6: Select correct DTB for SoM v1.2+
Ernest Van Hoecke [Fri, 7 Mar 2025 10:34:14 +0000 (11:34 +0100)] 
toradex: apalis/colibri imx6: Select correct DTB for SoM v1.2+

When "fdtfile" is not set, use the "variant" environment variable to
select the correct DTB.

Apalis/Colibri iMX6 V1.2 replaced the STMPE811 ADC/Touch controller
which is EOL with the TLA2024 ADC and AD7879 touch controller. They thus
require a different DTB, which we can easily select with the variant env
variable.

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
16 months agoboard: toradex: apalis/colibri imx6: Detect new v1.2 SoM variant
Ernest Van Hoecke [Fri, 7 Mar 2025 10:34:13 +0000 (11:34 +0100)] 
board: toradex: apalis/colibri imx6: Detect new v1.2 SoM variant

Apalis/Colibri iMX6 V1.2 will replace the STMPE811 ADC/Touch controller
which is EOL by the TLA2024 ADC and AD7879 touch controller.

To support this new version, we detect the presence of the TLA2024
during boot and set a new environment variable named "variant". This
will allow us and users to select the correct DT easily.

By probing via I2C we have a robust detection method instead of relying
on the existing "board_rev" environment variable which is set by the
config block. Users can use "variant" in their DT selection and do not
have to map the board revision to a device tree.

"variant" environment variable behaviour:
* Empty or absent for all versions below v1.2 (STMPE811)
* "-v1.2" for all versions starting from v1.2 (TLA2024 + AD7879)

Usage example:
setenv fdtfile imx6q-apalis${variant}-${fdt_board}.dtb

Signed-off-by: Ernest Van Hoecke <ernest.vanhoecke@toradex.com>
Reviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>
16 months agoimx9: container.cfg: Guard tee.bin inclusion
Fabio Estevam [Thu, 27 Feb 2025 16:50:01 +0000 (13:50 -0300)] 
imx9: container.cfg: Guard tee.bin inclusion

Guard the inclusion of tee.bin with the CONFIG_OPTEE symbol to fix the
following build warning:

  CHECK    u-boot-container.cfgout
WARNING './tee.bin' not found, resulting binary may be not-functional
  BINMAN  .binman_stamp
  OFCHK   .config

Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
16 months agommc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig
Tom Rini [Thu, 27 Feb 2025 15:29:42 +0000 (09:29 -0600)] 
mmc: fsl_esdhc: Migrate ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE to Kconfig

The flag for enabling the ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE quirk can be
handled easily enough in Kconfig. This lets us remove a function but not
obviously correct usage of the IS_ENABLED() macro.

Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>
16 months agovideo: renesas-r69328: fix reset gpio direction
Svyatoslav Ryhel [Tue, 4 Mar 2025 19:22:04 +0000 (21:22 +0200)] 
video: renesas-r69328: fix reset gpio direction

The reset GPIO signal operates with a low-active logic. The driver
needs to be adjusted to correctly handle this.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>
16 months agovideo: renesas-r69328: add missing mode flags
Svyatoslav Ryhel [Fri, 21 Feb 2025 14:08:10 +0000 (16:08 +0200)] 
video: renesas-r69328: add missing mode flags

Add missing MIPI DSI mode flags.

Signed-off-by: Svyatoslav Ryhel <clamor95@gmail.com>