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i2c: piix4: Add support for AMD ML and CZ SMBus changes
authorShane Huang <shane.huang@amd.com>
Wed, 22 Jan 2014 22:05:46 +0000 (14:05 -0800)
committerWolfram Sang <wsa@the-dreams.de>
Fri, 24 Jan 2014 16:48:51 +0000 (17:48 +0100)
commit032f708bc4f6da868ec49dac48ddf3670d8035d3
treea07fe98709ce0f981ce7aecf2def498cb6c3a4dctree | snapshot
parent3aacd625f20129f5a41ea3ff3b5353b0e4dabd01commit | diff
i2c: piix4: Add support for AMD ML and CZ SMBus changes

The locations of SMBus register base address and enablement bit are changed
from AMD ML, which need this patch to be supported.

Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Jean Delvare <khali@linux-fr.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Cc: stable@vger.kernel.org
Documentation/i2c/busses/i2c-piix4 diff | blob | blame | history
drivers/i2c/busses/Kconfig diff | blob | blame | history
drivers/i2c/busses/i2c-piix4.c diff | blob | blame | history
Michael's Linux tree.