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(parent: 8e3967a) | patch
drm/amd: Restore cached power limit during resume
authorMario Limonciello <mario.limonciello@amd.com>
Fri, 25 Jul 2025 03:12:21 +0000 (22:12 -0500)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 4 Aug 2025 18:26:46 +0000 (14:26 -0400)
commit26a609e053a6fc494403e95403bc6a2470383bec
tree5138f7c450b76c036acaf1dd7d8a7f8b573534e2tree | snapshot
parent8e3967a71e6fca9c871f98b9289b59c82b88b729commit | diff
drm/amd: Restore cached power limit during resume

The power limit will be cached in smu->current_power_limit but
if the ASIC goes into S3 this value won't be restored.

Restore the value during SMU resume.

Acked-by: Alex Deucher <alexander.deucher@amd.com>
Link: https://lore.kernel.org/r/20250725031222.3015095-2-superm1@kernel.org
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/pm/swsmu/amdgpu_smu.c diff | blob | blame | history
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