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(parent: 0f19447) | patch
target-arm: Fix aarch64 vec_reg_offset
authorRichard Henderson <rth@twiddle.net>
Tue, 27 Dec 2016 14:59:24 +0000 (14:59 +0000)
committerPeter Maydell <peter.maydell@linaro.org>
Tue, 27 Dec 2016 14:59:24 +0000 (14:59 +0000)
commit416d72b97b01d6cb769ad0fd0e10614583354a45
tree272407530bf562692167eaab26e6525734bc8fc4tree
parent0f1944735b6bac810b067e8a7a5154744536fd59commit | diff
target-arm: Fix aarch64 vec_reg_offset

Since CPUARMState.vfp.regs is not 16 byte aligned, the ^ 8 fixup used
for a big-endian host doesn't do what's intended.  Fix this by adding
in the vfp.regs offset after computing the inter-register offset.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1481085020-2614-2-git-send-email-rth@twiddle.net
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
target/arm/translate-a64.c diff | blob | blame | history
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