]> git.ipfire.org Git - thirdparty/gcc.git/commit
arm: vld1_types_x4 ACLE intrinsics
authorEzra Sitorus <ezra.sitorus@arm.com>
Thu, 7 Dec 2023 15:41:06 +0000 (15:41 +0000)
committerRichard Earnshaw <rearnsha@arm.com>
Thu, 7 Dec 2023 17:16:33 +0000 (17:16 +0000)
commit656f092cba951fddc1e40468ad71d241ffe98566
treeac58a639a54841224c7503e58b164871368e250d
parent8e3ae874b21bdd8da32afefa6f6f60913481564c
arm: vld1_types_x4 ACLE intrinsics

This patch is part of a series of patches implementing the _xN
variants of the vld1 intrinsic for the arm port. This patch adds the
_x4 variants of the vld1 intrinsic.

The previous vld1_x4 has been updated to vld1q_x4 to take into
account that it works with 4-word-length types. vld1_x4 is now
only for 2-word-length types.

ACLE documents:
https://developer.arm.com/documentation/ihi0053/latest/

ISA documents:
https://developer.arm.com/documentation/ddi0487/latest/

gcc/ChangeLog:
* config/arm/arm_neon.h
(vld1_u8_x4, vld1_u16_x4, vld1_u32_x4, vld1_u64_x4): New
(vld1_s8_x4, vld1_s16_x4, vld1_s32_x4, vld1_s64_x4): New.
(vld1_f16_x4, vld1_f32_x4): New.
(vld1_p8_x4, vld1_p16_x4, vld1_p64_x4): New.
(vld1_bf16_x4): New.
(vld1q_types_x4): Updated to use vld1q_x4
from arm_neon_builtins.def
* config/arm/arm_neon_builtins.def
(vld1_x4): Updated entries.
(vld1q_x4): New entries, but comes from the old vld1_x2
* config/arm/neon.md (neon_vld1q_x4<mode>):
Updated from neon_vld1_x4<mode>.

gcc/testsuite/ChangeLog:
* gcc.target/arm/simd/vld1_base_xN_1.c: Add new tests.
* gcc.target/arm/simd/vld1_bf16_xN_1.c: Add new tests.
* gcc.target/arm/simd/vld1_fp16_xN_1.c: Add new tests.
* gcc.target/arm/simd/vld1_p64_xN_1.c: Add new tests.
gcc/config/arm/arm_neon.h
gcc/config/arm/arm_neon_builtins.def
gcc/config/arm/neon.md
gcc/testsuite/gcc.target/arm/simd/vld1_base_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_bf16_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_fp16_xN_1.c
gcc/testsuite/gcc.target/arm/simd/vld1_p64_xN_1.c