]> git.ipfire.org Git - thirdparty/qemu.git/commit
hw/arm/aspeed_ast27x0: Add SoC Support for AST2700 A1
authorJamin Lin <jamin_lin@aspeedtech.com>
Fri, 7 Mar 2025 03:59:31 +0000 (11:59 +0800)
committerCédric Le Goater <clg@redhat.com>
Sun, 9 Mar 2025 13:36:53 +0000 (14:36 +0100)
commit6de4aa8dc54451e5902658648fd3d268284c45e9
tree7bec7be51547ce5a6be9e775e5543735f201fab4
parent8107448de709a64362c56687764fbd41587c9de9
hw/arm/aspeed_ast27x0: Add SoC Support for AST2700 A1

The memory map for AST2700 A1 remains compatible with AST2700 A0. However, the
IRQ mapping has been updated for AST2700 A1, with GIC interrupts now ranging
from 192 to 201. Add a new IRQ map table for AST2700 A1.
Add "aspeed_soc_ast2700a1_class_init" to initialize the AST2700 A1 SoC.

Signed-off-by: Jamin Lin <jamin_lin@aspeedtech.com>
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Link: https://lore.kernel.org/qemu-devel/20250307035945.3698802-23-jamin_lin@aspeedtech.com
[ clg: Removed sc->name ]
Signed-off-by: Cédric Le Goater <clg@redhat.com>
hw/arm/aspeed_ast27x0.c