]> git.ipfire.org Git - thirdparty/qemu.git/commit
ppc/pnv: Fix LPC POWER8 register sanity check
authorNicholas Piggin <npiggin@gmail.com>
Tue, 6 Aug 2024 13:13:12 +0000 (23:13 +1000)
committerNicholas Piggin <npiggin@gmail.com>
Sun, 3 Nov 2024 23:08:24 +0000 (09:08 +1000)
commit84416e262ea1218026a8567ed9ea31c16d77edea
tree497cb6af801d1bb47eafe16e9ac7affe001186e7
parent899e488650bb8bd52e1b2b44ceaae17df2e20b7f
ppc/pnv: Fix LPC POWER8 register sanity check

POWER8 does not have the ISA IRQ -> SERIRQ routing system of later
CPUs, instead all ISA IRQs are sent to the CPU via a single PSI
interrupt. There is a sanity check in the POWER8 case to ensure the
routing bits have not been set, because that would indicate a
programming error.

Those bits were incorrectly specified because of ppc bit numbering
fun. Coverity detected this as an always-zero expression.

Cc: qemu-stable@nongnu.org
Reported-by: Cédric Le Goater <clg@redhat.com>
Resolves: Coverity CID 1558829 (partially)
Reviewed-by: Cédric Le Goater <clg@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
hw/ppc/pnv_lpc.c