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1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3 * Rockchip ISP1 Driver - ISP Subdevice
4 *
5 * Copyright (C) 2019 Collabora, Ltd.
6 *
7 * Based on Rockchip ISP1 driver by Rockchip Electronics Co., Ltd.
8 * Copyright (C) 2017 Rockchip Electronics Co., Ltd.
9 */
10
11 #include <linux/iopoll.h>
12 #include <linux/pm_runtime.h>
13 #include <linux/videodev2.h>
14 #include <linux/vmalloc.h>
15
16 #include <media/v4l2-event.h>
17
18 #include "rkisp1-common.h"
19
20 #define RKISP1_DEF_SINK_PAD_FMT MEDIA_BUS_FMT_SRGGB10_1X10
21 #define RKISP1_DEF_SRC_PAD_FMT MEDIA_BUS_FMT_YUYV8_2X8
22
23 #define RKISP1_ISP_DEV_NAME RKISP1_DRIVER_NAME "_isp"
24
25 /*
26 * NOTE: MIPI controller and input MUX are also configured in this file.
27 * This is because ISP Subdev describes not only ISP submodule (input size,
28 * format, output size, format), but also a virtual route device.
29 */
30
31 /*
32 * There are many variables named with format/frame in below code,
33 * please see here for their meaning.
34 * Cropping in the sink pad defines the image region from the sensor.
35 * Cropping in the source pad defines the region for the Image Stabilizer (IS)
36 *
37 * Cropping regions of ISP
38 *
39 * +---------------------------------------------------------+
40 * | Sensor image |
41 * | +---------------------------------------------------+ |
42 * | | CIF_ISP_ACQ (for black level) | |
43 * | | sink pad format | |
44 * | | +--------------------------------------------+ | |
45 * | | | CIF_ISP_OUT | | |
46 * | | | sink pad crop | | |
47 * | | | +---------------------------------+ | | |
48 * | | | | CIF_ISP_IS | | | |
49 * | | | | source pad crop and format | | | |
50 * | | | +---------------------------------+ | | |
51 * | | +--------------------------------------------+ | |
52 * | +---------------------------------------------------+ |
53 * +---------------------------------------------------------+
54 */
55
56 /* ----------------------------------------------------------------------------
57 * Camera Interface registers configurations
58 */
59
60 /*
61 * Image Stabilization.
62 * This should only be called when configuring CIF
63 * or at the frame end interrupt
64 */
65 static void rkisp1_config_ism(struct rkisp1_isp *isp,
66 struct v4l2_subdev_state *sd_state)
67 {
68 const struct v4l2_rect *src_crop =
69 v4l2_subdev_state_get_crop(sd_state,
70 RKISP1_ISP_PAD_SOURCE_VIDEO);
71 struct rkisp1_device *rkisp1 = isp->rkisp1;
72 u32 val;
73
74 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_RECENTER, 0);
75 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_MAX_DX, 0);
76 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_MAX_DY, 0);
77 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_DISPLACE, 0);
78 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_H_OFFS, src_crop->left);
79 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_V_OFFS, src_crop->top);
80 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_H_SIZE, src_crop->width);
81 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_V_SIZE, src_crop->height);
82
83 /* IS(Image Stabilization) is always on, working as output crop */
84 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IS_CTRL, 1);
85 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL);
86 val |= RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD;
87 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val);
88 }
89
90 /*
91 * configure ISP blocks with input format, size......
92 */
93 static int rkisp1_config_isp(struct rkisp1_isp *isp,
94 struct v4l2_subdev_state *sd_state,
95 enum v4l2_mbus_type mbus_type, u32 mbus_flags)
96 {
97 struct rkisp1_device *rkisp1 = isp->rkisp1;
98 u32 isp_ctrl = 0, irq_mask = 0, acq_mult = 0, acq_prop = 0;
99 const struct rkisp1_mbus_info *sink_fmt;
100 const struct rkisp1_mbus_info *src_fmt;
101 const struct v4l2_mbus_framefmt *src_frm;
102 const struct v4l2_mbus_framefmt *sink_frm;
103 const struct v4l2_rect *sink_crop;
104
105 sink_frm = v4l2_subdev_state_get_format(sd_state,
106 RKISP1_ISP_PAD_SINK_VIDEO);
107 sink_crop = v4l2_subdev_state_get_crop(sd_state,
108 RKISP1_ISP_PAD_SINK_VIDEO);
109 src_frm = v4l2_subdev_state_get_format(sd_state,
110 RKISP1_ISP_PAD_SOURCE_VIDEO);
111
112 sink_fmt = rkisp1_mbus_info_get_by_code(sink_frm->code);
113 src_fmt = rkisp1_mbus_info_get_by_code(src_frm->code);
114
115 if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
116 acq_mult = 1;
117 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
118 if (mbus_type == V4L2_MBUS_BT656)
119 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT_ITU656;
120 else
121 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_RAW_PICT;
122 } else {
123 rkisp1_write(rkisp1, RKISP1_CIF_ISP_DEMOSAIC,
124 RKISP1_CIF_ISP_DEMOSAIC_TH(0xc));
125
126 if (mbus_type == V4L2_MBUS_BT656)
127 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU656;
128 else
129 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_BAYER_ITU601;
130 }
131 } else if (sink_fmt->pixel_enc == V4L2_PIXEL_ENC_YUV) {
132 acq_mult = 2;
133 if (mbus_type == V4L2_MBUS_CSI2_DPHY) {
134 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
135 } else {
136 if (mbus_type == V4L2_MBUS_BT656)
137 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU656;
138 else
139 isp_ctrl = RKISP1_CIF_ISP_CTRL_ISP_MODE_ITU601;
140 }
141
142 irq_mask |= RKISP1_CIF_ISP_DATA_LOSS;
143 }
144
145 /* Set up input acquisition properties */
146 if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL) {
147 if (mbus_flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
148 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_POS_EDGE;
149
150 switch (sink_fmt->bus_width) {
151 case 8:
152 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_8B_ZERO;
153 break;
154 case 10:
155 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_10B_ZERO;
156 break;
157 case 12:
158 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_IN_SEL_12B;
159 break;
160 default:
161 dev_err(rkisp1->dev, "Invalid bus width %u\n",
162 sink_fmt->bus_width);
163 return -EINVAL;
164 }
165 }
166
167 if (mbus_type == V4L2_MBUS_PARALLEL) {
168 if (mbus_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
169 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_VSYNC_LOW;
170
171 if (mbus_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
172 acq_prop |= RKISP1_CIF_ISP_ACQ_PROP_HSYNC_LOW;
173 }
174
175 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, isp_ctrl);
176 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_PROP,
177 acq_prop | sink_fmt->yuv_seq |
178 RKISP1_CIF_ISP_ACQ_PROP_BAYER_PAT(sink_fmt->bayer_pat) |
179 RKISP1_CIF_ISP_ACQ_PROP_FIELD_SEL_ALL);
180 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_NR_FRAMES, 0);
181
182 /* Acquisition Size */
183 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_H_OFFS, 0);
184 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_V_OFFS, 0);
185 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_H_SIZE,
186 acq_mult * sink_frm->width);
187 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ACQ_V_SIZE, sink_frm->height);
188
189 /* ISP Out Area */
190 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_H_OFFS, sink_crop->left);
191 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_V_OFFS, sink_crop->top);
192 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_H_SIZE, sink_crop->width);
193 rkisp1_write(rkisp1, RKISP1_CIF_ISP_OUT_V_SIZE, sink_crop->height);
194
195 irq_mask |= RKISP1_CIF_ISP_FRAME | RKISP1_CIF_ISP_V_START |
196 RKISP1_CIF_ISP_PIC_SIZE_ERROR;
197 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IMSC, irq_mask);
198
199 if (src_fmt->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
200 rkisp1_params_disable(&rkisp1->params);
201 } else {
202 struct v4l2_mbus_framefmt *src_frm;
203
204 src_frm = v4l2_subdev_state_get_format(sd_state,
205 RKISP1_ISP_PAD_SOURCE_VIDEO);
206 rkisp1_params_pre_configure(&rkisp1->params, sink_fmt->bayer_pat,
207 src_frm->quantization,
208 src_frm->ycbcr_enc);
209 }
210
211 isp->sink_fmt = sink_fmt;
212
213 return 0;
214 }
215
216 /* Configure MUX */
217 static void rkisp1_config_path(struct rkisp1_isp *isp,
218 enum v4l2_mbus_type mbus_type)
219 {
220 struct rkisp1_device *rkisp1 = isp->rkisp1;
221 u32 dpcl = rkisp1_read(rkisp1, RKISP1_CIF_VI_DPCL);
222
223 if (mbus_type == V4L2_MBUS_BT656 || mbus_type == V4L2_MBUS_PARALLEL)
224 dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_PARALLEL;
225 else if (mbus_type == V4L2_MBUS_CSI2_DPHY)
226 dpcl |= RKISP1_CIF_VI_DPCL_IF_SEL_MIPI;
227
228 rkisp1_write(rkisp1, RKISP1_CIF_VI_DPCL, dpcl);
229 }
230
231 /* Hardware configure Entry */
232 static int rkisp1_config_cif(struct rkisp1_isp *isp,
233 struct v4l2_subdev_state *sd_state,
234 enum v4l2_mbus_type mbus_type, u32 mbus_flags)
235 {
236 int ret;
237
238 ret = rkisp1_config_isp(isp, sd_state, mbus_type, mbus_flags);
239 if (ret)
240 return ret;
241
242 rkisp1_config_path(isp, mbus_type);
243 rkisp1_config_ism(isp, sd_state);
244
245 return 0;
246 }
247
248 static void rkisp1_isp_stop(struct rkisp1_isp *isp)
249 {
250 struct rkisp1_device *rkisp1 = isp->rkisp1;
251 u32 val;
252
253 /*
254 * ISP(mi) stop in mi frame end -> Stop ISP(mipi) ->
255 * Stop ISP(isp) ->wait for ISP isp off
256 */
257 /* stop and clear MI and ISP interrupts */
258 rkisp1_write(rkisp1, RKISP1_CIF_ISP_IMSC, 0);
259 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ICR, ~0);
260
261 rkisp1_write(rkisp1, RKISP1_CIF_MI_IMSC, 0);
262 rkisp1_write(rkisp1, RKISP1_CIF_MI_ICR, ~0);
263
264 /* stop ISP */
265 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL);
266 val &= ~(RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE |
267 RKISP1_CIF_ISP_CTRL_ISP_ENABLE);
268 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val);
269
270 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL);
271 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL,
272 val | RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD);
273
274 readx_poll_timeout(readl, rkisp1->base_addr + RKISP1_CIF_ISP_RIS,
275 val, val & RKISP1_CIF_ISP_OFF, 20, 100);
276 rkisp1_write(rkisp1, RKISP1_CIF_VI_IRCL,
277 RKISP1_CIF_VI_IRCL_MIPI_SW_RST |
278 RKISP1_CIF_VI_IRCL_ISP_SW_RST);
279 rkisp1_write(rkisp1, RKISP1_CIF_VI_IRCL, 0x0);
280 }
281
282 static void rkisp1_config_clk(struct rkisp1_isp *isp)
283 {
284 struct rkisp1_device *rkisp1 = isp->rkisp1;
285
286 u32 val = RKISP1_CIF_VI_ICCL_ISP_CLK | RKISP1_CIF_VI_ICCL_CP_CLK |
287 RKISP1_CIF_VI_ICCL_MRSZ_CLK | RKISP1_CIF_VI_ICCL_SRSZ_CLK |
288 RKISP1_CIF_VI_ICCL_JPEG_CLK | RKISP1_CIF_VI_ICCL_MI_CLK |
289 RKISP1_CIF_VI_ICCL_IE_CLK | RKISP1_CIF_VI_ICCL_MIPI_CLK |
290 RKISP1_CIF_VI_ICCL_DCROP_CLK;
291
292 rkisp1_write(rkisp1, RKISP1_CIF_VI_ICCL, val);
293
294 /* ensure sp and mp can run at the same time in V12 */
295 if (rkisp1->info->isp_ver == RKISP1_V12) {
296 val = RKISP1_CIF_CLK_CTRL_MI_Y12 | RKISP1_CIF_CLK_CTRL_MI_SP |
297 RKISP1_CIF_CLK_CTRL_MI_RAW0 | RKISP1_CIF_CLK_CTRL_MI_RAW1 |
298 RKISP1_CIF_CLK_CTRL_MI_READ | RKISP1_CIF_CLK_CTRL_MI_RAWRD |
299 RKISP1_CIF_CLK_CTRL_CP | RKISP1_CIF_CLK_CTRL_IE;
300 rkisp1_write(rkisp1, RKISP1_CIF_VI_ISP_CLK_CTRL_V12, val);
301 }
302 }
303
304 static void rkisp1_isp_start(struct rkisp1_isp *isp,
305 struct v4l2_subdev_state *sd_state)
306 {
307 struct rkisp1_device *rkisp1 = isp->rkisp1;
308 const struct v4l2_mbus_framefmt *src_fmt;
309 const struct rkisp1_mbus_info *src_info;
310 u32 val;
311
312 rkisp1_config_clk(isp);
313
314 /* Activate ISP */
315 val = rkisp1_read(rkisp1, RKISP1_CIF_ISP_CTRL);
316 val |= RKISP1_CIF_ISP_CTRL_ISP_CFG_UPD |
317 RKISP1_CIF_ISP_CTRL_ISP_ENABLE |
318 RKISP1_CIF_ISP_CTRL_ISP_INFORM_ENABLE;
319 rkisp1_write(rkisp1, RKISP1_CIF_ISP_CTRL, val);
320
321 src_fmt = v4l2_subdev_state_get_format(sd_state,
322 RKISP1_ISP_PAD_SOURCE_VIDEO);
323 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code);
324
325 if (src_info->pixel_enc != V4L2_PIXEL_ENC_BAYER)
326 rkisp1_params_post_configure(&rkisp1->params);
327 }
328
329 /* ----------------------------------------------------------------------------
330 * Subdev pad operations
331 */
332
333 static inline struct rkisp1_isp *to_rkisp1_isp(struct v4l2_subdev *sd)
334 {
335 return container_of(sd, struct rkisp1_isp, sd);
336 }
337
338 static int rkisp1_isp_enum_mbus_code(struct v4l2_subdev *sd,
339 struct v4l2_subdev_state *sd_state,
340 struct v4l2_subdev_mbus_code_enum *code)
341 {
342 unsigned int i, dir;
343 int pos = 0;
344
345 if (code->pad == RKISP1_ISP_PAD_SINK_VIDEO) {
346 dir = RKISP1_ISP_SD_SINK;
347 } else if (code->pad == RKISP1_ISP_PAD_SOURCE_VIDEO) {
348 dir = RKISP1_ISP_SD_SRC;
349 } else {
350 if (code->index > 0)
351 return -EINVAL;
352 code->code = MEDIA_BUS_FMT_METADATA_FIXED;
353 return 0;
354 }
355
356 for (i = 0; ; i++) {
357 const struct rkisp1_mbus_info *fmt =
358 rkisp1_mbus_info_get_by_index(i);
359
360 if (!fmt)
361 return -EINVAL;
362
363 if (fmt->direction & dir)
364 pos++;
365
366 if (code->index == pos - 1) {
367 code->code = fmt->mbus_code;
368 if (fmt->pixel_enc == V4L2_PIXEL_ENC_YUV &&
369 dir == RKISP1_ISP_SD_SRC)
370 code->flags =
371 V4L2_SUBDEV_MBUS_CODE_CSC_QUANTIZATION;
372 return 0;
373 }
374 }
375
376 return -EINVAL;
377 }
378
379 static int rkisp1_isp_enum_frame_size(struct v4l2_subdev *sd,
380 struct v4l2_subdev_state *sd_state,
381 struct v4l2_subdev_frame_size_enum *fse)
382 {
383 const struct rkisp1_mbus_info *mbus_info;
384
385 if (fse->pad == RKISP1_ISP_PAD_SINK_PARAMS ||
386 fse->pad == RKISP1_ISP_PAD_SOURCE_STATS)
387 return -ENOTTY;
388
389 if (fse->index > 0)
390 return -EINVAL;
391
392 mbus_info = rkisp1_mbus_info_get_by_code(fse->code);
393 if (!mbus_info)
394 return -EINVAL;
395
396 if (!(mbus_info->direction & RKISP1_ISP_SD_SINK) &&
397 fse->pad == RKISP1_ISP_PAD_SINK_VIDEO)
398 return -EINVAL;
399
400 if (!(mbus_info->direction & RKISP1_ISP_SD_SRC) &&
401 fse->pad == RKISP1_ISP_PAD_SOURCE_VIDEO)
402 return -EINVAL;
403
404 fse->min_width = RKISP1_ISP_MIN_WIDTH;
405 fse->max_width = RKISP1_ISP_MAX_WIDTH;
406 fse->min_height = RKISP1_ISP_MIN_HEIGHT;
407 fse->max_height = RKISP1_ISP_MAX_HEIGHT;
408
409 return 0;
410 }
411
412 static int rkisp1_isp_init_config(struct v4l2_subdev *sd,
413 struct v4l2_subdev_state *sd_state)
414 {
415 struct v4l2_mbus_framefmt *sink_fmt, *src_fmt;
416 struct v4l2_rect *sink_crop, *src_crop;
417
418 /* Video. */
419 sink_fmt = v4l2_subdev_state_get_format(sd_state,
420 RKISP1_ISP_PAD_SINK_VIDEO);
421 sink_fmt->width = RKISP1_DEFAULT_WIDTH;
422 sink_fmt->height = RKISP1_DEFAULT_HEIGHT;
423 sink_fmt->field = V4L2_FIELD_NONE;
424 sink_fmt->code = RKISP1_DEF_SINK_PAD_FMT;
425 sink_fmt->colorspace = V4L2_COLORSPACE_RAW;
426 sink_fmt->xfer_func = V4L2_XFER_FUNC_NONE;
427 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
428 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
429
430 sink_crop = v4l2_subdev_state_get_crop(sd_state,
431 RKISP1_ISP_PAD_SINK_VIDEO);
432 sink_crop->width = RKISP1_DEFAULT_WIDTH;
433 sink_crop->height = RKISP1_DEFAULT_HEIGHT;
434 sink_crop->left = 0;
435 sink_crop->top = 0;
436
437 src_fmt = v4l2_subdev_state_get_format(sd_state,
438 RKISP1_ISP_PAD_SOURCE_VIDEO);
439 *src_fmt = *sink_fmt;
440 src_fmt->code = RKISP1_DEF_SRC_PAD_FMT;
441 src_fmt->colorspace = V4L2_COLORSPACE_SRGB;
442 src_fmt->xfer_func = V4L2_XFER_FUNC_SRGB;
443 src_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
444 src_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE;
445
446 src_crop = v4l2_subdev_state_get_crop(sd_state,
447 RKISP1_ISP_PAD_SOURCE_VIDEO);
448 *src_crop = *sink_crop;
449
450 /* Parameters and statistics. */
451 sink_fmt = v4l2_subdev_state_get_format(sd_state,
452 RKISP1_ISP_PAD_SINK_PARAMS);
453 src_fmt = v4l2_subdev_state_get_format(sd_state,
454 RKISP1_ISP_PAD_SOURCE_STATS);
455 sink_fmt->width = 0;
456 sink_fmt->height = 0;
457 sink_fmt->field = V4L2_FIELD_NONE;
458 sink_fmt->code = MEDIA_BUS_FMT_METADATA_FIXED;
459 *src_fmt = *sink_fmt;
460
461 return 0;
462 }
463
464 static void rkisp1_isp_set_src_fmt(struct rkisp1_isp *isp,
465 struct v4l2_subdev_state *sd_state,
466 struct v4l2_mbus_framefmt *format)
467 {
468 const struct rkisp1_mbus_info *sink_info;
469 const struct rkisp1_mbus_info *src_info;
470 struct v4l2_mbus_framefmt *sink_fmt;
471 struct v4l2_mbus_framefmt *src_fmt;
472 const struct v4l2_rect *src_crop;
473 bool set_csc;
474
475 sink_fmt = v4l2_subdev_state_get_format(sd_state,
476 RKISP1_ISP_PAD_SINK_VIDEO);
477 src_fmt = v4l2_subdev_state_get_format(sd_state,
478 RKISP1_ISP_PAD_SOURCE_VIDEO);
479 src_crop = v4l2_subdev_state_get_crop(sd_state,
480 RKISP1_ISP_PAD_SOURCE_VIDEO);
481
482 /*
483 * Media bus code. The ISP can operate in pass-through mode (Bayer in,
484 * Bayer out or YUV in, YUV out) or process Bayer data to YUV, but
485 * can't convert from YUV to Bayer.
486 */
487 sink_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
488
489 src_fmt->code = format->code;
490 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code);
491 if (!src_info || !(src_info->direction & RKISP1_ISP_SD_SRC)) {
492 src_fmt->code = RKISP1_DEF_SRC_PAD_FMT;
493 src_info = rkisp1_mbus_info_get_by_code(src_fmt->code);
494 }
495
496 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_YUV &&
497 src_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
498 src_fmt->code = sink_fmt->code;
499 src_info = sink_info;
500 }
501
502 /*
503 * The source width and height must be identical to the source crop
504 * size.
505 */
506 src_fmt->width = src_crop->width;
507 src_fmt->height = src_crop->height;
508
509 /*
510 * Copy the color space for the sink pad. When converting from Bayer to
511 * YUV, default to a limited quantization range.
512 */
513 src_fmt->colorspace = sink_fmt->colorspace;
514 src_fmt->xfer_func = sink_fmt->xfer_func;
515 src_fmt->ycbcr_enc = sink_fmt->ycbcr_enc;
516
517 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_BAYER &&
518 src_info->pixel_enc == V4L2_PIXEL_ENC_YUV)
519 src_fmt->quantization = V4L2_QUANTIZATION_LIM_RANGE;
520 else
521 src_fmt->quantization = sink_fmt->quantization;
522
523 /*
524 * Allow setting the source color space fields when the SET_CSC flag is
525 * set and the source format is YUV. If the sink format is YUV, don't
526 * set the color primaries, transfer function or YCbCr encoding as the
527 * ISP is bypassed in that case and passes YUV data through without
528 * modifications.
529 *
530 * The color primaries and transfer function are configured through the
531 * cross-talk matrix and tone curve respectively. Settings for those
532 * hardware blocks are conveyed through the ISP parameters buffer, as
533 * they need to combine color space information with other image tuning
534 * characteristics and can't thus be computed by the kernel based on the
535 * color space. The source pad colorspace and xfer_func fields are thus
536 * ignored by the driver, but can be set by userspace to propagate
537 * accurate color space information down the pipeline.
538 */
539 set_csc = format->flags & V4L2_MBUS_FRAMEFMT_SET_CSC;
540
541 if (set_csc && src_info->pixel_enc == V4L2_PIXEL_ENC_YUV) {
542 if (sink_info->pixel_enc == V4L2_PIXEL_ENC_BAYER) {
543 if (format->colorspace != V4L2_COLORSPACE_DEFAULT)
544 src_fmt->colorspace = format->colorspace;
545 if (format->xfer_func != V4L2_XFER_FUNC_DEFAULT)
546 src_fmt->xfer_func = format->xfer_func;
547 if (format->ycbcr_enc != V4L2_YCBCR_ENC_DEFAULT)
548 src_fmt->ycbcr_enc = format->ycbcr_enc;
549 }
550
551 if (format->quantization != V4L2_QUANTIZATION_DEFAULT)
552 src_fmt->quantization = format->quantization;
553 }
554
555 *format = *src_fmt;
556
557 /*
558 * Restore the SET_CSC flag if it was set to indicate support for the
559 * CSC setting API.
560 */
561 if (set_csc)
562 format->flags |= V4L2_MBUS_FRAMEFMT_SET_CSC;
563 }
564
565 static void rkisp1_isp_set_src_crop(struct rkisp1_isp *isp,
566 struct v4l2_subdev_state *sd_state,
567 struct v4l2_rect *r)
568 {
569 struct v4l2_mbus_framefmt *src_fmt;
570 const struct v4l2_rect *sink_crop;
571 struct v4l2_rect *src_crop;
572
573 src_crop = v4l2_subdev_state_get_crop(sd_state,
574 RKISP1_ISP_PAD_SOURCE_VIDEO);
575 sink_crop = v4l2_subdev_state_get_crop(sd_state,
576 RKISP1_ISP_PAD_SINK_VIDEO);
577
578 src_crop->left = ALIGN(r->left, 2);
579 src_crop->width = ALIGN(r->width, 2);
580 src_crop->top = r->top;
581 src_crop->height = r->height;
582 rkisp1_sd_adjust_crop_rect(src_crop, sink_crop);
583
584 *r = *src_crop;
585
586 /* Propagate to out format */
587 src_fmt = v4l2_subdev_state_get_format(sd_state,
588 RKISP1_ISP_PAD_SOURCE_VIDEO);
589 rkisp1_isp_set_src_fmt(isp, sd_state, src_fmt);
590 }
591
592 static void rkisp1_isp_set_sink_crop(struct rkisp1_isp *isp,
593 struct v4l2_subdev_state *sd_state,
594 struct v4l2_rect *r)
595 {
596 struct v4l2_rect *sink_crop, *src_crop;
597 const struct v4l2_mbus_framefmt *sink_fmt;
598
599 sink_crop = v4l2_subdev_state_get_crop(sd_state,
600 RKISP1_ISP_PAD_SINK_VIDEO);
601 sink_fmt = v4l2_subdev_state_get_format(sd_state,
602 RKISP1_ISP_PAD_SINK_VIDEO);
603
604 sink_crop->left = ALIGN(r->left, 2);
605 sink_crop->width = ALIGN(r->width, 2);
606 sink_crop->top = r->top;
607 sink_crop->height = r->height;
608 rkisp1_sd_adjust_crop(sink_crop, sink_fmt);
609
610 *r = *sink_crop;
611
612 /* Propagate to out crop */
613 src_crop = v4l2_subdev_state_get_crop(sd_state,
614 RKISP1_ISP_PAD_SOURCE_VIDEO);
615 rkisp1_isp_set_src_crop(isp, sd_state, src_crop);
616 }
617
618 static void rkisp1_isp_set_sink_fmt(struct rkisp1_isp *isp,
619 struct v4l2_subdev_state *sd_state,
620 struct v4l2_mbus_framefmt *format)
621 {
622 const struct rkisp1_mbus_info *mbus_info;
623 struct v4l2_mbus_framefmt *sink_fmt;
624 struct v4l2_rect *sink_crop;
625 bool is_yuv;
626
627 sink_fmt = v4l2_subdev_state_get_format(sd_state,
628 RKISP1_ISP_PAD_SINK_VIDEO);
629 sink_fmt->code = format->code;
630 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
631 if (!mbus_info || !(mbus_info->direction & RKISP1_ISP_SD_SINK)) {
632 sink_fmt->code = RKISP1_DEF_SINK_PAD_FMT;
633 mbus_info = rkisp1_mbus_info_get_by_code(sink_fmt->code);
634 }
635
636 sink_fmt->width = clamp_t(u32, format->width,
637 RKISP1_ISP_MIN_WIDTH,
638 RKISP1_ISP_MAX_WIDTH);
639 sink_fmt->height = clamp_t(u32, format->height,
640 RKISP1_ISP_MIN_HEIGHT,
641 RKISP1_ISP_MAX_HEIGHT);
642
643 /*
644 * Adjust the color space fields. Accept any color primaries and
645 * transfer function for both YUV and Bayer. For YUV any YCbCr encoding
646 * and quantization range is also accepted. For Bayer formats, the YCbCr
647 * encoding isn't applicable, and the quantization range can only be
648 * full.
649 */
650 is_yuv = mbus_info->pixel_enc == V4L2_PIXEL_ENC_YUV;
651
652 sink_fmt->colorspace = format->colorspace ? :
653 (is_yuv ? V4L2_COLORSPACE_SRGB :
654 V4L2_COLORSPACE_RAW);
655 sink_fmt->xfer_func = format->xfer_func ? :
656 V4L2_MAP_XFER_FUNC_DEFAULT(sink_fmt->colorspace);
657 if (is_yuv) {
658 sink_fmt->ycbcr_enc = format->ycbcr_enc ? :
659 V4L2_MAP_YCBCR_ENC_DEFAULT(sink_fmt->colorspace);
660 sink_fmt->quantization = format->quantization ? :
661 V4L2_MAP_QUANTIZATION_DEFAULT(false, sink_fmt->colorspace,
662 sink_fmt->ycbcr_enc);
663 } else {
664 /*
665 * The YCbCr encoding isn't applicable for non-YUV formats, but
666 * V4L2 has no "no encoding" value. Hardcode it to Rec. 601, it
667 * should be ignored by userspace.
668 */
669 sink_fmt->ycbcr_enc = V4L2_YCBCR_ENC_601;
670 sink_fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
671 }
672
673 *format = *sink_fmt;
674
675 /* Propagate to in crop */
676 sink_crop = v4l2_subdev_state_get_crop(sd_state,
677 RKISP1_ISP_PAD_SINK_VIDEO);
678 rkisp1_isp_set_sink_crop(isp, sd_state, sink_crop);
679 }
680
681 static int rkisp1_isp_set_fmt(struct v4l2_subdev *sd,
682 struct v4l2_subdev_state *sd_state,
683 struct v4l2_subdev_format *fmt)
684 {
685 struct rkisp1_isp *isp = to_rkisp1_isp(sd);
686
687 if (fmt->pad == RKISP1_ISP_PAD_SINK_VIDEO)
688 rkisp1_isp_set_sink_fmt(isp, sd_state, &fmt->format);
689 else if (fmt->pad == RKISP1_ISP_PAD_SOURCE_VIDEO)
690 rkisp1_isp_set_src_fmt(isp, sd_state, &fmt->format);
691 else
692 fmt->format = *v4l2_subdev_state_get_format(sd_state,
693 fmt->pad);
694
695 return 0;
696 }
697
698 static int rkisp1_isp_get_selection(struct v4l2_subdev *sd,
699 struct v4l2_subdev_state *sd_state,
700 struct v4l2_subdev_selection *sel)
701 {
702 int ret = 0;
703
704 if (sel->pad != RKISP1_ISP_PAD_SOURCE_VIDEO &&
705 sel->pad != RKISP1_ISP_PAD_SINK_VIDEO)
706 return -EINVAL;
707
708 switch (sel->target) {
709 case V4L2_SEL_TGT_CROP_BOUNDS:
710 if (sel->pad == RKISP1_ISP_PAD_SINK_VIDEO) {
711 struct v4l2_mbus_framefmt *fmt;
712
713 fmt = v4l2_subdev_state_get_format(sd_state, sel->pad);
714 sel->r.height = fmt->height;
715 sel->r.width = fmt->width;
716 sel->r.left = 0;
717 sel->r.top = 0;
718 } else {
719 sel->r = *v4l2_subdev_state_get_crop(sd_state,
720 RKISP1_ISP_PAD_SINK_VIDEO);
721 }
722 break;
723
724 case V4L2_SEL_TGT_CROP:
725 sel->r = *v4l2_subdev_state_get_crop(sd_state, sel->pad);
726 break;
727
728 default:
729 ret = -EINVAL;
730 break;
731 }
732
733 return ret;
734 }
735
736 static int rkisp1_isp_set_selection(struct v4l2_subdev *sd,
737 struct v4l2_subdev_state *sd_state,
738 struct v4l2_subdev_selection *sel)
739 {
740 struct rkisp1_isp *isp = to_rkisp1_isp(sd);
741 int ret = 0;
742
743 if (sel->target != V4L2_SEL_TGT_CROP)
744 return -EINVAL;
745
746 dev_dbg(isp->rkisp1->dev, "%s: pad: %d sel(%d,%d)/%dx%d\n", __func__,
747 sel->pad, sel->r.left, sel->r.top, sel->r.width, sel->r.height);
748
749 if (sel->pad == RKISP1_ISP_PAD_SINK_VIDEO)
750 rkisp1_isp_set_sink_crop(isp, sd_state, &sel->r);
751 else if (sel->pad == RKISP1_ISP_PAD_SOURCE_VIDEO)
752 rkisp1_isp_set_src_crop(isp, sd_state, &sel->r);
753 else
754 ret = -EINVAL;
755
756 return ret;
757 }
758
759 static int rkisp1_subdev_link_validate(struct media_link *link)
760 {
761 if (link->sink->index == RKISP1_ISP_PAD_SINK_PARAMS)
762 return 0;
763
764 return v4l2_subdev_link_validate(link);
765 }
766
767 static const struct v4l2_subdev_pad_ops rkisp1_isp_pad_ops = {
768 .enum_mbus_code = rkisp1_isp_enum_mbus_code,
769 .enum_frame_size = rkisp1_isp_enum_frame_size,
770 .get_selection = rkisp1_isp_get_selection,
771 .set_selection = rkisp1_isp_set_selection,
772 .init_cfg = rkisp1_isp_init_config,
773 .get_fmt = v4l2_subdev_get_fmt,
774 .set_fmt = rkisp1_isp_set_fmt,
775 .link_validate = v4l2_subdev_link_validate_default,
776 };
777
778 /* ----------------------------------------------------------------------------
779 * Stream operations
780 */
781
782 static int rkisp1_isp_s_stream(struct v4l2_subdev *sd, int enable)
783 {
784 struct rkisp1_isp *isp = to_rkisp1_isp(sd);
785 struct rkisp1_device *rkisp1 = isp->rkisp1;
786 struct v4l2_subdev_state *sd_state;
787 struct media_pad *source_pad;
788 struct media_pad *sink_pad;
789 enum v4l2_mbus_type mbus_type;
790 u32 mbus_flags;
791 int ret;
792
793 if (!enable) {
794 v4l2_subdev_call(rkisp1->source, video, s_stream, false);
795 rkisp1_isp_stop(isp);
796 return 0;
797 }
798
799 sink_pad = &isp->pads[RKISP1_ISP_PAD_SINK_VIDEO];
800 source_pad = media_pad_remote_pad_unique(sink_pad);
801 if (IS_ERR(source_pad)) {
802 dev_dbg(rkisp1->dev, "Failed to get source for ISP: %ld\n",
803 PTR_ERR(source_pad));
804 return -EPIPE;
805 }
806
807 rkisp1->source = media_entity_to_v4l2_subdev(source_pad->entity);
808 if (!rkisp1->source) {
809 /* This should really not happen, so is not worth a message. */
810 return -EPIPE;
811 }
812
813 if (rkisp1->source == &rkisp1->csi.sd) {
814 mbus_type = V4L2_MBUS_CSI2_DPHY;
815 mbus_flags = 0;
816 } else {
817 const struct rkisp1_sensor_async *asd;
818 struct v4l2_async_connection *asc;
819
820 asc = v4l2_async_connection_unique(rkisp1->source);
821 if (!asc)
822 return -EPIPE;
823
824 asd = container_of(asc, struct rkisp1_sensor_async, asd);
825
826 mbus_type = asd->mbus_type;
827 mbus_flags = asd->mbus_flags;
828 }
829
830 isp->frame_sequence = -1;
831
832 sd_state = v4l2_subdev_lock_and_get_active_state(sd);
833
834 ret = rkisp1_config_cif(isp, sd_state, mbus_type, mbus_flags);
835 if (ret)
836 goto out_unlock;
837
838 rkisp1_isp_start(isp, sd_state);
839
840 ret = v4l2_subdev_call(rkisp1->source, video, s_stream, true);
841 if (ret) {
842 rkisp1_isp_stop(isp);
843 goto out_unlock;
844 }
845
846 out_unlock:
847 v4l2_subdev_unlock_state(sd_state);
848 return ret;
849 }
850
851 static int rkisp1_isp_subs_evt(struct v4l2_subdev *sd, struct v4l2_fh *fh,
852 struct v4l2_event_subscription *sub)
853 {
854 if (sub->type != V4L2_EVENT_FRAME_SYNC)
855 return -EINVAL;
856
857 /* V4L2_EVENT_FRAME_SYNC doesn't require an id, so zero should be set */
858 if (sub->id != 0)
859 return -EINVAL;
860
861 return v4l2_event_subscribe(fh, sub, 0, NULL);
862 }
863
864 static const struct media_entity_operations rkisp1_isp_media_ops = {
865 .link_validate = rkisp1_subdev_link_validate,
866 };
867
868 static const struct v4l2_subdev_video_ops rkisp1_isp_video_ops = {
869 .s_stream = rkisp1_isp_s_stream,
870 };
871
872 static const struct v4l2_subdev_core_ops rkisp1_isp_core_ops = {
873 .subscribe_event = rkisp1_isp_subs_evt,
874 .unsubscribe_event = v4l2_event_subdev_unsubscribe,
875 };
876
877 static const struct v4l2_subdev_ops rkisp1_isp_ops = {
878 .core = &rkisp1_isp_core_ops,
879 .video = &rkisp1_isp_video_ops,
880 .pad = &rkisp1_isp_pad_ops,
881 };
882
883 int rkisp1_isp_register(struct rkisp1_device *rkisp1)
884 {
885 struct rkisp1_isp *isp = &rkisp1->isp;
886 struct media_pad *pads = isp->pads;
887 struct v4l2_subdev *sd = &isp->sd;
888 int ret;
889
890 isp->rkisp1 = rkisp1;
891
892 v4l2_subdev_init(sd, &rkisp1_isp_ops);
893 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE | V4L2_SUBDEV_FL_HAS_EVENTS;
894 sd->entity.ops = &rkisp1_isp_media_ops;
895 sd->entity.function = MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER;
896 sd->owner = THIS_MODULE;
897 strscpy(sd->name, RKISP1_ISP_DEV_NAME, sizeof(sd->name));
898
899 pads[RKISP1_ISP_PAD_SINK_VIDEO].flags = MEDIA_PAD_FL_SINK |
900 MEDIA_PAD_FL_MUST_CONNECT;
901 pads[RKISP1_ISP_PAD_SINK_PARAMS].flags = MEDIA_PAD_FL_SINK;
902 pads[RKISP1_ISP_PAD_SOURCE_VIDEO].flags = MEDIA_PAD_FL_SOURCE;
903 pads[RKISP1_ISP_PAD_SOURCE_STATS].flags = MEDIA_PAD_FL_SOURCE;
904
905 ret = media_entity_pads_init(&sd->entity, RKISP1_ISP_PAD_MAX, pads);
906 if (ret)
907 goto err_entity_cleanup;
908
909 ret = v4l2_subdev_init_finalize(sd);
910 if (ret)
911 goto err_subdev_cleanup;
912
913 ret = v4l2_device_register_subdev(&rkisp1->v4l2_dev, sd);
914 if (ret) {
915 dev_err(rkisp1->dev, "Failed to register isp subdev\n");
916 goto err_subdev_cleanup;
917 }
918
919 return 0;
920
921 err_subdev_cleanup:
922 v4l2_subdev_cleanup(sd);
923 err_entity_cleanup:
924 media_entity_cleanup(&sd->entity);
925 isp->sd.v4l2_dev = NULL;
926 return ret;
927 }
928
929 void rkisp1_isp_unregister(struct rkisp1_device *rkisp1)
930 {
931 struct rkisp1_isp *isp = &rkisp1->isp;
932
933 if (!isp->sd.v4l2_dev)
934 return;
935
936 v4l2_device_unregister_subdev(&isp->sd);
937 media_entity_cleanup(&isp->sd.entity);
938 }
939
940 /* ----------------------------------------------------------------------------
941 * Interrupt handlers
942 */
943
944 static void rkisp1_isp_queue_event_sof(struct rkisp1_isp *isp)
945 {
946 struct v4l2_event event = {
947 .type = V4L2_EVENT_FRAME_SYNC,
948 };
949
950 event.u.frame_sync.frame_sequence = isp->frame_sequence;
951 v4l2_event_queue(isp->sd.devnode, &event);
952 }
953
954 irqreturn_t rkisp1_isp_isr(int irq, void *ctx)
955 {
956 struct device *dev = ctx;
957 struct rkisp1_device *rkisp1 = dev_get_drvdata(dev);
958 u32 status, isp_err;
959
960 status = rkisp1_read(rkisp1, RKISP1_CIF_ISP_MIS);
961 if (!status)
962 return IRQ_NONE;
963
964 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ICR, status);
965
966 /* Vertical sync signal, starting generating new frame */
967 if (status & RKISP1_CIF_ISP_V_START) {
968 rkisp1->isp.frame_sequence++;
969 rkisp1_isp_queue_event_sof(&rkisp1->isp);
970 if (status & RKISP1_CIF_ISP_FRAME) {
971 WARN_ONCE(1, "irq delay is too long, buffers might not be in sync\n");
972 rkisp1->debug.irq_delay++;
973 }
974 }
975 if (status & RKISP1_CIF_ISP_PIC_SIZE_ERROR) {
976 /* Clear pic_size_error */
977 isp_err = rkisp1_read(rkisp1, RKISP1_CIF_ISP_ERR);
978 if (isp_err & RKISP1_CIF_ISP_ERR_INFORM_SIZE)
979 rkisp1->debug.inform_size_error++;
980 if (isp_err & RKISP1_CIF_ISP_ERR_IS_SIZE)
981 rkisp1->debug.img_stabilization_size_error++;
982 if (isp_err & RKISP1_CIF_ISP_ERR_OUTFORM_SIZE)
983 rkisp1->debug.outform_size_error++;
984 rkisp1_write(rkisp1, RKISP1_CIF_ISP_ERR_CLR, isp_err);
985 } else if (status & RKISP1_CIF_ISP_DATA_LOSS) {
986 /* keep track of data_loss in debugfs */
987 rkisp1->debug.data_loss++;
988 }
989
990 if (status & RKISP1_CIF_ISP_FRAME) {
991 u32 isp_ris;
992
993 /* New frame from the sensor received */
994 isp_ris = rkisp1_read(rkisp1, RKISP1_CIF_ISP_RIS);
995 if (isp_ris & RKISP1_STATS_MEAS_MASK)
996 rkisp1_stats_isr(&rkisp1->stats, isp_ris);
997 /*
998 * Then update changed configs. Some of them involve
999 * lot of register writes. Do those only one per frame.
1000 * Do the updates in the order of the processing flow.
1001 */
1002 rkisp1_params_isr(rkisp1);
1003 }
1004
1005 return IRQ_HANDLED;
1006 }