[Patch 3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins

[Patch 3/6] Support AVX10.1 for AVX512DQ+AVX512VL intrins

gcc/ChangeLog:

	* config/i386/avx512vldqintrin.h: Remove target attribute.
	* config/i386/i386-builtin.def (BDESC):
	Add OPTION_MASK_ISA2_AVX10_1.
	* config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
	* config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
	(VI48_AVX512VLDQ_AVX10_1): Ditto.
	(VF2_AVX512VL): Remove.
	(VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
	Add TARGET_AVX10_1.
	(*<code><mode>3<mask_name>): Change isa attribute to
	avx10_1_or_avx512dq. Add TARGET_AVX10_1.
	(<code><mode>3): Add TARGET_AVX10_1. Change isa attr
	to avx10_1_or_avx512vl.
	(<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
	(<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
	Add TARGET_AVX10_1.
	(<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
	Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
	(<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
	Add TARGET_AVX10_1.
	(float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
	Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
	(float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
	Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
	(float<floatunssuffix>v4div4sf2<mask_name>):
	Add TARGET_AVX10_1.
	(avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
	(*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
	(float<floatunssuffix>v2div2sf2): Ditto.
	(float<floatunssuffix>v2div2sf2_mask): Ditto.
	(*float<floatunssuffix>v2div2sf2_mask): Ditto.
	(*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
	(<avx512>_cvt<ssemodesuffix>2mask<mode>):
	Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
	(<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
	(*<avx512>_cvtmask2<ssemodesuffix><mode>):
	Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
	Change when constraint is enabled.