From 3d29045b5e8329d97693eda8d98f1d1e60b99c8f Mon Sep 17 00:00:00 2001 From: "H.J. Lu" Date: Fri, 3 Jun 2011 07:01:25 -0400 Subject: [PATCH] Assume Intel Core i3/i5/i7 processor if AVX is available --- ChangeLog | 5 +++++ sysdeps/x86_64/multiarch/init-arch.c | 7 +++++++ 2 files changed, 12 insertions(+) diff --git a/ChangeLog b/ChangeLog index eee3d1bfd91..6a11ec67ea1 100644 --- a/ChangeLog +++ b/ChangeLog @@ -1,3 +1,8 @@ +2011-06-02 H.J. Lu + + * sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features): + Assume Intel Core i3/i5/i7 processor if AVX is available. + 2011-05-31 Andreas Schwab * nscd/nscd_getserv_r.c (nscd_getserv_r): Don't free non-malloced diff --git a/sysdeps/x86_64/multiarch/init-arch.c b/sysdeps/x86_64/multiarch/init-arch.c index 34ec2df2d5b..809d105c775 100644 --- a/sysdeps/x86_64/multiarch/init-arch.c +++ b/sysdeps/x86_64/multiarch/init-arch.c @@ -74,6 +74,7 @@ __init_cpu_features (void) } else if (family == 0x06) { + ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx; model += extended_model; switch (model) { @@ -83,6 +84,12 @@ __init_cpu_features (void) __cpu_features.feature[index_Slow_BSF] |= bit_Slow_BSF; break; + default: + /* Unknown family 0x06 processors. Assuming this is one + of Core i3/i5/i7 processors if AVX is available. */ + if ((ecx & bit_AVX) == 0) + break; + case 0x1a: case 0x1e: case 0x1f: -- 2.39.5