From 4bf6c438d2117f8473b36b84eb8bd44487631efa Mon Sep 17 00:00:00 2001
From: Richard Sandiford <richard@codesourcery.com>
Date: Fri, 17 Aug 2007 13:12:22 +0000
Subject: [PATCH] mt-sde: New file.

2007-08-17  Richard Sandiford  <richard@codesourcery.com>
	    Nigel Stephens  <nigel@mips.com>

	* config/mt-sde: New file.
	* configure.ac (mips*-sde-elf*): New stanza.  Use config/mt-sde
	as target_makefile_frag.
	* configure: Regenerate.

gcc/
2007-08-17  Richard Sandiford  <richard@codesourcery.com>
	    Nigel Stephens  <nigel@mips.com>

	* config/mips/sde.h (DRIVER_SELF_SPECS): Add commas.
	Treat -mno-data-in-code and -mcode-xonly as aliases for
	-mcode-readable=no and -mcode-readable=pcrel respectively.
	* config/mips/t-sde (TARGET_LIBGCC2_CFLAGS): Add -mcode-xonly.
	(MULTILIB_OPTIONS): Add -mcode-readable=no multilibs.
	(MULTILIB_DIRNAMES): Update accordingly.

Co-Authored-By: Nigel Stephens <nigel@mips.com>

From-SVN: r127586
---
 ChangeLog             |  8 ++++++++
 config/mt-sde         |  8 ++++++++
 configure             |  3 +++
 configure.ac          |  3 +++
 gcc/ChangeLog         | 10 ++++++++++
 gcc/config/mips/sde.h | 11 +++++++++--
 gcc/config/mips/t-sde |  8 +++++---
 7 files changed, 46 insertions(+), 5 deletions(-)
 create mode 100644 config/mt-sde

diff --git a/ChangeLog b/ChangeLog
index f19b1398e519..c66e67122128 100644
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,11 @@
+2007-08-17  Richard Sandiford  <richard@codesourcery.com>
+	    Nigel Stephens  <nigel@mips.com>
+
+	* config/mt-sde: New file.
+	* configure.ac (mips*-sde-elf*): New stanza.  Use config/mt-sde
+	as target_makefile_frag.
+	* configure: Regenerate.
+
 2007-08-16  Alexandre Oliva  <aoliva@redhat.com>
 
 	* Makefile.def (STAGE2_CFLAGS, STAGE3_CFLAGS, STAGE4_CFLAGS):
diff --git a/config/mt-sde b/config/mt-sde
new file mode 100644
index 000000000000..e74616105cfc
--- /dev/null
+++ b/config/mt-sde
@@ -0,0 +1,8 @@
+# We default to building libraries optimised for size.  We switch off
+# sibling-call optimization to permit interlinking of MIPS16 and
+# non-MIPS16 functions. The -mcode-xonly option allows MIPS16
+# libraries to run on Harvard-style split I/D memories, so long as
+# they have the D-to-I redirect for pc-relative loads.
+
+CFLAGS_FOR_TARGET = -Os -fno-optimize-sibling-calls -mcode-xonly
+CXXFLAGS_FOR_TARGET = -Os -fno-optimize-sibling-calls -mcode-xonly
diff --git a/configure b/configure
index 7b9cc63c6ede..ac3eeb1d92ea 100755
--- a/configure
+++ b/configure
@@ -5224,6 +5224,9 @@ case "${target}" in
   spu-*-*)
     target_makefile_frag="config/mt-spu"
     ;;
+  mips*-sde-elf*)
+    target_makefile_frag="config/mt-sde"
+    ;;
   *-*-netware*)
     target_makefile_frag="config/mt-netware"
     ;;
diff --git a/configure.ac b/configure.ac
index 8f957f4cdcf2..9e0efc32c7c7 100644
--- a/configure.ac
+++ b/configure.ac
@@ -1748,6 +1748,9 @@ case "${target}" in
   spu-*-*)
     target_makefile_frag="config/mt-spu"
     ;;
+  mips*-sde-elf*)
+    target_makefile_frag="config/mt-sde"
+    ;;
   *-*-netware*)
     target_makefile_frag="config/mt-netware"
     ;;
diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 659a5862c5b2..00894c94cca0 100644
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,13 @@
+2007-08-17  Richard Sandiford  <richard@codesourcery.com>
+	    Nigel Stephens  <nigel@mips.com>
+
+	* config/mips/sde.h (DRIVER_SELF_SPECS): Add commas.
+	Treat -mno-data-in-code and -mcode-xonly as aliases for
+	-mcode-readable=no and -mcode-readable=pcrel respectively.
+	* config/mips/t-sde (TARGET_LIBGCC2_CFLAGS): Add -mcode-xonly.
+	(MULTILIB_OPTIONS): Add -mcode-readable=no multilibs.
+	(MULTILIB_DIRNAMES): Update accordingly.
+
 2007-08-17  H.J. Lu  <hongjiu.lu@intel.com>
 
 	* Makefile.in (version.o): Depend on $(REVISION) only if
diff --git a/gcc/config/mips/sde.h b/gcc/config/mips/sde.h
index 14a161025d57..d8094c5a6a67 100644
--- a/gcc/config/mips/sde.h
+++ b/gcc/config/mips/sde.h
@@ -36,11 +36,18 @@ Boston, MA 02111-1307, USA.  */
   /* Remove a redundant -mfp64 for -mabi=n32; we want the !mfp64	\
      multilibs.  There's no need to check whether the architecture	\
      is 64-bit; cc1 will complain if it isn't.  */			\
-  "%{mabi=n32: %<mfp64}"						\
+  "%{mabi=n32: %<mfp64}",						\
 									\
   /* Make sure that an endian option is always present.  This makes	\
      things like LINK_SPEC easier to write.  */				\
-  "%{!EB:%{!EL:%(endian_spec)}}"
+  "%{!EB:%{!EL:%(endian_spec)}}",					\
+									\
+  /* -mcode-xonly is a traditional alias for -mcode-readable=pcrel and	\
+     -mno-data-in-code is a traditional alias for -mcode-readable=no.	\
+     The latter trumps the former.  */					\
+  "%{mno-data-in-code: -mcode-readable=no}",				\
+  "%{!mcode-readable=no: %{mcode-xonly: -mcode-readable=pcrel}}",	\
+  "%<mno-data-in-code %<mcode-xonly"
 
 /* Use trap rather than break for all but MIPS I ISA.  Force -no-mips16,
    so that MIPS16 assembler code requires an explicit ".set mips16".
diff --git a/gcc/config/mips/t-sde b/gcc/config/mips/t-sde
index 40c62dcc728e..e019cbbb718a 100644
--- a/gcc/config/mips/t-sde
+++ b/gcc/config/mips/t-sde
@@ -14,10 +14,12 @@ $(T)crtn.o: $(srcdir)/config/mips/crtn.asm $(GCC_PASSES)
 # without the $gp register. Use -fno-optimize-sibling-calls in case
 # we have a mixed mips16/non-mips16 environment where a plain "jump"
 # instuction won't work across the divide (no jx instruction).
-TARGET_LIBGCC2_CFLAGS = -G 0 -fno-optimize-sibling-calls
+# Compile libraries with -mcode-xonly, so that they are link-compatible
+# with both -mcode-readable=pcrel and -mcode-readable=yes.
+TARGET_LIBGCC2_CFLAGS = -G 0 -fno-optimize-sibling-calls -mcode-xonly
 
-MULTILIB_OPTIONS = EL/EB mips32/mips32r2/mips64 mips16 msoft-float/mfp64
-MULTILIB_DIRNAMES = el eb mips32 mips32r2 mips64 mips16 sof f64
+MULTILIB_OPTIONS = EL/EB mips32/mips32r2/mips64 mips16 msoft-float/mfp64 mcode-readable=no
+MULTILIB_DIRNAMES = el eb mips32 mips32r2 mips64 mips16 sof f64 spram
 MULTILIB_MATCHES = EL=mel EB=meb
 
 # The -mfp64 option is only valid in conjunction with -mips32r2.
-- 
2.39.5