From 0864bfc257a3d3198ba182c562b729ba1e96466d Mon Sep 17 00:00:00 2001 From: Ganesh Gopalasubramanian Date: Mon, 13 May 2013 09:35:54 +0000 Subject: [PATCH] AMD specific default alignment changes From-SVN: r198820 --- gcc/ChangeLog | 5 +++++ gcc/config/i386/i386.c | 10 +++++----- 2 files changed, 10 insertions(+), 5 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index 945f525ead0b..b33e4f38775d 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,8 @@ +2013-05-13 Ganesh Gopalasubramanian + + * config/i386/i386.c (processor_target_table): Modified default + alignment values for AMD BD and BT architectures. + 2013-05-13 Marc Glisse * tree-vect-generic.c (uniform_vector_p): Move ... diff --git a/gcc/config/i386/i386.c b/gcc/config/i386/i386.c index 86439ba2fb97..c28a8578c585 100644 --- a/gcc/config/i386/i386.c +++ b/gcc/config/i386/i386.c @@ -2453,11 +2453,11 @@ static const struct ptt processor_target_table[PROCESSOR_max] = {&generic32_cost, 16, 7, 16, 7, 16}, {&generic64_cost, 16, 10, 16, 10, 16}, {&amdfam10_cost, 32, 24, 32, 7, 32}, - {&bdver1_cost, 32, 24, 32, 7, 32}, - {&bdver2_cost, 32, 24, 32, 7, 32}, - {&bdver3_cost, 32, 24, 32, 7, 32}, - {&btver1_cost, 32, 24, 32, 7, 32}, - {&btver2_cost, 32, 24, 32, 7, 32}, + {&bdver1_cost, 16, 10, 16, 7, 11}, + {&bdver2_cost, 16, 10, 16, 7, 11}, + {&bdver3_cost, 16, 10, 16, 7, 11}, + {&btver1_cost, 16, 10, 16, 7, 11}, + {&btver2_cost, 16, 10, 16, 7, 11}, {&atom_cost, 16, 15, 16, 7, 16} }; -- 2.47.2