From 0abb0cc7bcbc0bd77c902c59930e228ad541c668 Mon Sep 17 00:00:00 2001 From: Sasha Levin Date: Sun, 6 Jun 2021 18:38:49 -0400 Subject: [PATCH] Fixes for 5.12 Signed-off-by: Sasha Levin --- ...con-avari-fix-nxp-pca8574-gpio-cells.patch | 36 +++++ ...erkat96-fix-the-tuning-step-property.patch | 38 +++++ ...7d-pico-fix-the-tuning-step-property.patch | 38 +++++ ...ale-sl28-var1-fix-rgmii-clock-and-vo.patch | 46 ++++++ ...ale-sl28-var4-fix-rgmii-clock-and-vo.patch | 50 ++++++ .../arm64-dts-ls1028a-fix-memory-node.patch | 48 ++++++ ...00-main-mark-main-navss-as-dma-coher.patch | 41 +++++ ...4-dts-zii-ultra-fix-12v_main-voltage.patch | 38 +++++ ...tra-remove-second-gen_3v3-regulator-.patch | 82 ++++++++++ .../arm64-meson-select-common_clk.patch | 41 +++++ ...am335x-resume-hang-for-usb-otg-modul.patch | 152 ++++++++++++++++++ ...flakey-idling-of-uarts-and-stop-usin.patch | 58 +++++++ ...-use-export_uuid-to-copy-client-uuid.patch | 86 ++++++++++ queue-5.12/series | 13 ++ 14 files changed, 767 insertions(+) create mode 100644 queue-5.12/arm-dts-imx-emcon-avari-fix-nxp-pca8574-gpio-cells.patch create mode 100644 queue-5.12/arm-dts-imx7d-meerkat96-fix-the-tuning-step-property.patch create mode 100644 queue-5.12/arm-dts-imx7d-pico-fix-the-tuning-step-property.patch create mode 100644 queue-5.12/arm64-dts-freescale-sl28-var1-fix-rgmii-clock-and-vo.patch create mode 100644 queue-5.12/arm64-dts-freescale-sl28-var4-fix-rgmii-clock-and-vo.patch create mode 100644 queue-5.12/arm64-dts-ls1028a-fix-memory-node.patch create mode 100644 queue-5.12/arm64-dts-ti-j7200-main-mark-main-navss-as-dma-coher.patch create mode 100644 queue-5.12/arm64-dts-zii-ultra-fix-12v_main-voltage.patch create mode 100644 queue-5.12/arm64-dts-zii-ultra-remove-second-gen_3v3-regulator-.patch create mode 100644 queue-5.12/arm64-meson-select-common_clk.patch create mode 100644 queue-5.12/bus-ti-sysc-fix-am335x-resume-hang-for-usb-otg-modul.patch create mode 100644 queue-5.12/bus-ti-sysc-fix-flakey-idling-of-uarts-and-stop-usin.patch create mode 100644 queue-5.12/optee-use-export_uuid-to-copy-client-uuid.patch diff --git a/queue-5.12/arm-dts-imx-emcon-avari-fix-nxp-pca8574-gpio-cells.patch b/queue-5.12/arm-dts-imx-emcon-avari-fix-nxp-pca8574-gpio-cells.patch new file mode 100644 index 00000000000..8195faff3f8 --- /dev/null +++ b/queue-5.12/arm-dts-imx-emcon-avari-fix-nxp-pca8574-gpio-cells.patch @@ -0,0 +1,36 @@ +From d6c307730214b5593fe5c42cc286e2640b58bf17 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 21 May 2021 09:54:07 +0200 +Subject: ARM: dts: imx: emcon-avari: Fix nxp,pca8574 #gpio-cells + +From: Geert Uytterhoeven + +[ Upstream commit b73eb6b3b91ff7d76cff5f8c7ab92fe0c51e3829 ] + +According to the DT bindings, #gpio-cells must be two. + +Fixes: 63e71fedc07c4ece ("ARM: dts: Add support for emtrion emCON-MX6 series") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Laurent Pinchart +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi b/arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi +index 828cf3e39784..c4e146f3341b 100644 +--- a/arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi ++++ b/arch/arm/boot/dts/imx6qdl-emcon-avari.dtsi +@@ -126,7 +126,7 @@ + compatible = "nxp,pca8574"; + reg = <0x3a>; + gpio-controller; +- #gpio-cells = <1>; ++ #gpio-cells = <2>; + }; + }; + +-- +2.30.2 + diff --git a/queue-5.12/arm-dts-imx7d-meerkat96-fix-the-tuning-step-property.patch b/queue-5.12/arm-dts-imx7d-meerkat96-fix-the-tuning-step-property.patch new file mode 100644 index 00000000000..83243adc1f5 --- /dev/null +++ b/queue-5.12/arm-dts-imx7d-meerkat96-fix-the-tuning-step-property.patch @@ -0,0 +1,38 @@ +From dffd7f8d99675ca581ad68c154663c170a8f8c3c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 May 2021 18:42:12 -0300 +Subject: ARM: dts: imx7d-meerkat96: Fix the 'tuning-step' property + +From: Fabio Estevam + +[ Upstream commit 7c8f0338cdacc90fdf6468adafa8e27952987f00 ] + +According to Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml, the +correct name of the property is 'fsl,tuning-step'. + +Fix it accordingly. + +Signed-off-by: Fabio Estevam +Fixes: ae7b3384b61b ("ARM: dts: Add support for 96Boards Meerkat96 board") +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx7d-meerkat96.dts | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx7d-meerkat96.dts b/arch/arm/boot/dts/imx7d-meerkat96.dts +index 5339210b63d0..dd8003bd1fc0 100644 +--- a/arch/arm/boot/dts/imx7d-meerkat96.dts ++++ b/arch/arm/boot/dts/imx7d-meerkat96.dts +@@ -193,7 +193,7 @@ + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_usdhc1>; + keep-power-in-suspend; +- tuning-step = <2>; ++ fsl,tuning-step = <2>; + vmmc-supply = <®_3p3v>; + no-1-8-v; + broken-cd; +-- +2.30.2 + diff --git a/queue-5.12/arm-dts-imx7d-pico-fix-the-tuning-step-property.patch b/queue-5.12/arm-dts-imx7d-pico-fix-the-tuning-step-property.patch new file mode 100644 index 00000000000..cd6264f3de7 --- /dev/null +++ b/queue-5.12/arm-dts-imx7d-pico-fix-the-tuning-step-property.patch @@ -0,0 +1,38 @@ +From 7d898751d00abac41c0a30b8b7acab9bd63bd385 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 20 May 2021 18:42:13 -0300 +Subject: ARM: dts: imx7d-pico: Fix the 'tuning-step' property + +From: Fabio Estevam + +[ Upstream commit 0e2fa4959c4f44815ce33e46e4054eeb0f346053 ] + +According to Documentation/devicetree/bindings/mmc/fsl-imx-esdhc.yaml, the +correct name of the property is 'fsl,tuning-step'. + +Fix it accordingly. + +Signed-off-by: Fabio Estevam +Fixes: f13f571ac8a1 ("ARM: dts: imx7d-pico: Extend peripherals support") +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm/boot/dts/imx7d-pico.dtsi | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +diff --git a/arch/arm/boot/dts/imx7d-pico.dtsi b/arch/arm/boot/dts/imx7d-pico.dtsi +index e57da0d32b98..e519897fae08 100644 +--- a/arch/arm/boot/dts/imx7d-pico.dtsi ++++ b/arch/arm/boot/dts/imx7d-pico.dtsi +@@ -351,7 +351,7 @@ + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + cd-gpios = <&gpio5 0 GPIO_ACTIVE_LOW>; + bus-width = <4>; +- tuning-step = <2>; ++ fsl,tuning-step = <2>; + vmmc-supply = <®_3p3v>; + wakeup-source; + no-1-8-v; +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-freescale-sl28-var1-fix-rgmii-clock-and-vo.patch b/queue-5.12/arm64-dts-freescale-sl28-var1-fix-rgmii-clock-and-vo.patch new file mode 100644 index 00000000000..fc09a7a5b99 --- /dev/null +++ b/queue-5.12/arm64-dts-freescale-sl28-var1-fix-rgmii-clock-and-vo.patch @@ -0,0 +1,46 @@ +From 4037350884db23e785ec3b3b7a93d0fd4ebd641b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 May 2021 20:55:53 +0200 +Subject: arm64: dts: freescale: sl28: var1: fix RGMII clock and voltage + +From: Michael Walle + +[ Upstream commit 52387bb9a4a75b88887383cb91d3995ae6f4044a ] + +During hardware validation it was noticed that the clock isn't +continuously enabled when there is no link. This is because the 125MHz +clock is derived from the internal PLL which seems to go into some kind +of power-down mode every once in a while. The LS1028A expects a contiuous +clock. Thus enable the PLL all the time. + +Also, the RGMII pad voltage is wrong, it was configured to 2.5V (that is +the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO +regulator. + +This fix is for the freescale/fsl-ls1028a-kontron-sl28-var1.dts. + +Fixes: 642856097c18 ("arm64: dts: freescale: sl28: add variant 1") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + .../arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts +index 6c309b97587d..e8d31279b7a3 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var1.dts +@@ -46,7 +46,8 @@ + eee-broken-100tx; + qca,clk-out-frequency = <125000000>; + qca,clk-out-strength = ; +- vddio-supply = <&vddh>; ++ qca,keep-pll-enabled; ++ vddio-supply = <&vddio>; + + vddio: vddio-regulator { + regulator-name = "VDDIO"; +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-freescale-sl28-var4-fix-rgmii-clock-and-vo.patch b/queue-5.12/arm64-dts-freescale-sl28-var4-fix-rgmii-clock-and-vo.patch new file mode 100644 index 00000000000..1277e3b6bbc --- /dev/null +++ b/queue-5.12/arm64-dts-freescale-sl28-var4-fix-rgmii-clock-and-vo.patch @@ -0,0 +1,50 @@ +From 315de3b09a8a9b007cd675aed6fb73e83086f52d Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 14 May 2021 20:55:52 +0200 +Subject: arm64: dts: freescale: sl28: var4: fix RGMII clock and voltage + +From: Michael Walle + +[ Upstream commit 25201269c6ec3e9398426962ccdd55428261f7d0 ] + +During hardware validation it was noticed that the clock isn't +continuously enabled when there is no link. This is because the 125MHz +clock is derived from the internal PLL which seems to go into some kind +of power-down mode every once in a while. The LS1028A expects a contiuous +clock. Thus enable the PLL all the time. + +Also, the RGMII pad voltage is wrong. It was configured to 2.5V (that is +the VDDH regulator). The correct voltage is 1.8V, i.e. the VDDIO +regulator. + +This fix is for the freescale/fsl-ls1028a-kontron-sl28-var4.dts. + +Fixes: 815364d0424e ("arm64: dts: freescale: add Kontron sl28 support") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + .../boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts | 5 ++--- + 1 file changed, 2 insertions(+), 3 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts +index df212ed5bb94..e65d1c477e2c 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a-kontron-sl28-var4.dts +@@ -31,11 +31,10 @@ + reg = <0x4>; + eee-broken-1000t; + eee-broken-100tx; +- + qca,clk-out-frequency = <125000000>; + qca,clk-out-strength = ; +- +- vddio-supply = <&vddh>; ++ qca,keep-pll-enabled; ++ vddio-supply = <&vddio>; + + vddio: vddio-regulator { + regulator-name = "VDDIO"; +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-ls1028a-fix-memory-node.patch b/queue-5.12/arm64-dts-ls1028a-fix-memory-node.patch new file mode 100644 index 00000000000..e2f403bf30a --- /dev/null +++ b/queue-5.12/arm64-dts-ls1028a-fix-memory-node.patch @@ -0,0 +1,48 @@ +From 978852c9d257c83f122116d04b1af4140df5fc83 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 8 Apr 2021 13:02:18 +0200 +Subject: arm64: dts: ls1028a: fix memory node + +From: Michael Walle + +[ Upstream commit dabea675faf16e8682aa478ff3ce65dd775620bc ] + +While enabling EDAC support for the LS1028A it was discovered that the +memory node has a wrong endianness setting as well as a wrong interrupt +assignment. Fix both. + +This was tested on a sl28 board. To force ECC errors, you can use the +error injection supported by the controller in hardware (with +CONFIG_EDAC_DEBUG enabled): + + # enable error injection + $ echo 0x100 > /sys/devices/system/edac/mc/mc0/inject_ctrl + # flip lowest bit of the data + $ echo 0x1 > /sys/devices/system/edac/mc/mc0/inject_data_lo + +Fixes: 8897f3255c9c ("arm64: dts: Add support for NXP LS1028A SoC") +Signed-off-by: Michael Walle +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +index 262fbad8f0ec..1b264e5e947a 100644 +--- a/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi ++++ b/arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi +@@ -201,8 +201,8 @@ + ddr: memory-controller@1080000 { + compatible = "fsl,qoriq-memory-controller"; + reg = <0x0 0x1080000 0x0 0x1000>; +- interrupts = ; +- big-endian; ++ interrupts = ; ++ little-endian; + }; + + dcfg: syscon@1e00000 { +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-ti-j7200-main-mark-main-navss-as-dma-coher.patch b/queue-5.12/arm64-dts-ti-j7200-main-mark-main-navss-as-dma-coher.patch new file mode 100644 index 00000000000..0c07318ca91 --- /dev/null +++ b/queue-5.12/arm64-dts-ti-j7200-main-mark-main-navss-as-dma-coher.patch @@ -0,0 +1,41 @@ +From 0bbc5af0fd71046a5dc963807d226beb2350408e Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 10 May 2021 23:36:01 +0530 +Subject: arm64: dts: ti: j7200-main: Mark Main NAVSS as dma-coherent + +From: Vignesh Raghavendra + +[ Upstream commit 52ae30f55a2a40cff549fac95de82f25403bd387 ] + +Traffic through main NAVSS interconnect is coherent wrt ARM caches on +J7200 SoC. Add missing dma-coherent property to main_navss node. + +Also add dma-ranges to be consistent with mcu_navss node +and with AM65/J721e main_navss and mcu_navss nodes. + +Fixes: d361ed88455fe ("arm64: dts: ti: Add support for J7200 SoC") +Signed-off-by: Vignesh Raghavendra +Reviewed-by: Peter Ujfalusi +Signed-off-by: Nishanth Menon +Link: https://lore.kernel.org/r/20210510180601.19458-1-vigneshr@ti.com +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/ti/k3-j7200-main.dtsi | 2 ++ + 1 file changed, 2 insertions(+) + +diff --git a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +index 17477ab0fd8e..3398f174f09b 100644 +--- a/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi ++++ b/arch/arm64/boot/dts/ti/k3-j7200-main.dtsi +@@ -85,6 +85,8 @@ + #size-cells = <2>; + ranges = <0x00 0x30000000 0x00 0x30000000 0x00 0x0c400000>; + ti,sci-dev-id = <199>; ++ dma-coherent; ++ dma-ranges; + + main_navss_intr: interrupt-controller1 { + compatible = "ti,sci-intr"; +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-zii-ultra-fix-12v_main-voltage.patch b/queue-5.12/arm64-dts-zii-ultra-fix-12v_main-voltage.patch new file mode 100644 index 00000000000..e11747009ab --- /dev/null +++ b/queue-5.12/arm64-dts-zii-ultra-fix-12v_main-voltage.patch @@ -0,0 +1,38 @@ +From 0199b22131a6594f1cf0c83c798f2b071715e9ca Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 May 2021 21:44:40 +0200 +Subject: arm64: dts: zii-ultra: fix 12V_MAIN voltage + +From: Lucas Stach + +[ Upstream commit ac0cbf9d13dccfd09bebc2f8f5697b6d3ffe27c4 ] + +As this is a fixed regulator on the board there was no harm in the wrong +voltage being specified, apart from a confusing reporting to userspace. + +Fixes: 4a13b3bec3b4 ("arm64: dts: imx: add Zii Ultra board support") +Signed-off-by: Lucas Stach +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +index 1e5d34e81ab7..a08a568c31d9 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +@@ -45,8 +45,8 @@ + reg_12p0_main: regulator-12p0-main { + compatible = "regulator-fixed"; + regulator-name = "12V_MAIN"; +- regulator-min-microvolt = <5000000>; +- regulator-max-microvolt = <5000000>; ++ regulator-min-microvolt = <12000000>; ++ regulator-max-microvolt = <12000000>; + regulator-always-on; + }; + +-- +2.30.2 + diff --git a/queue-5.12/arm64-dts-zii-ultra-remove-second-gen_3v3-regulator-.patch b/queue-5.12/arm64-dts-zii-ultra-remove-second-gen_3v3-regulator-.patch new file mode 100644 index 00000000000..32915c9d985 --- /dev/null +++ b/queue-5.12/arm64-dts-zii-ultra-remove-second-gen_3v3-regulator-.patch @@ -0,0 +1,82 @@ +From 916c79bacbb5f374c2953b384d442f52edeb326c Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Fri, 7 May 2021 21:44:39 +0200 +Subject: arm64: dts: zii-ultra: remove second GEN_3V3 regulator instance + +From: Lucas Stach + +[ Upstream commit e98d98028989e023e0cbff539dc616c4e5036839 ] + +When adding the sound support a second instance of the GEN_3V3 regulator was +added by accident. Remove it and point the consumers to the first instance. + +Fixes: 663a5b5efa51 ("arm64: dts: zii-ultra: add sound support") +Signed-off-by: Lucas Stach +Signed-off-by: Shawn Guo +Signed-off-by: Sasha Levin +--- + .../dts/freescale/imx8mq-zii-ultra-rmb3.dts | 10 +++++----- + .../boot/dts/freescale/imx8mq-zii-ultra.dtsi | 19 +++++-------------- + 2 files changed, 10 insertions(+), 19 deletions(-) + +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts +index 631e01c1b9fd..be1e7d6f0ecb 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts ++++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra-rmb3.dts +@@ -88,11 +88,11 @@ + pinctrl-0 = <&pinctrl_codec2>; + reg = <0x18>; + #sound-dai-cells = <0>; +- HPVDD-supply = <®_3p3v>; +- SPRVDD-supply = <®_3p3v>; +- SPLVDD-supply = <®_3p3v>; +- AVDD-supply = <®_3p3v>; +- IOVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_gen_3p3>; ++ SPRVDD-supply = <®_gen_3p3>; ++ SPLVDD-supply = <®_gen_3p3>; ++ AVDD-supply = <®_gen_3p3>; ++ IOVDD-supply = <®_gen_3p3>; + DVDD-supply = <&vgen4_reg>; + reset-gpios = <&gpio3 4 GPIO_ACTIVE_HIGH>; + }; +diff --git a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +index 4dc8383478ee..1e5d34e81ab7 100644 +--- a/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi ++++ b/arch/arm64/boot/dts/freescale/imx8mq-zii-ultra.dtsi +@@ -77,15 +77,6 @@ + regulator-always-on; + }; + +- reg_3p3v: regulator-3p3v { +- compatible = "regulator-fixed"; +- vin-supply = <®_3p3_main>; +- regulator-name = "GEN_3V3"; +- regulator-min-microvolt = <3300000>; +- regulator-max-microvolt = <3300000>; +- regulator-always-on; +- }; +- + reg_usdhc2_vmmc: regulator-vsd-3v3 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_reg_usdhc2>; +@@ -415,11 +406,11 @@ + pinctrl-0 = <&pinctrl_codec1>; + reg = <0x18>; + #sound-dai-cells = <0>; +- HPVDD-supply = <®_3p3v>; +- SPRVDD-supply = <®_3p3v>; +- SPLVDD-supply = <®_3p3v>; +- AVDD-supply = <®_3p3v>; +- IOVDD-supply = <®_3p3v>; ++ HPVDD-supply = <®_gen_3p3>; ++ SPRVDD-supply = <®_gen_3p3>; ++ SPLVDD-supply = <®_gen_3p3>; ++ AVDD-supply = <®_gen_3p3>; ++ IOVDD-supply = <®_gen_3p3>; + DVDD-supply = <&vgen4_reg>; + reset-gpios = <&gpio3 3 GPIO_ACTIVE_LOW>; + }; +-- +2.30.2 + diff --git a/queue-5.12/arm64-meson-select-common_clk.patch b/queue-5.12/arm64-meson-select-common_clk.patch new file mode 100644 index 00000000000..065458a9374 --- /dev/null +++ b/queue-5.12/arm64-meson-select-common_clk.patch @@ -0,0 +1,41 @@ +From a0cc81a1f18a7f7a902df47ee515228f68ae54f0 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Thu, 29 Apr 2021 10:38:23 +0200 +Subject: arm64: meson: select COMMON_CLK + +From: Jerome Brunet + +[ Upstream commit 4cce442ffe5448ef572adc8b3abe7001b398e709 ] + +This fix the recent removal of clock drivers selection. +While it is not necessary to select the clock drivers themselves, we need +to select a proper implementation of the clock API, which for the meson, is +CCF + +Fixes: ba66a25536dd ("arm64: meson: ship only the necessary clock controllers") +Reviewed-by: Neil Armstrong +Signed-off-by: Jerome Brunet +Reviewed-by: Martin Blumenstingl +Signed-off-by: Kevin Hilman +Signed-off-by: Neil Armstrong +Link: https://lore.kernel.org/r/20210429083823.59546-1-jbrunet@baylibre.com +Signed-off-by: Sasha Levin +--- + arch/arm64/Kconfig.platforms | 1 + + 1 file changed, 1 insertion(+) + +diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms +index cdfd5fed457f..a3fdffcd1ce8 100644 +--- a/arch/arm64/Kconfig.platforms ++++ b/arch/arm64/Kconfig.platforms +@@ -168,6 +168,7 @@ config ARCH_MEDIATEK + + config ARCH_MESON + bool "Amlogic Platforms" ++ select COMMON_CLK + select MESON_IRQ_GPIO + help + This enables support for the arm64 based Amlogic SoCs +-- +2.30.2 + diff --git a/queue-5.12/bus-ti-sysc-fix-am335x-resume-hang-for-usb-otg-modul.patch b/queue-5.12/bus-ti-sysc-fix-am335x-resume-hang-for-usb-otg-modul.patch new file mode 100644 index 00000000000..97c63414bf0 --- /dev/null +++ b/queue-5.12/bus-ti-sysc-fix-am335x-resume-hang-for-usb-otg-modul.patch @@ -0,0 +1,152 @@ +From c92e1748bd8ee41ce926f41098d77b810e2c2cb2 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 18 May 2021 09:47:23 +0300 +Subject: bus: ti-sysc: Fix am335x resume hang for usb otg module + +From: Tony Lindgren + +[ Upstream commit 4d7b324e231366ea772ab10df46be31273ca39af ] + +On am335x, suspend and resume only works once, and the system hangs if +suspend is attempted again. However, turns out suspend and resume works +fine multiple times if the USB OTG driver for musb controller is loaded. + +The issue is caused my the interconnect target module losing context +during suspend, and it needs a restore on resume to be reconfigure again +as debugged earlier by Dave Gerlach . + +There are also other modules that need a restore on resume, like gpmc as +noted by Dave. So let's add a common way to restore an interconnect +target module based on a quirk flag. For now, let's enable the quirk for +am335x otg only to fix the suspend and resume issue. + +As gpmc is not causing hangs based on tests with BeagleBone, let's patch +gpmc separately. For gpmc, we also need a hardware reset done before +restore according to Dave. + +To reinit the modules, we decouple system suspend from PM runtime. We +replace calls to pm_runtime_force_suspend() and pm_runtime_force_resume() +with direct calls to internal functions and rely on the driver internal +state. There no point trying to handle complex system suspend and resume +quirks via PM runtime. + +This is issue should have already been noticed with commit 1819ef2e2d12 +("bus: ti-sysc: Use swsup quirks also for am335x musb") when quirk +handling was added for am335x otg for swsup. But the issue went unnoticed +as having musb driver loaded hides the issue, and suspend and resume works +once without the driver loaded. + +Fixes: 1819ef2e2d12 ("bus: ti-sysc: Use swsup quirks also for am335x musb") +Suggested-by: Dave Gerlach +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + drivers/bus/ti-sysc.c | 53 +++++++++++++++++++++++++-- + include/linux/platform_data/ti-sysc.h | 1 + + 2 files changed, 51 insertions(+), 3 deletions(-) + +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 68145e326eb9..49c47b939f21 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -1334,6 +1334,34 @@ static int __maybe_unused sysc_runtime_resume(struct device *dev) + return error; + } + ++static int sysc_reinit_module(struct sysc *ddata, bool leave_enabled) ++{ ++ struct device *dev = ddata->dev; ++ int error; ++ ++ /* Disable target module if it is enabled */ ++ if (ddata->enabled) { ++ error = sysc_runtime_suspend(dev); ++ if (error) ++ dev_warn(dev, "reinit suspend failed: %i\n", error); ++ } ++ ++ /* Enable target module */ ++ error = sysc_runtime_resume(dev); ++ if (error) ++ dev_warn(dev, "reinit resume failed: %i\n", error); ++ ++ if (leave_enabled) ++ return error; ++ ++ /* Disable target module if no leave_enabled was set */ ++ error = sysc_runtime_suspend(dev); ++ if (error) ++ dev_warn(dev, "reinit suspend failed: %i\n", error); ++ ++ return error; ++} ++ + static int __maybe_unused sysc_noirq_suspend(struct device *dev) + { + struct sysc *ddata; +@@ -1344,12 +1372,18 @@ static int __maybe_unused sysc_noirq_suspend(struct device *dev) + (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE)) + return 0; + +- return pm_runtime_force_suspend(dev); ++ if (!ddata->enabled) ++ return 0; ++ ++ ddata->needs_resume = 1; ++ ++ return sysc_runtime_suspend(dev); + } + + static int __maybe_unused sysc_noirq_resume(struct device *dev) + { + struct sysc *ddata; ++ int error = 0; + + ddata = dev_get_drvdata(dev); + +@@ -1357,7 +1391,19 @@ static int __maybe_unused sysc_noirq_resume(struct device *dev) + (SYSC_QUIRK_LEGACY_IDLE | SYSC_QUIRK_NO_IDLE)) + return 0; + +- return pm_runtime_force_resume(dev); ++ if (ddata->cfg.quirks & SYSC_QUIRK_REINIT_ON_RESUME) { ++ error = sysc_reinit_module(ddata, ddata->needs_resume); ++ if (error) ++ dev_warn(dev, "noirq_resume failed: %i\n", error); ++ } else if (ddata->needs_resume) { ++ error = sysc_runtime_resume(dev); ++ if (error) ++ dev_warn(dev, "noirq_resume failed: %i\n", error); ++ } ++ ++ ddata->needs_resume = 0; ++ ++ return error; + } + + static const struct dev_pm_ops sysc_pm_ops = { +@@ -1466,7 +1512,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { + SYSC_QUIRK("usb_otg_hs", 0, 0x400, 0x404, 0x408, 0x00000050, + 0xffffffff, SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), + SYSC_QUIRK("usb_otg_hs", 0, 0, 0x10, -ENODEV, 0x4ea2080d, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY), ++ SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY | ++ SYSC_QUIRK_REINIT_ON_RESUME), + SYSC_QUIRK("wdt", 0, 0, 0x10, 0x14, 0x502a0500, 0xfffff0f0, + SYSC_MODULE_QUIRK_WDT), + /* PRUSS on am3, am4 and am5 */ +diff --git a/include/linux/platform_data/ti-sysc.h b/include/linux/platform_data/ti-sysc.h +index fafc1beea504..9837fb011f2f 100644 +--- a/include/linux/platform_data/ti-sysc.h ++++ b/include/linux/platform_data/ti-sysc.h +@@ -50,6 +50,7 @@ struct sysc_regbits { + s8 emufree_shift; + }; + ++#define SYSC_QUIRK_REINIT_ON_RESUME BIT(27) + #define SYSC_QUIRK_GPMC_DEBUG BIT(26) + #define SYSC_MODULE_QUIRK_ENA_RESETDONE BIT(25) + #define SYSC_MODULE_QUIRK_PRUSS BIT(24) +-- +2.30.2 + diff --git a/queue-5.12/bus-ti-sysc-fix-flakey-idling-of-uarts-and-stop-usin.patch b/queue-5.12/bus-ti-sysc-fix-flakey-idling-of-uarts-and-stop-usin.patch new file mode 100644 index 00000000000..2d637fe9429 --- /dev/null +++ b/queue-5.12/bus-ti-sysc-fix-flakey-idling-of-uarts-and-stop-usin.patch @@ -0,0 +1,58 @@ +From 1bdf8227df87204d71f9391d246f18662942342b Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Tue, 25 May 2021 09:08:23 +0300 +Subject: bus: ti-sysc: Fix flakey idling of uarts and stop using + swsup_sidle_act + +From: Tony Lindgren + +[ Upstream commit c8692ad416dcc420ce1b403596a425c8f4c2720b ] + +Looks like the swsup_sidle_act quirk handling is unreliable for serial +ports. The serial ports just eventually stop idling until woken up and +re-idled again. As the serial port not idling blocks any deeper SoC idle +states, it's adds an annoying random flakeyness for power management. + +Let's just switch to swsup_sidle quirk instead like we already do for +omap3 uarts. This means we manually idle the port instead of trying to +use the hardware autoidle features when not in use. + +For more details on why the serial ports have been using swsup_idle_act, +see commit 66dde54e978a ("ARM: OMAP2+: hwmod-data: UART IP needs software +control to manage sidle modes"). It seems that the swsup_idle_act quirk +handling is not enough though, and for example the TI Android kernel +changed to using swsup_sidle with commit 77c34c84e1e0 ("OMAP4: HWMOD: +UART1: disable smart-idle."). + +Fixes: b4a9a7a38917 ("bus: ti-sysc: Handle swsup idle mode quirks") +Cc: Carl Philipp Klemm +Cc: Ivan Jelincic +Cc: Merlijn Wajer +Cc: Pavel Machek +Cc: Sebastian Reichel +Cc: Sicelo A. Mhlongo +Signed-off-by: Tony Lindgren +Signed-off-by: Sasha Levin +--- + drivers/bus/ti-sysc.c | 4 ++-- + 1 file changed, 2 insertions(+), 2 deletions(-) + +diff --git a/drivers/bus/ti-sysc.c b/drivers/bus/ti-sysc.c +index 49c47b939f21..30e9b700273e 100644 +--- a/drivers/bus/ti-sysc.c ++++ b/drivers/bus/ti-sysc.c +@@ -1454,9 +1454,9 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = { + SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), + /* Uarts on omap4 and later */ + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x50411e03, 0xffff00ff, +- SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), + SYSC_QUIRK("uart", 0, 0x50, 0x54, 0x58, 0x47422e03, 0xffffffff, +- SYSC_QUIRK_SWSUP_SIDLE_ACT | SYSC_QUIRK_LEGACY_IDLE), ++ SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_LEGACY_IDLE), + + /* Quirks that need to be set based on the module address */ + SYSC_QUIRK("mcpdm", 0x40132000, 0, 0x10, -ENODEV, 0x50000800, 0xffffffff, +-- +2.30.2 + diff --git a/queue-5.12/optee-use-export_uuid-to-copy-client-uuid.patch b/queue-5.12/optee-use-export_uuid-to-copy-client-uuid.patch new file mode 100644 index 00000000000..173fd16bc50 --- /dev/null +++ b/queue-5.12/optee-use-export_uuid-to-copy-client-uuid.patch @@ -0,0 +1,86 @@ +From 0afb49b656fdb5576d647c4c8ffb6a6e02179414 Mon Sep 17 00:00:00 2001 +From: Sasha Levin +Date: Mon, 19 Apr 2021 18:46:30 +0200 +Subject: optee: use export_uuid() to copy client UUID + +From: Jens Wiklander + +[ Upstream commit 673c7aa2436bfc857b92417f3e590a297c586dde ] + +Prior to this patch optee_open_session() was making assumptions about +the internal format of uuid_t by casting a memory location in a +parameter struct to uuid_t *. Fix this using export_uuid() to get a well +defined binary representation and also add an octets field in struct +optee_msg_param in order to avoid casting. + +Fixes: c5b4312bea5d ("tee: optee: Add support for session login client UUID generation") +Suggested-by: Andy Shevchenko +Signed-off-by: Jens Wiklander +Signed-off-by: Sasha Levin +--- + drivers/tee/optee/call.c | 6 ++++-- + drivers/tee/optee/optee_msg.h | 6 ++++-- + 2 files changed, 8 insertions(+), 4 deletions(-) + +diff --git a/drivers/tee/optee/call.c b/drivers/tee/optee/call.c +index 7a77e375b503..6b52f0c526ba 100644 +--- a/drivers/tee/optee/call.c ++++ b/drivers/tee/optee/call.c +@@ -216,6 +216,7 @@ int optee_open_session(struct tee_context *ctx, + struct optee_msg_arg *msg_arg; + phys_addr_t msg_parg; + struct optee_session *sess = NULL; ++ uuid_t client_uuid; + + /* +2 for the meta parameters added below */ + shm = get_msg_arg(ctx, arg->num_params + 2, &msg_arg, &msg_parg); +@@ -236,10 +237,11 @@ int optee_open_session(struct tee_context *ctx, + memcpy(&msg_arg->params[0].u.value, arg->uuid, sizeof(arg->uuid)); + msg_arg->params[1].u.value.c = arg->clnt_login; + +- rc = tee_session_calc_client_uuid((uuid_t *)&msg_arg->params[1].u.value, +- arg->clnt_login, arg->clnt_uuid); ++ rc = tee_session_calc_client_uuid(&client_uuid, arg->clnt_login, ++ arg->clnt_uuid); + if (rc) + goto out; ++ export_uuid(msg_arg->params[1].u.octets, &client_uuid); + + rc = optee_to_msg_param(msg_arg->params + 2, arg->num_params, param); + if (rc) +diff --git a/drivers/tee/optee/optee_msg.h b/drivers/tee/optee/optee_msg.h +index 81ff593ac4ec..e3d72d09c484 100644 +--- a/drivers/tee/optee/optee_msg.h ++++ b/drivers/tee/optee/optee_msg.h +@@ -9,7 +9,7 @@ + #include + + /* +- * This file defines the OP-TEE message protocol used to communicate ++ * This file defines the OP-TEE message protocol (ABI) used to communicate + * with an instance of OP-TEE running in secure world. + * + * This file is divided into two sections. +@@ -144,9 +144,10 @@ struct optee_msg_param_value { + * @tmem: parameter by temporary memory reference + * @rmem: parameter by registered memory reference + * @value: parameter by opaque value ++ * @octets: parameter by octet string + * + * @attr & OPTEE_MSG_ATTR_TYPE_MASK indicates if tmem, rmem or value is used in +- * the union. OPTEE_MSG_ATTR_TYPE_VALUE_* indicates value, ++ * the union. OPTEE_MSG_ATTR_TYPE_VALUE_* indicates value or octets, + * OPTEE_MSG_ATTR_TYPE_TMEM_* indicates @tmem and + * OPTEE_MSG_ATTR_TYPE_RMEM_* indicates @rmem, + * OPTEE_MSG_ATTR_TYPE_NONE indicates that none of the members are used. +@@ -157,6 +158,7 @@ struct optee_msg_param { + struct optee_msg_param_tmem tmem; + struct optee_msg_param_rmem rmem; + struct optee_msg_param_value value; ++ u8 octets[24]; + } u; + }; + +-- +2.30.2 + diff --git a/queue-5.12/series b/queue-5.12/series index 3963813402b..8c10deaa620 100644 --- a/queue-5.12/series +++ b/queue-5.12/series @@ -63,3 +63,16 @@ ice-optimize-for-xdp_redirect-in-xsk-path.patch ice-add-correct-exception-tracing-for-xdp.patch ixgbe-optimize-for-xdp_redirect-in-xsk-path.patch ixgbe-add-correct-exception-tracing-for-xdp.patch +arm64-dts-ti-j7200-main-mark-main-navss-as-dma-coher.patch +optee-use-export_uuid-to-copy-client-uuid.patch +bus-ti-sysc-fix-am335x-resume-hang-for-usb-otg-modul.patch +arm64-dts-ls1028a-fix-memory-node.patch +arm64-dts-zii-ultra-remove-second-gen_3v3-regulator-.patch +arm64-dts-zii-ultra-fix-12v_main-voltage.patch +arm64-dts-freescale-sl28-var4-fix-rgmii-clock-and-vo.patch +arm64-dts-freescale-sl28-var1-fix-rgmii-clock-and-vo.patch +arm-dts-imx7d-meerkat96-fix-the-tuning-step-property.patch +arm-dts-imx7d-pico-fix-the-tuning-step-property.patch +arm-dts-imx-emcon-avari-fix-nxp-pca8574-gpio-cells.patch +bus-ti-sysc-fix-flakey-idling-of-uarts-and-stop-usin.patch +arm64-meson-select-common_clk.patch -- 2.47.3