From 0db6090c142fc6ad73ceb8f1faaa8859faa4b49d Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Fri, 18 May 2012 13:03:03 -0700 Subject: [PATCH] 3.3-stable patches added patches: dl2k-clean-up-rio_ioctl.patch i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch --- queue-3.3/dl2k-clean-up-rio_ioctl.patch | 119 +++++++++++ ...nge-timeout-value-50msec-to-1000msec.patch | 34 ++++ ...-dss2-venc-sysfs-debug-attr-on-omap4.patch | 38 ++++ queue-3.3/series | 7 + ...rocessing-in-case-wait-event-timeout.patch | 40 ++++ ...x-issue-for-transmitting-over-4kbyte.patch | 184 ++++++++++++++++++ ...r-dynamically-to-get-dma-device-info.patch | 29 +++ ...up-and-bit-order-setup-by-io-control.patch | 31 +++ 8 files changed, 482 insertions(+) create mode 100644 queue-3.3/dl2k-clean-up-rio_ioctl.patch create mode 100644 queue-3.3/i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch create mode 100644 queue-3.3/omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch create mode 100644 queue-3.3/spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch create mode 100644 queue-3.3/spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch create mode 100644 queue-3.3/spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch create mode 100644 queue-3.3/spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch diff --git a/queue-3.3/dl2k-clean-up-rio_ioctl.patch b/queue-3.3/dl2k-clean-up-rio_ioctl.patch new file mode 100644 index 00000000000..bae3b76d9b3 --- /dev/null +++ b/queue-3.3/dl2k-clean-up-rio_ioctl.patch @@ -0,0 +1,119 @@ +From 1bb57e940e1958e40d51f2078f50c3a96a9b2d75 Mon Sep 17 00:00:00 2001 +From: Jeff Mahoney +Date: Wed, 25 Apr 2012 14:32:09 +0000 +Subject: dl2k: Clean up rio_ioctl + +From: Jeff Mahoney + +commit 1bb57e940e1958e40d51f2078f50c3a96a9b2d75 upstream. + +The dl2k driver's rio_ioctl call has a few issues: +- No permissions checking +- Implements SIOCGMIIREG and SIOCGMIIREG using the SIOCDEVPRIVATE numbers +- Has a few ioctls that may have been used for debugging at one point + but have no place in the kernel proper. + +This patch removes all but the MII ioctls, renumbers them to use the +standard ones, and adds the proper permission check for SIOCSMIIREG. + +We can also get rid of the dl2k-specific struct mii_data in favor of +the generic struct mii_ioctl_data. + +Since we have the phyid on hand, we can add the SIOCGMIIPHY ioctl too. + +Most of the MII code for the driver could probably be converted to use +the generic MII library but I don't have a device to test the results. + +Reported-by: Stephan Mueller +Signed-off-by: Jeff Mahoney +Signed-off-by: David S. Miller +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/net/ethernet/dlink/dl2k.c | 52 ++++++-------------------------------- + drivers/net/ethernet/dlink/dl2k.h | 7 ----- + 2 files changed, 9 insertions(+), 50 deletions(-) + +--- a/drivers/net/ethernet/dlink/dl2k.c ++++ b/drivers/net/ethernet/dlink/dl2k.c +@@ -1259,55 +1259,21 @@ rio_ioctl (struct net_device *dev, struc + { + int phy_addr; + struct netdev_private *np = netdev_priv(dev); +- struct mii_data *miidata = (struct mii_data *) &rq->ifr_ifru; +- +- struct netdev_desc *desc; +- int i; ++ struct mii_ioctl_data *miidata = if_mii(rq); + + phy_addr = np->phy_addr; + switch (cmd) { +- case SIOCDEVPRIVATE: +- break; +- +- case SIOCDEVPRIVATE + 1: +- miidata->out_value = mii_read (dev, phy_addr, miidata->reg_num); +- break; +- case SIOCDEVPRIVATE + 2: +- mii_write (dev, phy_addr, miidata->reg_num, miidata->in_value); +- break; +- case SIOCDEVPRIVATE + 3: ++ case SIOCGMIIPHY: ++ miidata->phy_id = phy_addr; + break; +- case SIOCDEVPRIVATE + 4: ++ case SIOCGMIIREG: ++ miidata->val_out = mii_read (dev, phy_addr, miidata->reg_num); + break; +- case SIOCDEVPRIVATE + 5: +- netif_stop_queue (dev); ++ case SIOCSMIIREG: ++ if (!capable(CAP_NET_ADMIN)) ++ return -EPERM; ++ mii_write (dev, phy_addr, miidata->reg_num, miidata->val_in); + break; +- case SIOCDEVPRIVATE + 6: +- netif_wake_queue (dev); +- break; +- case SIOCDEVPRIVATE + 7: +- printk +- ("tx_full=%x cur_tx=%lx old_tx=%lx cur_rx=%lx old_rx=%lx\n", +- netif_queue_stopped(dev), np->cur_tx, np->old_tx, np->cur_rx, +- np->old_rx); +- break; +- case SIOCDEVPRIVATE + 8: +- printk("TX ring:\n"); +- for (i = 0; i < TX_RING_SIZE; i++) { +- desc = &np->tx_ring[i]; +- printk +- ("%02x:cur:%08x next:%08x status:%08x frag1:%08x frag0:%08x", +- i, +- (u32) (np->tx_ring_dma + i * sizeof (*desc)), +- (u32)le64_to_cpu(desc->next_desc), +- (u32)le64_to_cpu(desc->status), +- (u32)(le64_to_cpu(desc->fraginfo) >> 32), +- (u32)le64_to_cpu(desc->fraginfo)); +- printk ("\n"); +- } +- printk ("\n"); +- break; +- + default: + return -EOPNOTSUPP; + } +--- a/drivers/net/ethernet/dlink/dl2k.h ++++ b/drivers/net/ethernet/dlink/dl2k.h +@@ -365,13 +365,6 @@ struct ioctl_data { + char *data; + }; + +-struct mii_data { +- __u16 reserved; +- __u16 reg_num; +- __u16 in_value; +- __u16 out_value; +-}; +- + /* The Rx and Tx buffer descriptors. */ + struct netdev_desc { + __le64 next_desc; diff --git a/queue-3.3/i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch b/queue-3.3/i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch new file mode 100644 index 00000000000..2f1eaa9c9d8 --- /dev/null +++ b/queue-3.3/i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch @@ -0,0 +1,34 @@ +From 8a52f9f347da721b199b7f9dcc0168bbe7d0baae Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Mon, 26 Mar 2012 14:55:25 +0900 +Subject: i2c-eg20t: change timeout value 50msec to 1000msec + +From: Tomoya MORINAGA + +commit 8a52f9f347da721b199b7f9dcc0168bbe7d0baae upstream. + +Currently, during i2c works alone, wait-event timeout is not occurred. +However, as CPU load increases, timeout occurs frequently. +So, I modified like this patch. +Modifying like this patch, I've never seen the timeout event with high +load test. + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Wolfram Sang +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/i2c/busses/i2c-eg20t.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/i2c/busses/i2c-eg20t.c ++++ b/drivers/i2c/busses/i2c-eg20t.c +@@ -318,7 +318,7 @@ static s32 pch_i2c_wait_for_xfer_complet + { + long ret; + ret = wait_event_timeout(pch_event, +- (adap->pch_event_flag != 0), msecs_to_jiffies(50)); ++ (adap->pch_event_flag != 0), msecs_to_jiffies(1000)); + + if (ret == 0) { + pch_err(adap, "timeout: %x\n", adap->pch_event_flag); diff --git a/queue-3.3/omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch b/queue-3.3/omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch new file mode 100644 index 00000000000..9cc35f8deb3 --- /dev/null +++ b/queue-3.3/omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch @@ -0,0 +1,38 @@ +From cc1d3e032df53d83d0ca4d537d8eb67eb5b3e808 Mon Sep 17 00:00:00 2001 +From: Danny Kukawka +Date: Tue, 24 Jan 2012 16:44:42 +0100 +Subject: OMAPDSS: VENC: fix NULL pointer dereference in DSS2 VENC sysfs debug attr on OMAP4 + +From: Danny Kukawka + +commit cc1d3e032df53d83d0ca4d537d8eb67eb5b3e808 upstream. + +Commit ba02fa37de80bea10d706f39f076dd848348320a disabled the +venc driver registration on OMAP4. Since the driver never gets +probed/initialised your get a dereferenceed NULL pointer if you +try to get info from /sys/kernel/debug/omapdss/venc + +Return info message about disabled venc if venc_dump_regs() gets called. + +Signed-off-by: Danny Kukawka +Signed-off-by: Tomi Valkeinen +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/video/omap2/dss/venc.c | 5 +++++ + 1 file changed, 5 insertions(+) + +--- a/drivers/video/omap2/dss/venc.c ++++ b/drivers/video/omap2/dss/venc.c +@@ -699,6 +699,11 @@ void venc_dump_regs(struct seq_file *s) + { + #define DUMPREG(r) seq_printf(s, "%-35s %08x\n", #r, venc_read_reg(r)) + ++ if (cpu_is_omap44xx()) { ++ seq_printf(s, "VENC currently disabled on OMAP44xx\n"); ++ return; ++ } ++ + if (venc_runtime_get()) + return; + diff --git a/queue-3.3/series b/queue-3.3/series index 800dcd6f8f1..061b6a281dd 100644 --- a/queue-3.3/series +++ b/queue-3.3/series @@ -36,3 +36,10 @@ ext4-avoid-deadlock-on-sync-mounted-fs-w-o-journal.patch memcg-free-spare-array-to-avoid-memory-leak.patch cifs-fix-revalidation-test-in-cifs_llseek.patch compat-fix-rt-signal-mask-corruption-via-sigprocmask.patch +dl2k-clean-up-rio_ioctl.patch +omapdss-venc-fix-null-pointer-dereference-in-dss2-venc-sysfs-debug-attr-on-omap4.patch +i2c-eg20t-change-timeout-value-50msec-to-1000msec.patch +spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch +spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch +spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch +spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch diff --git a/queue-3.3/spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch b/queue-3.3/spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch new file mode 100644 index 00000000000..eea8c7b0d67 --- /dev/null +++ b/queue-3.3/spi-topcliff-pch-add-recovery-processing-in-case-wait-event-timeout.patch @@ -0,0 +1,40 @@ +From 0f57e168aa109775430c76cc663fb64909813d84 Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 9 Dec 2011 13:13:29 +0900 +Subject: spi-topcliff-pch: add recovery processing in case wait-event timeout + +From: Tomoya MORINAGA + +commit 0f57e168aa109775430c76cc663fb64909813d84 upstream. + +Currently, pch_spi_start_transfer failure is not anticipated. +This patch adds the processing. + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Grant Likely +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-topcliff-pch.c | 10 +++++++++- + 1 file changed, 9 insertions(+), 1 deletion(-) + +--- a/drivers/spi/spi-topcliff-pch.c ++++ b/drivers/spi/spi-topcliff-pch.c +@@ -1266,8 +1266,16 @@ static void pch_spi_process_messages(str + char *save_rx_buf = data->cur_trans->rx_buf; + for (i = 0; i < cnt; i ++) { + pch_spi_handle_dma(data, &bpw); +- if (!pch_spi_start_transfer(data)) ++ if (!pch_spi_start_transfer(data)) { ++ data->transfer_complete = true; ++ data->current_msg->status = -EIO; ++ data->current_msg->complete ++ (data->current_msg->context); ++ data->bcurrent_msg_processing = false; ++ data->current_msg = NULL; ++ data->cur_trans = NULL; + goto out; ++ } + pch_spi_copy_rx_data_for_dma(data, bpw); + } + data->cur_trans->rx_buf = save_rx_buf; diff --git a/queue-3.3/spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch b/queue-3.3/spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch new file mode 100644 index 00000000000..087c5137f7c --- /dev/null +++ b/queue-3.3/spi-topcliff-pch-fix-issue-for-transmitting-over-4kbyte.patch @@ -0,0 +1,184 @@ +From 7d05b3e868ee0f9231baf40cb77be3df5dd1f18c Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 9 Dec 2011 13:13:27 +0900 +Subject: spi-topcliff-pch: Fix issue for transmitting over 4KByte + +From: Tomoya MORINAGA + +commit 7d05b3e868ee0f9231baf40cb77be3df5dd1f18c upstream. + +Currently, when spi-topcliff-pch receives transmit request over 4KByte, +this driver can't process correctly. This driver needs to divide the data +into 4Kbyte unit. +This patch fixes the issue. + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Grant Likely +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-topcliff-pch.c | 66 ++++++++++++++++++++++++++++++++++------- + 1 file changed, 55 insertions(+), 11 deletions(-) + +--- a/drivers/spi/spi-topcliff-pch.c ++++ b/drivers/spi/spi-topcliff-pch.c +@@ -196,6 +196,7 @@ struct pch_spi_data { + struct pch_spi_dma_ctrl dma; + int use_dma; + u8 irq_reg_sts; ++ int save_total_len; + }; + + /** +@@ -823,11 +824,13 @@ static void pch_spi_copy_rx_data_for_dma + rx_dma_buf = data->dma.rx_buf_virt; + for (j = 0; j < data->bpw_len; j++) + *rx_buf++ = *rx_dma_buf++ & 0xFF; ++ data->cur_trans->rx_buf = rx_buf; + } else { + rx_sbuf = data->cur_trans->rx_buf; + rx_dma_sbuf = data->dma.rx_buf_virt; + for (j = 0; j < data->bpw_len; j++) + *rx_sbuf++ = *rx_dma_sbuf++; ++ data->cur_trans->rx_buf = rx_sbuf; + } + } + +@@ -853,6 +856,9 @@ static int pch_spi_start_transfer(struct + rtn = wait_event_interruptible_timeout(data->wait, + data->transfer_complete, + msecs_to_jiffies(2 * HZ)); ++ if (!rtn) ++ dev_err(&data->master->dev, ++ "%s wait-event timeout\n", __func__); + + dma_sync_sg_for_cpu(&data->master->dev, dma->sg_rx_p, dma->nent, + DMA_FROM_DEVICE); +@@ -989,6 +995,7 @@ static void pch_spi_handle_dma(struct pc + int i; + int size; + int rem; ++ int head; + unsigned long flags; + struct pch_spi_dma_ctrl *dma; + +@@ -1017,6 +1024,11 @@ static void pch_spi_handle_dma(struct pc + } + data->bpw_len = data->cur_trans->len / (*bpw / 8); + ++ if (data->bpw_len > PCH_BUF_SIZE) { ++ data->bpw_len = PCH_BUF_SIZE; ++ data->cur_trans->len -= PCH_BUF_SIZE; ++ } ++ + /* copy Tx Data */ + if (data->cur_trans->tx_buf != NULL) { + if (*bpw == 8) { +@@ -1031,10 +1043,17 @@ static void pch_spi_handle_dma(struct pc + *tx_dma_sbuf++ = *tx_sbuf++; + } + } ++ ++ /* Calculate Rx parameter for DMA transmitting */ + if (data->bpw_len > PCH_DMA_TRANS_SIZE) { +- num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; ++ if (data->bpw_len % PCH_DMA_TRANS_SIZE) { ++ num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; ++ rem = data->bpw_len % PCH_DMA_TRANS_SIZE; ++ } else { ++ num = data->bpw_len / PCH_DMA_TRANS_SIZE; ++ rem = PCH_DMA_TRANS_SIZE; ++ } + size = PCH_DMA_TRANS_SIZE; +- rem = data->bpw_len % PCH_DMA_TRANS_SIZE; + } else { + num = 1; + size = data->bpw_len; +@@ -1094,15 +1113,23 @@ static void pch_spi_handle_dma(struct pc + dma->nent = num; + dma->desc_rx = desc_rx; + +- /* TX */ +- if (data->bpw_len > PCH_DMA_TRANS_SIZE) { +- num = data->bpw_len / PCH_DMA_TRANS_SIZE; ++ /* Calculate Tx parameter for DMA transmitting */ ++ if (data->bpw_len > PCH_MAX_FIFO_DEPTH) { ++ head = PCH_MAX_FIFO_DEPTH - PCH_DMA_TRANS_SIZE; ++ if (data->bpw_len % PCH_DMA_TRANS_SIZE > 4) { ++ num = data->bpw_len / PCH_DMA_TRANS_SIZE + 1; ++ rem = data->bpw_len % PCH_DMA_TRANS_SIZE - head; ++ } else { ++ num = data->bpw_len / PCH_DMA_TRANS_SIZE; ++ rem = data->bpw_len % PCH_DMA_TRANS_SIZE + ++ PCH_DMA_TRANS_SIZE - head; ++ } + size = PCH_DMA_TRANS_SIZE; +- rem = 16; + } else { + num = 1; + size = data->bpw_len; + rem = data->bpw_len; ++ head = 0; + } + + dma->sg_tx_p = kzalloc(sizeof(struct scatterlist)*num, GFP_ATOMIC); +@@ -1112,11 +1139,17 @@ static void pch_spi_handle_dma(struct pc + for (i = 0; i < num; i++, sg++) { + if (i == 0) { + sg->offset = 0; ++ sg_set_page(sg, virt_to_page(dma->tx_buf_virt), size + head, ++ sg->offset); ++ sg_dma_len(sg) = size + head; ++ } else if (i == (num - 1)) { ++ sg->offset = head + size * i; ++ sg->offset = sg->offset * (*bpw / 8); + sg_set_page(sg, virt_to_page(dma->tx_buf_virt), rem, + sg->offset); + sg_dma_len(sg) = rem; + } else { +- sg->offset = rem + size * (i - 1); ++ sg->offset = head + size * i; + sg->offset = sg->offset * (*bpw / 8); + sg_set_page(sg, virt_to_page(dma->tx_buf_virt), size, + sg->offset); +@@ -1204,6 +1237,7 @@ static void pch_spi_process_messages(str + data->current_msg->spi->bits_per_word); + pch_spi_writereg(data->master, PCH_SSNXCR, SSN_NO_CONTROL); + do { ++ int cnt; + /* If we are already processing a message get the next + transfer structure from the message otherwise retrieve + the 1st transfer request from the message. */ +@@ -1223,11 +1257,20 @@ static void pch_spi_process_messages(str + } + spin_unlock(&data->lock); + ++ if (!data->cur_trans->len) ++ goto out; ++ cnt = (data->cur_trans->len - 1) / PCH_BUF_SIZE + 1; ++ data->save_total_len = data->cur_trans->len; + if (data->use_dma) { +- pch_spi_handle_dma(data, &bpw); +- if (!pch_spi_start_transfer(data)) +- goto out; +- pch_spi_copy_rx_data_for_dma(data, bpw); ++ int i; ++ char *save_rx_buf = data->cur_trans->rx_buf; ++ for (i = 0; i < cnt; i ++) { ++ pch_spi_handle_dma(data, &bpw); ++ if (!pch_spi_start_transfer(data)) ++ goto out; ++ pch_spi_copy_rx_data_for_dma(data, bpw); ++ } ++ data->cur_trans->rx_buf = save_rx_buf; + } else { + pch_spi_set_tx(data, &bpw); + pch_spi_set_ir(data); +@@ -1238,6 +1281,7 @@ static void pch_spi_process_messages(str + data->pkt_tx_buff = NULL; + } + /* increment message count */ ++ data->cur_trans->len = data->save_total_len; + data->current_msg->actual_length += data->cur_trans->len; + + dev_dbg(&data->master->dev, diff --git a/queue-3.3/spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch b/queue-3.3/spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch new file mode 100644 index 00000000000..faf09705da3 --- /dev/null +++ b/queue-3.3/spi-topcliff-pch-modify-pci-bus-number-dynamically-to-get-dma-device-info.patch @@ -0,0 +1,29 @@ +From ee2ece5261a639b89f194d141444b03b4c923179 Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 9 Dec 2011 13:11:42 +0900 +Subject: spi-topcliff-pch: Modify pci-bus number dynamically to get DMA device info + +From: Tomoya MORINAGA + +commit ee2ece5261a639b89f194d141444b03b4c923179 upstream. + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Grant Likely +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-topcliff-pch.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/spi/spi-topcliff-pch.c ++++ b/drivers/spi/spi-topcliff-pch.c +@@ -924,7 +924,8 @@ static void pch_spi_request_dma(struct p + dma_cap_set(DMA_SLAVE, mask); + + /* Get DMA's dev information */ +- dma_dev = pci_get_bus_and_slot(2, PCI_DEVFN(12, 0)); ++ dma_dev = pci_get_bus_and_slot(data->board_dat->pdev->bus->number, ++ PCI_DEVFN(12, 0)); + + /* Set Tx DMA */ + param = &dma->param_tx; diff --git a/queue-3.3/spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch b/queue-3.3/spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch new file mode 100644 index 00000000000..62c196eb543 --- /dev/null +++ b/queue-3.3/spi-topcliff-pch-supports-a-spi-mode-setup-and-bit-order-setup-by-io-control.patch @@ -0,0 +1,31 @@ +From f258b44e22e07f5e98ac2260c70acff5784791b6 Mon Sep 17 00:00:00 2001 +From: Tomoya MORINAGA +Date: Fri, 9 Dec 2011 13:13:28 +0900 +Subject: spi-topcliff-pch: supports a spi mode setup and bit order setup by IO control + +From: Tomoya MORINAGA + +commit f258b44e22e07f5e98ac2260c70acff5784791b6 upstream. + +This patch supports a spi mode setup and bit order setup by IO control. + spi mode: mode 0 to mode 3 + bit order: LSB first, MSB first + +Signed-off-by: Tomoya MORINAGA +Signed-off-by: Grant Likely +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/spi/spi-topcliff-pch.c | 1 + + 1 file changed, 1 insertion(+) + +--- a/drivers/spi/spi-topcliff-pch.c ++++ b/drivers/spi/spi-topcliff-pch.c +@@ -1434,6 +1434,7 @@ static int __devinit pch_spi_pd_probe(st + master->num_chipselect = PCH_MAX_CS; + master->setup = pch_spi_setup; + master->transfer = pch_spi_transfer; ++ master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_LSB_FIRST; + + data->board_dat = board_dat; + data->plat_dev = plat_dev; -- 2.47.3