From 136367e567771b7aef49e734817667950413deba Mon Sep 17 00:00:00 2001 From: Jamin Lin Date: Tue, 4 Feb 2025 14:09:55 +0800 Subject: [PATCH] aspeed/soc: Support Non-maskable Interrupt for AST2700 MIME-Version: 1.0 Content-Type: text/plain; charset=utf8 Content-Transfer-Encoding: 8bit QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable Interrupt for AST2700. Reference: https://github.com/qemu/qemu/commit/b36a32ead Signed-off-by: Jamin Lin Suggested-by: Philippe Mathieu-Daudé Reviewed-by: Philippe Mathieu-Daudé Link: https://lore.kernel.org/qemu-devel/20250204060955.3546022-1-jamin_lin@aspeedtech.com --- hw/arm/aspeed_ast27x0.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 2d0c99f159..3e373f966b 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -470,6 +470,10 @@ static bool aspeed_soc_ast2700_gic_realize(DeviceState *dev, Error **errp) qdev_get_gpio_in(cpudev, ARM_CPU_VIRQ)); sysbus_connect_irq(gicbusdev, i + 3 * sc->num_cpus, qdev_get_gpio_in(cpudev, ARM_CPU_VFIQ)); + sysbus_connect_irq(gicbusdev, i + 4 * sc->num_cpus, + qdev_get_gpio_in(cpudev, ARM_CPU_NMI)); + sysbus_connect_irq(gicbusdev, i + 5 * sc->num_cpus, + qdev_get_gpio_in(cpudev, ARM_CPU_VINMI)); } return true; -- 2.39.5