From 1f1a151038f8ef0e5c5f79d7a4ad685ec0510b3e Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Tue, 29 Dec 2020 16:14:23 +0100 Subject: [PATCH] 4.14-stable patches added patches: x86-entry-64-add-instruction-suffix.patch --- queue-4.14/series | 1 + .../x86-entry-64-add-instruction-suffix.patch | 34 +++++++++++++++++++ 2 files changed, 35 insertions(+) create mode 100644 queue-4.14/series create mode 100644 queue-4.14/x86-entry-64-add-instruction-suffix.patch diff --git a/queue-4.14/series b/queue-4.14/series new file mode 100644 index 00000000000..815e2355cb4 --- /dev/null +++ b/queue-4.14/series @@ -0,0 +1 @@ +x86-entry-64-add-instruction-suffix.patch diff --git a/queue-4.14/x86-entry-64-add-instruction-suffix.patch b/queue-4.14/x86-entry-64-add-instruction-suffix.patch new file mode 100644 index 00000000000..a75caafb672 --- /dev/null +++ b/queue-4.14/x86-entry-64-add-instruction-suffix.patch @@ -0,0 +1,34 @@ +From a368d7fd2a3c6babb852fe974018dd97916bcd3b Mon Sep 17 00:00:00 2001 +From: Jan Beulich +Date: Mon, 26 Feb 2018 04:11:21 -0700 +Subject: x86/entry/64: Add instruction suffix + +From: Jan Beulich + +commit a368d7fd2a3c6babb852fe974018dd97916bcd3b upstream. + +Omitting suffixes from instructions in AT&T mode is bad practice when +operand size cannot be determined by the assembler from register +operands, and is likely going to be warned about by upstream gas in the +future (mine does already). Add the single missing suffix here. + +Signed-off-by: Jan Beulich +Signed-off-by: Thomas Gleixner +Link: https://lkml.kernel.org/r/5A93F96902000078001ABAC8@prv-mh.provo.novell.com +Signed-off-by: Greg Kroah-Hartman + +--- + arch/x86/entry/entry_64.S | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/arch/x86/entry/entry_64.S ++++ b/arch/x86/entry/entry_64.S +@@ -55,7 +55,7 @@ END(native_usergs_sysret64) + + .macro TRACE_IRQS_IRETQ + #ifdef CONFIG_TRACE_IRQFLAGS +- bt $9, EFLAGS(%rsp) /* interrupts off? */ ++ btl $9, EFLAGS(%rsp) /* interrupts off? */ + jnc 1f + TRACE_IRQS_ON + 1: -- 2.47.3