From 2839be167c613bbd10caeceaa293f8fa6926a91c Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 20 Jul 2020 13:23:14 +0200 Subject: [PATCH] 4.9-stable patches added patches: mtd-rawnand-brcmnand-fix-cs0-layout.patch --- .../mtd-rawnand-brcmnand-fix-cs0-layout.patch | 40 +++++++++++++++++++ queue-4.9/series | 1 + 2 files changed, 41 insertions(+) create mode 100644 queue-4.9/mtd-rawnand-brcmnand-fix-cs0-layout.patch diff --git a/queue-4.9/mtd-rawnand-brcmnand-fix-cs0-layout.patch b/queue-4.9/mtd-rawnand-brcmnand-fix-cs0-layout.patch new file mode 100644 index 00000000000..d098de1a14d --- /dev/null +++ b/queue-4.9/mtd-rawnand-brcmnand-fix-cs0-layout.patch @@ -0,0 +1,40 @@ +From 3d3fb3c5be9ce07fa85d8f67fb3922e4613b955b Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?=C3=81lvaro=20Fern=C3=A1ndez=20Rojas?= +Date: Fri, 22 May 2020 14:15:21 +0200 +Subject: mtd: rawnand: brcmnand: fix CS0 layout +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Álvaro Fernández Rojas + +commit 3d3fb3c5be9ce07fa85d8f67fb3922e4613b955b upstream. + +Only v3.3-v5.0 have a different CS0 layout. +Controllers before v3.3 use the same layout for every CS. + +Fixes: 27c5b17cd1b1 ("mtd: nand: add NAND driver "library" for Broadcom STB NAND controller") +Signed-off-by: Álvaro Fernández Rojas +Acked-by: Florian Fainelli +Signed-off-by: Miquel Raynal +Link: https://lore.kernel.org/linux-mtd/20200522121524.4161539-3-noltari@gmail.com +Signed-off-by: Greg Kroah-Hartman + +--- + drivers/mtd/nand/brcmnand/brcmnand.c | 5 +++-- + 1 file changed, 3 insertions(+), 2 deletions(-) + +--- a/drivers/mtd/nand/brcmnand/brcmnand.c ++++ b/drivers/mtd/nand/brcmnand/brcmnand.c +@@ -491,8 +491,9 @@ static int brcmnand_revision_init(struct + } else { + ctrl->cs_offsets = brcmnand_cs_offsets; + +- /* v5.0 and earlier has a different CS0 offset layout */ +- if (ctrl->nand_version <= 0x0500) ++ /* v3.3-5.0 have a different CS0 offset layout */ ++ if (ctrl->nand_version >= 0x0303 && ++ ctrl->nand_version <= 0x0500) + ctrl->cs0_offsets = brcmnand_cs_offsets_cs0; + } + diff --git a/queue-4.9/series b/queue-4.9/series index 94d0bbe5f56..67a7743b7e0 100644 --- a/queue-4.9/series +++ b/queue-4.9/series @@ -57,3 +57,4 @@ staging-comedi-verify-array-index-is-correct-before-.patch revert-thermal-mediatek-fix-register-index-error.patch arm-dts-socfpga-align-l2-cache-controller-nodename-w.patch perf-stat-zero-all-the-ena-and-run-array-slot-stats-for-interval-mode.patch +mtd-rawnand-brcmnand-fix-cs0-layout.patch -- 2.47.3