From 2e444733dc5087478a59b86cbeaa5277ccb03065 Mon Sep 17 00:00:00 2001 From: ebotcazou Date: Tue, 30 Oct 2012 23:08:14 +0000 Subject: [PATCH] * cse.c (hash_rtx_cb): Replace RTX_UNCHANGING_P with MEM_READONLY_P in head comment. (hash_rtx): Likewise. git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@193001 138bc75d-0d04-0410-961f-82ee72b054a4 --- gcc/ChangeLog | 6 ++++++ gcc/cse.c | 4 ++-- 2 files changed, 8 insertions(+), 2 deletions(-) diff --git a/gcc/ChangeLog b/gcc/ChangeLog index d4622cc06ad7..12b1504232a4 100644 --- a/gcc/ChangeLog +++ b/gcc/ChangeLog @@ -1,3 +1,9 @@ +2012-10-30 Eric Botcazou + + * cse.c (hash_rtx_cb): Replace RTX_UNCHANGING_P with MEM_READONLY_P in + head comment. + (hash_rtx): Likewise. + 2012-10-30 H.J. Lu PR rtl-optimization/55093 diff --git a/gcc/cse.c b/gcc/cse.c index c7a75eae4544..b41d47a36a2a 100644 --- a/gcc/cse.c +++ b/gcc/cse.c @@ -2547,7 +2547,7 @@ hash_rtx_cb (const_rtx x, enum machine_mode mode, Store 1 in DO_NOT_RECORD_P if any subexpression is volatile. If HASH_ARG_IN_MEMORY_P is not NULL, store 1 in it if X contains - a MEM rtx which does not have the RTX_UNCHANGING_P bit set. + a MEM rtx which does not have the MEM_READONLY_P flag set. Note that cse_insn knows that the hash code of a MEM expression is just (int) MEM plus the hash code of the address. */ @@ -2563,7 +2563,7 @@ hash_rtx (const_rtx x, enum machine_mode mode, int *do_not_record_p, /* Hash an rtx X for cse via hash_rtx. Stores 1 in do_not_record if any subexpression is volatile. Stores 1 in hash_arg_in_memory if X contains a mem rtx which - does not have the RTX_UNCHANGING_P bit set. */ + does not have the MEM_READONLY_P flag set. */ static inline unsigned canon_hash (rtx x, enum machine_mode mode) -- 2.47.2