From 360435b55b68eb5db14da6e6b8dad66f5fa40e88 Mon Sep 17 00:00:00 2001 From: Greg Kroah-Hartman Date: Mon, 17 May 2021 15:05:17 +0200 Subject: [PATCH] 5.12-stable patches added patches: arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch asoc-rsnd-check-all-busif-status-when-error.patch clk-exynos7-mark-aclk_fsys1_200-as-critical.patch debugfs-make-debugfs_allow-ro-after-init.patch dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch ext4-fix-debug-format-string-warning.patch i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch media-rkvdec-remove-of_match_ptr.patch nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch --- ...move-console-config-to-cpu-board-dts.patch | 59 ++++++ ...nd-check-all-busif-status-when-error.patch | 41 ++++ ...nos7-mark-aclk_fsys1_200-as-critical.patch | 50 +++++ ...gfs-make-debugfs_allow-ro-after-init.patch | 33 ++++ ...n-make-resets-optional-on-r-car-gen1.patch | 80 ++++++++ ...st-document-missing-r-car-h1-support.patch | 56 ++++++ ...ompatibles-back-to-qcom-qmp-phy.yaml.patch | 61 ++++++ ...remove-duplicated-compatible-strings.patch | 34 ++++ ...l-support-five-tsc-nodes-on-r8a779a0.patch | 96 +++++++++ ...ext4-fix-debug-format-string-warning.patch | 67 +++++++ ...x-send-master-code-at-more-than-1mhz.patch | 60 ++++++ .../media-rkvdec-remove-of_match_ptr.patch | 38 ++++ ...apst-when-the-controller-is-not-live.patch | 35 ++++ queue-5.12/series | 16 ++ ...s-add-a-meaningful-power-domain-name.patch | 138 +++++++++++++ ...-add-a-power-domain-names-for-mt8183.patch | 142 ++++++++++++++ ...-add-a-power-domain-names-for-mt8192.patch | 182 ++++++++++++++++++ 17 files changed, 1188 insertions(+) create mode 100644 queue-5.12/arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch create mode 100644 queue-5.12/asoc-rsnd-check-all-busif-status-when-error.patch create mode 100644 queue-5.12/clk-exynos7-mark-aclk_fsys1_200-as-critical.patch create mode 100644 queue-5.12/debugfs-make-debugfs_allow-ro-after-init.patch create mode 100644 queue-5.12/dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch create mode 100644 queue-5.12/dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch create mode 100644 queue-5.12/dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch create mode 100644 queue-5.12/dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch create mode 100644 queue-5.12/dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch create mode 100644 queue-5.12/ext4-fix-debug-format-string-warning.patch create mode 100644 queue-5.12/i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch create mode 100644 queue-5.12/media-rkvdec-remove-of_match_ptr.patch create mode 100644 queue-5.12/nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch create mode 100644 queue-5.12/soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch create mode 100644 queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch create mode 100644 queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch diff --git a/queue-5.12/arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch b/queue-5.12/arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch new file mode 100644 index 00000000000..729cb18ab79 --- /dev/null +++ b/queue-5.12/arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch @@ -0,0 +1,59 @@ +From e86ff34cc44a49aeae2af74444560b17a0a96c78 Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Tue, 16 Mar 2021 16:47:03 +0100 +Subject: arm64: dts: renesas: falcon: Move console config to CPU board DTS +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Geert Uytterhoeven + +commit e86ff34cc44a49aeae2af74444560b17a0a96c78 upstream. + +The serial console is located on the Falcon CPU board. Hence move +serial console configuration from the main Falcon DTS file to the DTS +file that describes the CPU board. + +Fixes: 63070d7c2270e8de ("arm64: dts: renesas: Add Renesas Falcon boards support") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Wolfram Sang +Tested-by: Wolfram Sang +Reviewed-by: Niklas Söderlund +Link: https://lore.kernel.org/r/20210316154705.2433528-2-geert+renesas@glider.be +Signed-off-by: Greg Kroah-Hartman +--- + arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi | 8 ++++++++ + arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts | 5 ----- + 2 files changed, 8 insertions(+), 5 deletions(-) + +--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi ++++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon-cpu.dtsi +@@ -12,6 +12,14 @@ + model = "Renesas Falcon CPU board"; + compatible = "renesas,falcon-cpu", "renesas,r8a779a0"; + ++ aliases { ++ serial0 = &scif0; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ + memory@48000000 { + device_type = "memory"; + /* first 128MB is reserved for secure area. */ +--- a/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts ++++ b/arch/arm64/boot/dts/renesas/r8a779a0-falcon.dts +@@ -14,11 +14,6 @@ + + aliases { + ethernet0 = &avb0; +- serial0 = &scif0; +- }; +- +- chosen { +- stdout-path = "serial0:115200n8"; + }; + }; + diff --git a/queue-5.12/asoc-rsnd-check-all-busif-status-when-error.patch b/queue-5.12/asoc-rsnd-check-all-busif-status-when-error.patch new file mode 100644 index 00000000000..af13d48e248 --- /dev/null +++ b/queue-5.12/asoc-rsnd-check-all-busif-status-when-error.patch @@ -0,0 +1,41 @@ +From a4856e15e58b54977f1c0c0299309ad4d1f13365 Mon Sep 17 00:00:00 2001 +From: Kuninori Morimoto +Date: Thu, 8 Apr 2021 13:28:47 +0900 +Subject: ASoC: rsnd: check all BUSIF status when error + +From: Kuninori Morimoto + +commit a4856e15e58b54977f1c0c0299309ad4d1f13365 upstream. + +commit 66c705d07d784 ("SoC: rsnd: add interrupt support for SSI BUSIF +buffer") adds __rsnd_ssi_interrupt() checks for BUSIF status, +but is using "break" at for loop. +This means it is not checking all status. Let's check all BUSIF status. + +Fixes: commit 66c705d07d784 ("SoC: rsnd: add interrupt support for SSI BUSIF buffer") +Signed-off-by: Kuninori Morimoto +Link: https://lore.kernel.org/r/874kgh1jsw.wl-kuninori.morimoto.gx@renesas.com +Signed-off-by: Mark Brown +Signed-off-by: Greg Kroah-Hartman +--- + sound/soc/sh/rcar/ssi.c | 2 -- + 1 file changed, 2 deletions(-) + +--- a/sound/soc/sh/rcar/ssi.c ++++ b/sound/soc/sh/rcar/ssi.c +@@ -797,7 +797,6 @@ static void __rsnd_ssi_interrupt(struct + SSI_SYS_STATUS(i * 2), + 0xf << (id * 4)); + stop = true; +- break; + } + } + break; +@@ -815,7 +814,6 @@ static void __rsnd_ssi_interrupt(struct + SSI_SYS_STATUS((i * 2) + 1), + 0xf << 4); + stop = true; +- break; + } + } + break; diff --git a/queue-5.12/clk-exynos7-mark-aclk_fsys1_200-as-critical.patch b/queue-5.12/clk-exynos7-mark-aclk_fsys1_200-as-critical.patch new file mode 100644 index 00000000000..76720a58fb8 --- /dev/null +++ b/queue-5.12/clk-exynos7-mark-aclk_fsys1_200-as-critical.patch @@ -0,0 +1,50 @@ +From 34138a59b92c1a30649a18ec442d2e61f3bc34dd Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Pawe=C5=82=20Chmiel?= +Date: Sat, 24 Oct 2020 17:43:46 +0200 +Subject: clk: exynos7: Mark aclk_fsys1_200 as critical +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Paweł Chmiel + +commit 34138a59b92c1a30649a18ec442d2e61f3bc34dd upstream. + +This clock must be always enabled to allow access to any registers in +fsys1 CMU. Until proper solution based on runtime PM is applied +(similar to what was done for Exynos5433), mark that clock as critical +so it won't be disabled. + +It was observed on Samsung Galaxy S6 device (based on Exynos7420), where +UFS module is probed before pmic used to power that device. +In this case defer probe was happening and that clock was disabled by +UFS driver, causing whole boot to hang on next CMU access. + +Fixes: 753195a749a6 ("clk: samsung: exynos7: Correct CMU_FSYS1 clocks names") +Signed-off-by: Paweł Chmiel +Acked-by: Krzysztof Kozlowski +Link: https://lore.kernel.org/linux-clk/20201024154346.9589-1-pawel.mikolaj.chmiel@gmail.com +[s.nawrocki: Added comment in the code] +Signed-off-by: Sylwester Nawrocki +Signed-off-by: Greg Kroah-Hartman +--- + drivers/clk/samsung/clk-exynos7.c | 7 ++++++- + 1 file changed, 6 insertions(+), 1 deletion(-) + +--- a/drivers/clk/samsung/clk-exynos7.c ++++ b/drivers/clk/samsung/clk-exynos7.c +@@ -537,8 +537,13 @@ static const struct samsung_gate_clock t + GATE(CLK_ACLK_FSYS0_200, "aclk_fsys0_200", "dout_aclk_fsys0_200", + ENABLE_ACLK_TOP13, 28, CLK_SET_RATE_PARENT | + CLK_IS_CRITICAL, 0), ++ /* ++ * This clock is required for the CMU_FSYS1 registers access, keep it ++ * enabled permanently until proper runtime PM support is added. ++ */ + GATE(CLK_ACLK_FSYS1_200, "aclk_fsys1_200", "dout_aclk_fsys1_200", +- ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT, 0), ++ ENABLE_ACLK_TOP13, 24, CLK_SET_RATE_PARENT | ++ CLK_IS_CRITICAL, 0), + + GATE(CLK_SCLK_PHY_FSYS1_26M, "sclk_phy_fsys1_26m", + "dout_sclk_phy_fsys1_26m", ENABLE_SCLK_TOP1_FSYS11, diff --git a/queue-5.12/debugfs-make-debugfs_allow-ro-after-init.patch b/queue-5.12/debugfs-make-debugfs_allow-ro-after-init.patch new file mode 100644 index 00000000000..3d71f4c7088 --- /dev/null +++ b/queue-5.12/debugfs-make-debugfs_allow-ro-after-init.patch @@ -0,0 +1,33 @@ +From 312723a0b34d6d110aa4427a982536bb36ab8471 Mon Sep 17 00:00:00 2001 +From: Kees Cook +Date: Mon, 5 Apr 2021 14:39:59 -0700 +Subject: debugfs: Make debugfs_allow RO after init + +From: Kees Cook + +commit 312723a0b34d6d110aa4427a982536bb36ab8471 upstream. + +Since debugfs_allow is only set at boot time during __init, make it +read-only after being set. + +Fixes: a24c6f7bc923 ("debugfs: Add access restriction option") +Cc: Peter Enderborg +Reviewed-by: Peter Enderborg +Signed-off-by: Kees Cook +Link: https://lore.kernel.org/r/20210405213959.3079432-1-keescook@chromium.org +Signed-off-by: Greg Kroah-Hartman +--- + fs/debugfs/inode.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/fs/debugfs/inode.c ++++ b/fs/debugfs/inode.c +@@ -35,7 +35,7 @@ + static struct vfsmount *debugfs_mount; + static int debugfs_mount_count; + static bool debugfs_registered; +-static unsigned int debugfs_allow = DEFAULT_DEBUGFS_ALLOW_BITS; ++static unsigned int debugfs_allow __ro_after_init = DEFAULT_DEBUGFS_ALLOW_BITS; + + /* + * Don't allow access attributes to be changed whilst the kernel is locked down diff --git a/queue-5.12/dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch b/queue-5.12/dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch new file mode 100644 index 00000000000..e1ef7e74bb2 --- /dev/null +++ b/queue-5.12/dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch @@ -0,0 +1,80 @@ +From 7935bb56e21b2add81149f4def8e59b4133fe57c Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Thu, 29 Apr 2021 14:45:52 +0200 +Subject: dt-bindings: media: renesas,vin: Make resets optional on R-Car Gen1 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Geert Uytterhoeven + +commit 7935bb56e21b2add81149f4def8e59b4133fe57c upstream. + +The "resets" property is not present on R-Car Gen1 SoCs. +Supporting it would require migrating from renesas,cpg-clocks to +renesas,cpg-mssr. + +Fixes: 905fc6b1bfb4a631 ("dt-bindings: rcar-vin: Convert bindings to json-schema") +Signed-off-by: Geert Uytterhoeven +Reviewed-by: Niklas Söderlund +Link: https://lore.kernel.org/r/217c8197efaee7d803b22d433abb0ea8e33b84c6.1619700314.git.geert+renesas@glider.be +Signed-off-by: Rob Herring +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/media/renesas,vin.yaml | 44 +++++++++------ + 1 file changed, 28 insertions(+), 16 deletions(-) + +--- a/Documentation/devicetree/bindings/media/renesas,vin.yaml ++++ b/Documentation/devicetree/bindings/media/renesas,vin.yaml +@@ -193,23 +193,35 @@ required: + - interrupts + - clocks + - power-domains +- - resets + +-if: +- properties: +- compatible: +- contains: +- enum: +- - renesas,vin-r8a7778 +- - renesas,vin-r8a7779 +- - renesas,rcar-gen2-vin +-then: +- required: +- - port +-else: +- required: +- - renesas,id +- - ports ++allOf: ++ - if: ++ not: ++ properties: ++ compatible: ++ contains: ++ enum: ++ - renesas,vin-r8a7778 ++ - renesas,vin-r8a7779 ++ then: ++ required: ++ - resets ++ ++ - if: ++ properties: ++ compatible: ++ contains: ++ enum: ++ - renesas,vin-r8a7778 ++ - renesas,vin-r8a7779 ++ - renesas,rcar-gen2-vin ++ then: ++ required: ++ - port ++ else: ++ required: ++ - renesas,id ++ - ports + + additionalProperties: false + diff --git a/queue-5.12/dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch b/queue-5.12/dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch new file mode 100644 index 00000000000..a7bae8ddbec --- /dev/null +++ b/queue-5.12/dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch @@ -0,0 +1,56 @@ +From 62b3b3660aff66433d71f142ab6ed2baaea25025 Mon Sep 17 00:00:00 2001 +From: Geert Uytterhoeven +Date: Thu, 29 Apr 2021 14:44:09 +0200 +Subject: dt-bindings: PCI: rcar-pci-host: Document missing R-Car H1 support + +From: Geert Uytterhoeven + +commit 62b3b3660aff66433d71f142ab6ed2baaea25025 upstream. + +scripts/checkpatch.pl -f drivers/pci/controller/pcie-rcar-host.c: + + WARNING: DT compatible string "renesas,pcie-r8a7779" appears un-documented -- check ./Documentation/devicetree/bindings/ + #853: FILE: drivers/pci/controller/pcie-rcar-host.c:853: + + { .compatible = "renesas,pcie-r8a7779", + +Re-add the compatible value for R-Car H1, which was lost during the +json-schema conversion. Make the "resets" property optional on R-Car +H1, as it is not present yet on R-Car Gen1 SoCs. + +Fixes: 0d69ce3c2c63d4db ("dt-bindings: PCI: rcar-pci-host: Convert bindings to json-schema") +Signed-off-by: Geert Uytterhoeven +Link: https://lore.kernel.org/r/fb0bb969cd0e5872ab5eac70e070242c0d8a5b81.1619700202.git.geert+renesas@glider.be +Signed-off-by: Rob Herring +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/pci/rcar-pci-host.yaml | 12 +++++++++++- + 1 file changed, 11 insertions(+), 1 deletion(-) + +--- a/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml ++++ b/Documentation/devicetree/bindings/pci/rcar-pci-host.yaml +@@ -17,6 +17,7 @@ allOf: + properties: + compatible: + oneOf: ++ - const: renesas,pcie-r8a7779 # R-Car H1 + - items: + - enum: + - renesas,pcie-r8a7742 # RZ/G1H +@@ -74,7 +75,16 @@ required: + - clocks + - clock-names + - power-domains +- - resets ++ ++if: ++ not: ++ properties: ++ compatible: ++ contains: ++ const: renesas,pcie-r8a7779 ++then: ++ required: ++ - resets + + unevaluatedProperties: false + diff --git a/queue-5.12/dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch b/queue-5.12/dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch new file mode 100644 index 00000000000..a4032101af4 --- /dev/null +++ b/queue-5.12/dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch @@ -0,0 +1,61 @@ +From 94c34600b6173a2b9dd7d9694a42d86fb8768e62 Mon Sep 17 00:00:00 2001 +From: Dmitry Baryshkov +Date: Wed, 31 Mar 2021 18:16:08 +0300 +Subject: dt-bindings: phy: qcom,qmp-usb3-dp-phy: move usb3 compatibles back to qcom,qmp-phy.yaml + +From: Dmitry Baryshkov + +commit 94c34600b6173a2b9dd7d9694a42d86fb8768e62 upstream. + +The commit 724fabf5df13 ("dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy +information") has support for DP part of USB3+DP combo PHYs. However +this change is not backwards compatible, placing additional requirements +onto qcom,sc7180-qmp-usb3-phy and qcom,sdm845-qmp-usb3-phy device nodes +(to include separate DP part, etc). However the aforementioned nodes do +not inclue DP part, they strictly follow the schema defined in the +qcom,qmp-phy.yaml file. Move those compatibles, leaving +qcom,qmp-usb3-dp-phy.yaml to describe only real "combo" USB3+DP device nodes. + +Fixes: 724fabf5df13 ("dt-bindings: phy: qcom,qmp-usb3-dp: Add DP phy information") +Cc: Stephen Boyd +Cc: Sandeep Maheswaram +Signed-off-by: Dmitry Baryshkov +Acked-by: Rob Herring +Reviewed-by: Stephen Boyd +Reviewed-by: Bjorn Andersson +Link: https://lore.kernel.org/r/20210331151614.3810197-2-dmitry.baryshkov@linaro.org +Signed-off-by: Vinod Koul +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml | 2 ++ + Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml | 2 -- + 2 files changed, 2 insertions(+), 2 deletions(-) + +--- a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml ++++ b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml +@@ -25,11 +25,13 @@ properties: + - qcom,msm8998-qmp-pcie-phy + - qcom,msm8998-qmp-ufs-phy + - qcom,msm8998-qmp-usb3-phy ++ - qcom,sc7180-qmp-usb3-phy + - qcom,sc8180x-qmp-ufs-phy + - qcom,sc8180x-qmp-usb3-phy + - qcom,sdm845-qhp-pcie-phy + - qcom,sdm845-qmp-pcie-phy + - qcom,sdm845-qmp-ufs-phy ++ - qcom,sdm845-qmp-usb3-phy + - qcom,sdm845-qmp-usb3-uni-phy + - qcom,sm8150-qmp-ufs-phy + - qcom,sm8150-qmp-usb3-phy +--- a/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml ++++ b/Documentation/devicetree/bindings/phy/qcom,qmp-usb3-dp-phy.yaml +@@ -14,9 +14,7 @@ properties: + compatible: + enum: + - qcom,sc7180-qmp-usb3-dp-phy +- - qcom,sc7180-qmp-usb3-phy + - qcom,sdm845-qmp-usb3-dp-phy +- - qcom,sdm845-qmp-usb3-phy + reg: + items: + - description: Address and length of PHY's USB serdes block. diff --git a/queue-5.12/dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch b/queue-5.12/dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch new file mode 100644 index 00000000000..940ae2aee01 --- /dev/null +++ b/queue-5.12/dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch @@ -0,0 +1,34 @@ +From a7277a73984114b38dcb62c8548850800ffe864e Mon Sep 17 00:00:00 2001 +From: Zhen Lei +Date: Thu, 22 Apr 2021 17:08:57 +0800 +Subject: dt-bindings: serial: 8250: Remove duplicated compatible strings + +From: Zhen Lei + +commit a7277a73984114b38dcb62c8548850800ffe864e upstream. + +The compatible strings "mediatek,*" appears two times, remove one of them. + +Fixes: e69f5dc623f9 ("dt-bindings: serial: Convert 8250 to json-schema") +Signed-off-by: Zhen Lei +Link: https://lore.kernel.org/r/20210422090857.583-1-thunder.leizhen@huawei.com +Signed-off-by: Rob Herring +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/serial/8250.yaml | 5 ----- + 1 file changed, 5 deletions(-) + +--- a/Documentation/devicetree/bindings/serial/8250.yaml ++++ b/Documentation/devicetree/bindings/serial/8250.yaml +@@ -94,11 +94,6 @@ properties: + - mediatek,mt7623-btif + - const: mediatek,mtk-btif + - items: +- - enum: +- - mediatek,mt7622-btif +- - mediatek,mt7623-btif +- - const: mediatek,mtk-btif +- - items: + - const: mrvl,mmp-uart + - const: intel,xscale-uart + - items: diff --git a/queue-5.12/dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch b/queue-5.12/dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch new file mode 100644 index 00000000000..a8e2ca8d0e2 --- /dev/null +++ b/queue-5.12/dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch @@ -0,0 +1,96 @@ +From 9468e7b031876935230182628f8d5f216c071784 Mon Sep 17 00:00:00 2001 +From: =?UTF-8?q?Niklas=20S=C3=B6derlund?= + +Date: Wed, 10 Mar 2021 12:07:16 +0100 +Subject: dt-bindings: thermal: rcar-gen3-thermal: Support five TSC nodes on r8a779a0 +MIME-Version: 1.0 +Content-Type: text/plain; charset=UTF-8 +Content-Transfer-Encoding: 8bit + +From: Niklas Söderlund + +commit 9468e7b031876935230182628f8d5f216c071784 upstream. + +When adding support for V3U (r8a779a0) it was incorrectly recorded it +supports four nodes, while in fact it supports five. The fifth node is +named TSC0 and breaks the existing naming schema starting at 1. Work +around this by separately defining the reg property for V3U and others. + +Restore the maximum number of nodes to three for other compatibles as +it was before erroneously increasing it for V3U. + +Fixes: d7fdfb6541f3be88 ("dt-bindings: thermal: rcar-gen3-thermal: Add r8a779a0 support") +Signed-off-by: Niklas Söderlund +Reviewed-by: Geert Uytterhoeven +Signed-off-by: Daniel Lezcano +Link: https://lore.kernel.org/r/20210310110716.3297544-1-niklas.soderlund+renesas@ragnatech.se +Signed-off-by: Greg Kroah-Hartman +--- + Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml | 43 ++++++++-- + 1 file changed, 35 insertions(+), 8 deletions(-) + +--- a/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml ++++ b/Documentation/devicetree/bindings/thermal/rcar-gen3-thermal.yaml +@@ -28,14 +28,7 @@ properties: + - renesas,r8a77980-thermal # R-Car V3H + - renesas,r8a779a0-thermal # R-Car V3U + +- reg: +- minItems: 2 +- maxItems: 4 +- items: +- - description: TSC1 registers +- - description: TSC2 registers +- - description: TSC3 registers +- - description: TSC4 registers ++ reg: true + + interrupts: + items: +@@ -71,8 +64,25 @@ if: + enum: + - renesas,r8a779a0-thermal + then: ++ properties: ++ reg: ++ minItems: 2 ++ maxItems: 3 ++ items: ++ - description: TSC1 registers ++ - description: TSC2 registers ++ - description: TSC3 registers + required: + - interrupts ++else: ++ properties: ++ reg: ++ items: ++ - description: TSC0 registers ++ - description: TSC1 registers ++ - description: TSC2 registers ++ - description: TSC3 registers ++ - description: TSC4 registers + + additionalProperties: false + +@@ -111,3 +121,20 @@ examples: + }; + }; + }; ++ - | ++ #include ++ #include ++ #include ++ ++ tsc_r8a779a0: thermal@e6190000 { ++ compatible = "renesas,r8a779a0-thermal"; ++ reg = <0xe6190000 0x200>, ++ <0xe6198000 0x200>, ++ <0xe61a0000 0x200>, ++ <0xe61a8000 0x200>, ++ <0xe61b0000 0x200>; ++ clocks = <&cpg CPG_MOD 919>; ++ power-domains = <&sysc R8A779A0_PD_ALWAYS_ON>; ++ resets = <&cpg 919>; ++ #thermal-sensor-cells = <1>; ++ }; diff --git a/queue-5.12/ext4-fix-debug-format-string-warning.patch b/queue-5.12/ext4-fix-debug-format-string-warning.patch new file mode 100644 index 00000000000..b49e7056a45 --- /dev/null +++ b/queue-5.12/ext4-fix-debug-format-string-warning.patch @@ -0,0 +1,67 @@ +From fcdf3c34b7abdcbb49690c94c7fa6ce224dc9749 Mon Sep 17 00:00:00 2001 +From: Arnd Bergmann +Date: Fri, 9 Apr 2021 22:12:05 +0200 +Subject: ext4: fix debug format string warning + +From: Arnd Bergmann + +commit fcdf3c34b7abdcbb49690c94c7fa6ce224dc9749 upstream. + +Using no_printk() for jbd_debug() revealed two warnings: + +fs/jbd2/recovery.c: In function 'fc_do_one_pass': +fs/jbd2/recovery.c:256:30: error: format '%d' expects a matching 'int' argument [-Werror=format=] + 256 | jbd_debug(3, "Processing fast commit blk with seq %d"); + | ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ +fs/ext4/fast_commit.c: In function 'ext4_fc_replay_add_range': +fs/ext4/fast_commit.c:1732:30: error: format '%d' expects argument of type 'int', but argument 2 has type 'long unsigned int' [-Werror=format=] + 1732 | jbd_debug(1, "Converting from %d to %d %lld", + +The first one was added incorrectly, and was also missing a few newlines +in debug output, and the second one happened when the type of an +argument changed. + +Reported-by: kernel test robot +Fixes: d556435156b7 ("jbd2: avoid -Wempty-body warnings") +Fixes: 6db074618969 ("ext4: use BIT() macro for BH_** state bits") +Fixes: 5b849b5f96b4 ("jbd2: fast commit recovery path") +Signed-off-by: Arnd Bergmann +Link: https://lore.kernel.org/r/20210409201211.1866633-1-arnd@kernel.org +Signed-off-by: Theodore Ts'o +Signed-off-by: Greg Kroah-Hartman +--- + fs/ext4/fast_commit.c | 2 +- + fs/jbd2/recovery.c | 5 ++--- + 2 files changed, 3 insertions(+), 4 deletions(-) + +--- a/fs/ext4/fast_commit.c ++++ b/fs/ext4/fast_commit.c +@@ -1736,7 +1736,7 @@ static int ext4_fc_replay_add_range(stru + } + + /* Range is mapped and needs a state change */ +- jbd_debug(1, "Converting from %d to %d %lld", ++ jbd_debug(1, "Converting from %ld to %d %lld", + map.m_flags & EXT4_MAP_UNWRITTEN, + ext4_ext_is_unwritten(ex), map.m_pblk); + ret = ext4_ext_replay_update_ex(inode, cur, map.m_len, +--- a/fs/jbd2/recovery.c ++++ b/fs/jbd2/recovery.c +@@ -245,15 +245,14 @@ static int fc_do_one_pass(journal_t *jou + return 0; + + while (next_fc_block <= journal->j_fc_last) { +- jbd_debug(3, "Fast commit replay: next block %ld", ++ jbd_debug(3, "Fast commit replay: next block %ld\n", + next_fc_block); + err = jread(&bh, journal, next_fc_block); + if (err) { +- jbd_debug(3, "Fast commit replay: read error"); ++ jbd_debug(3, "Fast commit replay: read error\n"); + break; + } + +- jbd_debug(3, "Processing fast commit blk with seq %d"); + err = journal->j_fc_replay_callback(journal, bh, pass, + next_fc_block - journal->j_fc_first, + expected_commit_id); diff --git a/queue-5.12/i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch b/queue-5.12/i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch new file mode 100644 index 00000000000..777c5223e1f --- /dev/null +++ b/queue-5.12/i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch @@ -0,0 +1,60 @@ +From 63ce8e3df8f6deca2da52eaf064751ad4018b46e Mon Sep 17 00:00:00 2001 +From: Qii Wang +Date: Sat, 17 Apr 2021 14:46:50 +0800 +Subject: i2c: mediatek: Fix send master code at more than 1MHz + +From: Qii Wang + +commit 63ce8e3df8f6deca2da52eaf064751ad4018b46e upstream. + +There are some omissions in the previous patch about replacing +I2C_MAX_FAST_MODE__FREQ with I2C_MAX_FAST_MODE_PLUS_FREQ and +need to fix it. + +Fixes: b44658e755b5("i2c: mediatek: Send i2c master code at more than 1MHz") +Signed-off-by: Qii Wang +Signed-off-by: Wolfram Sang +Signed-off-by: Greg Kroah-Hartman +--- + drivers/i2c/busses/i2c-mt65xx.c | 9 +++++---- + 1 file changed, 5 insertions(+), 4 deletions(-) + +--- a/drivers/i2c/busses/i2c-mt65xx.c ++++ b/drivers/i2c/busses/i2c-mt65xx.c +@@ -564,7 +564,7 @@ static const struct i2c_spec_values *mtk + + static int mtk_i2c_max_step_cnt(unsigned int target_speed) + { +- if (target_speed > I2C_MAX_FAST_MODE_FREQ) ++ if (target_speed > I2C_MAX_FAST_MODE_PLUS_FREQ) + return MAX_HS_STEP_CNT_DIV; + else + return MAX_STEP_CNT_DIV; +@@ -635,7 +635,7 @@ static int mtk_i2c_check_ac_timing(struc + if (sda_min > sda_max) + return -3; + +- if (check_speed > I2C_MAX_FAST_MODE_FREQ) { ++ if (check_speed > I2C_MAX_FAST_MODE_PLUS_FREQ) { + if (i2c->dev_comp->ltiming_adjust) { + i2c->ac_timing.hs = I2C_TIME_DEFAULT_VALUE | + (sample_cnt << 12) | (high_cnt << 8); +@@ -850,7 +850,7 @@ static int mtk_i2c_do_transfer(struct mt + + control_reg = mtk_i2c_readw(i2c, OFFSET_CONTROL) & + ~(I2C_CONTROL_DIR_CHANGE | I2C_CONTROL_RS); +- if ((i2c->speed_hz > I2C_MAX_FAST_MODE_FREQ) || (left_num >= 1)) ++ if ((i2c->speed_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) || (left_num >= 1)) + control_reg |= I2C_CONTROL_RS; + + if (i2c->op == I2C_MASTER_WRRD) +@@ -1067,7 +1067,8 @@ static int mtk_i2c_transfer(struct i2c_a + } + } + +- if (i2c->auto_restart && num >= 2 && i2c->speed_hz > I2C_MAX_FAST_MODE_FREQ) ++ if (i2c->auto_restart && num >= 2 && ++ i2c->speed_hz > I2C_MAX_FAST_MODE_PLUS_FREQ) + /* ignore the first restart irq after the master code, + * otherwise the first transfer will be discarded. + */ diff --git a/queue-5.12/media-rkvdec-remove-of_match_ptr.patch b/queue-5.12/media-rkvdec-remove-of_match_ptr.patch new file mode 100644 index 00000000000..27b66ade18f --- /dev/null +++ b/queue-5.12/media-rkvdec-remove-of_match_ptr.patch @@ -0,0 +1,38 @@ +From c2357dd9cbafc8ed37156e32c24884cfa8380b2f Mon Sep 17 00:00:00 2001 +From: Fabio Estevam +Date: Sat, 20 Mar 2021 13:21:52 +0100 +Subject: media: rkvdec: Remove of_match_ptr() + +From: Fabio Estevam + +commit c2357dd9cbafc8ed37156e32c24884cfa8380b2f upstream. + +When building with CONFIG_OF not set, the following clang +build warning is seen: + +>> drivers/staging/media/rkvdec/rkvdec.c:967:34: warning: unused variable 'of_rkvdec_match' [-Wunused-const-variable] + +Fix the warning by removing the unnecessary of_match_ptr(). + +Reported-by: kernel test robot +Fixes: cd33c830448b ("media: rkvdec: Add the rkvdec driver") +Signed-off-by: Fabio Estevam +Reviewed-by: Ezequiel Garcia +Signed-off-by: Hans Verkuil +Signed-off-by: Mauro Carvalho Chehab +Signed-off-by: Greg Kroah-Hartman +--- + drivers/staging/media/rkvdec/rkvdec.c | 2 +- + 1 file changed, 1 insertion(+), 1 deletion(-) + +--- a/drivers/staging/media/rkvdec/rkvdec.c ++++ b/drivers/staging/media/rkvdec/rkvdec.c +@@ -1072,7 +1072,7 @@ static struct platform_driver rkvdec_dri + .remove = rkvdec_remove, + .driver = { + .name = "rkvdec", +- .of_match_table = of_match_ptr(of_rkvdec_match), ++ .of_match_table = of_rkvdec_match, + .pm = &rkvdec_pm_ops, + }, + }; diff --git a/queue-5.12/nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch b/queue-5.12/nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch new file mode 100644 index 00000000000..f9eccdf31d3 --- /dev/null +++ b/queue-5.12/nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch @@ -0,0 +1,35 @@ +From 53fe2a30bc168db9700e00206d991ff934973cf1 Mon Sep 17 00:00:00 2001 +From: Christoph Hellwig +Date: Fri, 9 Apr 2021 11:46:12 +0200 +Subject: nvme: do not try to reconfigure APST when the controller is not live + +From: Christoph Hellwig + +commit 53fe2a30bc168db9700e00206d991ff934973cf1 upstream. + +Do not call nvme_configure_apst when the controller is not live, given +that nvme_configure_apst will fail due the lack of an admin queue when +the controller is being torn down and nvme_set_latency_tolerance is +called from dev_pm_qos_hide_latency_tolerance. + +Fixes: 510a405d945b("nvme: fix memory leak for power latency tolerance") +Reported-by: Peng Liu +Signed-off-by: Christoph Hellwig +Reviewed-by: Keith Busch +Signed-off-by: Greg Kroah-Hartman +--- + drivers/nvme/host/core.c | 3 ++- + 1 file changed, 2 insertions(+), 1 deletion(-) + +--- a/drivers/nvme/host/core.c ++++ b/drivers/nvme/host/core.c +@@ -2681,7 +2681,8 @@ static void nvme_set_latency_tolerance(s + + if (ctrl->ps_max_latency_us != latency) { + ctrl->ps_max_latency_us = latency; +- nvme_configure_apst(ctrl); ++ if (ctrl->state == NVME_CTRL_LIVE) ++ nvme_configure_apst(ctrl); + } + } + diff --git a/queue-5.12/series b/queue-5.12/series index 3de7b57a008..cecfff30568 100644 --- a/queue-5.12/series +++ b/queue-5.12/series @@ -345,3 +345,19 @@ drm-msm-dp-check-sink_count-before-update-is_connected-status.patch drm-i915-read-c0drb3-c1drb3-as-16-bits-again.patch drm-i915-overlay-fix-active-retire-callback-alignment.patch drm-i915-fix-crash-in-auto_retire.patch +clk-exynos7-mark-aclk_fsys1_200-as-critical.patch +soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch +soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch +soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch +media-rkvdec-remove-of_match_ptr.patch +i2c-mediatek-fix-send-master-code-at-more-than-1mhz.patch +dt-bindings-media-renesas-vin-make-resets-optional-on-r-car-gen1.patch +dt-bindings-thermal-rcar-gen3-thermal-support-five-tsc-nodes-on-r8a779a0.patch +arm64-dts-renesas-falcon-move-console-config-to-cpu-board-dts.patch +dt-bindings-phy-qcom-qmp-usb3-dp-phy-move-usb3-compatibles-back-to-qcom-qmp-phy.yaml.patch +dt-bindings-serial-8250-remove-duplicated-compatible-strings.patch +dt-bindings-pci-rcar-pci-host-document-missing-r-car-h1-support.patch +debugfs-make-debugfs_allow-ro-after-init.patch +ext4-fix-debug-format-string-warning.patch +nvme-do-not-try-to-reconfigure-apst-when-the-controller-is-not-live.patch +asoc-rsnd-check-all-busif-status-when-error.patch diff --git a/queue-5.12/soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch b/queue-5.12/soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch new file mode 100644 index 00000000000..50dfc2c2a39 --- /dev/null +++ b/queue-5.12/soc-mediatek-pm-domains-add-a-meaningful-power-domain-name.patch @@ -0,0 +1,138 @@ +From 022b02b4505ecea5eda02b18683531e49f7d8eb7 Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra +Date: Thu, 25 Feb 2021 18:49:57 +0100 +Subject: soc: mediatek: pm-domains: Add a meaningful power domain name + +From: Enric Balletbo i Serra + +commit 022b02b4505ecea5eda02b18683531e49f7d8eb7 upstream. + +Add the power domains names to the power domain struct so we +have meaningful name for every power domain. This also removes the +following debugfs error message. + + [ 2.242068] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! + [ 2.249949] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! + [ 2.257784] debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! + ... + +Fixes: 59b644b01cf4 ("soc: mediatek: Add MediaTek SCPSYS power domains") +Signed-off-by: Enric Balletbo i Serra +Reviewed-by: Hsin-Yi Wang +Link: https://lore.kernel.org/r/20210225175000.824661-1-enric.balletbo@collabora.com +Signed-off-by: Matthias Brugger +Signed-off-by: Greg Kroah-Hartman +--- + drivers/soc/mediatek/mt8173-pm-domains.h | 10 ++++++++++ + drivers/soc/mediatek/mtk-pm-domains.c | 6 +++++- + drivers/soc/mediatek/mtk-pm-domains.h | 2 ++ + 3 files changed, 17 insertions(+), 1 deletion(-) + +--- a/drivers/soc/mediatek/mt8173-pm-domains.h ++++ b/drivers/soc/mediatek/mt8173-pm-domains.h +@@ -12,24 +12,28 @@ + + static const struct scpsys_domain_data scpsys_domain_data_mt8173[] = { + [MT8173_POWER_DOMAIN_VDEC] = { ++ .name = "vdec", + .sta_mask = PWR_STATUS_VDEC, + .ctl_offs = SPM_VDE_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8173_POWER_DOMAIN_VENC] = { ++ .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = SPM_VEN_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT8173_POWER_DOMAIN_ISP] = { ++ .name = "isp", + .sta_mask = PWR_STATUS_ISP, + .ctl_offs = SPM_ISP_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + }, + [MT8173_POWER_DOMAIN_MM] = { ++ .name = "mm", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = SPM_DIS_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), +@@ -40,18 +44,21 @@ static const struct scpsys_domain_data s + }, + }, + [MT8173_POWER_DOMAIN_VENC_LT] = { ++ .name = "venc_lt", + .sta_mask = PWR_STATUS_VENC_LT, + .ctl_offs = SPM_VEN2_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT8173_POWER_DOMAIN_AUDIO] = { ++ .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = SPM_AUDIO_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT8173_POWER_DOMAIN_USB] = { ++ .name = "usb", + .sta_mask = PWR_STATUS_USB, + .ctl_offs = SPM_USB_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), +@@ -59,18 +66,21 @@ static const struct scpsys_domain_data s + .caps = MTK_SCPD_ACTIVE_WAKEUP, + }, + [MT8173_POWER_DOMAIN_MFG_ASYNC] = { ++ .name = "mfg_async", + .sta_mask = PWR_STATUS_MFG_ASYNC, + .ctl_offs = SPM_MFG_ASYNC_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = 0, + }, + [MT8173_POWER_DOMAIN_MFG_2D] = { ++ .name = "mfg_2d", + .sta_mask = PWR_STATUS_MFG_2D, + .ctl_offs = SPM_MFG_2D_PWR_CON, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(13, 12), + }, + [MT8173_POWER_DOMAIN_MFG] = { ++ .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = SPM_MFG_PWR_CON, + .sram_pdn_bits = GENMASK(13, 8), +--- a/drivers/soc/mediatek/mtk-pm-domains.c ++++ b/drivers/soc/mediatek/mtk-pm-domains.c +@@ -438,7 +438,11 @@ generic_pm_domain *scpsys_add_one_domain + goto err_unprepare_subsys_clocks; + } + +- pd->genpd.name = node->name; ++ if (!pd->data->name) ++ pd->genpd.name = node->name; ++ else ++ pd->genpd.name = pd->data->name; ++ + pd->genpd.power_off = scpsys_power_off; + pd->genpd.power_on = scpsys_power_on; + +--- a/drivers/soc/mediatek/mtk-pm-domains.h ++++ b/drivers/soc/mediatek/mtk-pm-domains.h +@@ -76,6 +76,7 @@ struct scpsys_bus_prot_data { + + /** + * struct scpsys_domain_data - scp domain data for power on/off flow ++ * @name: The name of the power domain. + * @sta_mask: The mask for power on/off status bit. + * @ctl_offs: The offset for main power control register. + * @sram_pdn_bits: The mask for sram power control bits. +@@ -85,6 +86,7 @@ struct scpsys_bus_prot_data { + * @bp_smi: bus protection for smi subsystem + */ + struct scpsys_domain_data { ++ const char *name; + u32 sta_mask; + int ctl_offs; + u32 sram_pdn_bits; diff --git a/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch b/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch new file mode 100644 index 00000000000..8dcb8f73c71 --- /dev/null +++ b/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8183.patch @@ -0,0 +1,142 @@ +From e57b8112258ed46dff23b49d6e400f54a8dbf1c3 Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra +Date: Thu, 25 Feb 2021 18:49:58 +0100 +Subject: soc: mediatek: pm-domains: Add a power domain names for mt8183 + +From: Enric Balletbo i Serra + +commit e57b8112258ed46dff23b49d6e400f54a8dbf1c3 upstream. + +Add the power domains names for the mt8183 SoC. This removes the debugfs +errors like the following: + + debugfs: Directory 'power-domain' with parent 'pm_genpd' already present! + +Fixes: eb9fa767fbe1 ("soc: mediatek: pm-domains: Add support for mt8183") +Signed-off-by: Enric Balletbo i Serra +Reviewed-by: Hsin-Yi Wang +Link: https://lore.kernel.org/r/20210225175000.824661-2-enric.balletbo@collabora.com +Signed-off-by: Matthias Brugger +Signed-off-by: Greg Kroah-Hartman +--- + drivers/soc/mediatek/mt8183-pm-domains.h | 15 +++++++++++++++ + 1 file changed, 15 insertions(+) + +--- a/drivers/soc/mediatek/mt8183-pm-domains.h ++++ b/drivers/soc/mediatek/mt8183-pm-domains.h +@@ -12,12 +12,14 @@ + + static const struct scpsys_domain_data scpsys_domain_data_mt8183[] = { + [MT8183_POWER_DOMAIN_AUDIO] = { ++ .name = "audio", + .sta_mask = PWR_STATUS_AUDIO, + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(11, 8), + .sram_pdn_ack_bits = GENMASK(15, 12), + }, + [MT8183_POWER_DOMAIN_CONN] = { ++ .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x032c, + .sram_pdn_bits = 0, +@@ -28,12 +30,14 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_MFG_ASYNC] = { ++ .name = "mfg_async", + .sta_mask = PWR_STATUS_MFG_ASYNC, + .ctl_offs = 0x0334, + .sram_pdn_bits = 0, + .sram_pdn_ack_bits = 0, + }, + [MT8183_POWER_DOMAIN_MFG] = { ++ .name = "mfg", + .sta_mask = PWR_STATUS_MFG, + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(8, 8), +@@ -41,18 +45,21 @@ static const struct scpsys_domain_data s + .caps = MTK_SCPD_DOMAIN_SUPPLY, + }, + [MT8183_POWER_DOMAIN_MFG_CORE0] = { ++ .name = "mfg_core0", + .sta_mask = BIT(7), + .ctl_offs = 0x034c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8183_POWER_DOMAIN_MFG_CORE1] = { ++ .name = "mfg_core1", + .sta_mask = BIT(20), + .ctl_offs = 0x0310, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8183_POWER_DOMAIN_MFG_2D] = { ++ .name = "mfg_2d", + .sta_mask = PWR_STATUS_MFG_2D, + .ctl_offs = 0x0348, + .sram_pdn_bits = GENMASK(8, 8), +@@ -65,6 +72,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_DISP] = { ++ .name = "disp", + .sta_mask = PWR_STATUS_DISP, + .ctl_offs = 0x030c, + .sram_pdn_bits = GENMASK(8, 8), +@@ -83,6 +91,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_CAM] = { ++ .name = "cam", + .sta_mask = BIT(25), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(9, 8), +@@ -105,6 +114,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_ISP] = { ++ .name = "isp", + .sta_mask = PWR_STATUS_ISP, + .ctl_offs = 0x0308, + .sram_pdn_bits = GENMASK(9, 8), +@@ -127,6 +137,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_VDEC] = { ++ .name = "vdec", + .sta_mask = BIT(31), + .ctl_offs = 0x0300, + .sram_pdn_bits = GENMASK(8, 8), +@@ -139,6 +150,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_VENC] = { ++ .name = "venc", + .sta_mask = PWR_STATUS_VENC, + .ctl_offs = 0x0304, + .sram_pdn_bits = GENMASK(11, 8), +@@ -151,6 +163,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_VPU_TOP] = { ++ .name = "vpu_top", + .sta_mask = BIT(26), + .ctl_offs = 0x0324, + .sram_pdn_bits = GENMASK(8, 8), +@@ -177,6 +190,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8183_POWER_DOMAIN_VPU_CORE0] = { ++ .name = "vpu_core0", + .sta_mask = BIT(27), + .ctl_offs = 0x33c, + .sram_pdn_bits = GENMASK(11, 8), +@@ -194,6 +208,7 @@ static const struct scpsys_domain_data s + .caps = MTK_SCPD_SRAM_ISO, + }, + [MT8183_POWER_DOMAIN_VPU_CORE1] = { ++ .name = "vpu_core1", + .sta_mask = BIT(28), + .ctl_offs = 0x0340, + .sram_pdn_bits = GENMASK(11, 8), diff --git a/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch b/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch new file mode 100644 index 00000000000..bbf04f95db1 --- /dev/null +++ b/queue-5.12/soc-mediatek-pm-domains-add-a-power-domain-names-for-mt8192.patch @@ -0,0 +1,182 @@ +From 3edc01bc53c639b1c98f57e7f1c026aae6a25a62 Mon Sep 17 00:00:00 2001 +From: Enric Balletbo i Serra +Date: Thu, 25 Feb 2021 18:49:59 +0100 +Subject: soc: mediatek: pm-domains: Add a power domain names for mt8192 + +From: Enric Balletbo i Serra + +commit 3edc01bc53c639b1c98f57e7f1c026aae6a25a62 upstream. + +Add the power domains names for the mt8192 SoC. + +Fixes: a49d5e7a89d6 ("soc: mediatek: pm-domains: Add support for mt8192") +Signed-off-by: Enric Balletbo i Serra +Reviewed-by: Hsin-Yi Wang +Link: https://lore.kernel.org/r/20210225175000.824661-3-enric.balletbo@collabora.com +Signed-off-by: Matthias Brugger +Signed-off-by: Greg Kroah-Hartman +--- + drivers/soc/mediatek/mt8192-pm-domains.h | 21 +++++++++++++++++++++ + 1 file changed, 21 insertions(+) + +--- a/drivers/soc/mediatek/mt8192-pm-domains.h ++++ b/drivers/soc/mediatek/mt8192-pm-domains.h +@@ -12,6 +12,7 @@ + + static const struct scpsys_domain_data scpsys_domain_data_mt8192[] = { + [MT8192_POWER_DOMAIN_AUDIO] = { ++ .name = "audio", + .sta_mask = BIT(21), + .ctl_offs = 0x0354, + .sram_pdn_bits = GENMASK(8, 8), +@@ -24,6 +25,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_CONN] = { ++ .name = "conn", + .sta_mask = PWR_STATUS_CONN, + .ctl_offs = 0x0304, + .sram_pdn_bits = 0, +@@ -45,12 +47,14 @@ static const struct scpsys_domain_data s + .caps = MTK_SCPD_KEEP_DEFAULT_OFF, + }, + [MT8192_POWER_DOMAIN_MFG0] = { ++ .name = "mfg0", + .sta_mask = BIT(2), + .ctl_offs = 0x0308, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_MFG1] = { ++ .name = "mfg1", + .sta_mask = BIT(3), + .ctl_offs = 0x030c, + .sram_pdn_bits = GENMASK(8, 8), +@@ -75,36 +79,42 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_MFG2] = { ++ .name = "mfg2", + .sta_mask = BIT(4), + .ctl_offs = 0x0310, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_MFG3] = { ++ .name = "mfg3", + .sta_mask = BIT(5), + .ctl_offs = 0x0314, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_MFG4] = { ++ .name = "mfg4", + .sta_mask = BIT(6), + .ctl_offs = 0x0318, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_MFG5] = { ++ .name = "mfg5", + .sta_mask = BIT(7), + .ctl_offs = 0x031c, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_MFG6] = { ++ .name = "mfg6", + .sta_mask = BIT(8), + .ctl_offs = 0x0320, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_DISP] = { ++ .name = "disp", + .sta_mask = BIT(20), + .ctl_offs = 0x0350, + .sram_pdn_bits = GENMASK(8, 8), +@@ -133,6 +143,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_IPE] = { ++ .name = "ipe", + .sta_mask = BIT(14), + .ctl_offs = 0x0338, + .sram_pdn_bits = GENMASK(8, 8), +@@ -149,6 +160,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_ISP] = { ++ .name = "isp", + .sta_mask = BIT(12), + .ctl_offs = 0x0330, + .sram_pdn_bits = GENMASK(8, 8), +@@ -165,6 +177,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_ISP2] = { ++ .name = "isp2", + .sta_mask = BIT(13), + .ctl_offs = 0x0334, + .sram_pdn_bits = GENMASK(8, 8), +@@ -181,6 +194,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_MDP] = { ++ .name = "mdp", + .sta_mask = BIT(19), + .ctl_offs = 0x034c, + .sram_pdn_bits = GENMASK(8, 8), +@@ -197,6 +211,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_VENC] = { ++ .name = "venc", + .sta_mask = BIT(17), + .ctl_offs = 0x0344, + .sram_pdn_bits = GENMASK(8, 8), +@@ -213,6 +228,7 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_VDEC] = { ++ .name = "vdec", + .sta_mask = BIT(15), + .ctl_offs = 0x033c, + .sram_pdn_bits = GENMASK(8, 8), +@@ -229,12 +245,14 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_VDEC2] = { ++ .name = "vdec2", + .sta_mask = BIT(16), + .ctl_offs = 0x0340, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_CAM] = { ++ .name = "cam", + .sta_mask = BIT(23), + .ctl_offs = 0x035c, + .sram_pdn_bits = GENMASK(8, 8), +@@ -263,18 +281,21 @@ static const struct scpsys_domain_data s + }, + }, + [MT8192_POWER_DOMAIN_CAM_RAWA] = { ++ .name = "cam_rawa", + .sta_mask = BIT(24), + .ctl_offs = 0x0360, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_CAM_RAWB] = { ++ .name = "cam_rawb", + .sta_mask = BIT(25), + .ctl_offs = 0x0364, + .sram_pdn_bits = GENMASK(8, 8), + .sram_pdn_ack_bits = GENMASK(12, 12), + }, + [MT8192_POWER_DOMAIN_CAM_RAWC] = { ++ .name = "cam_rawc", + .sta_mask = BIT(26), + .ctl_offs = 0x0368, + .sram_pdn_bits = GENMASK(8, 8), -- 2.47.3